diff options
| author | Albert Magyar | 2020-04-04 13:28:06 -0700 |
|---|---|---|
| committer | Albert Magyar | 2020-04-06 12:30:44 -0700 |
| commit | 33f8eaeb6e1905f76f10264d29bc72b03f583743 (patch) | |
| tree | 9f87b1eb2e344f80ed5866473e4762de0dd8ed6e /src | |
| parent | 6aad5d6e91f384caedd194a8378ba0fe71013ff1 (diff) | |
Avoid using deprecated 'Gender' objects
* Remove 'gender' as pattern match binding
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/passes/RemoveIntervals.scala | 2 | ||||
| -rw-r--r-- | src/main/scala/firrtl/transforms/SimplifyMems.scala | 3 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/RemoveIntervals.scala b/src/main/scala/firrtl/passes/RemoveIntervals.scala index 001c92b3..b4114a50 100644 --- a/src/main/scala/firrtl/passes/RemoveIntervals.scala +++ b/src/main/scala/firrtl/passes/RemoveIntervals.scala @@ -173,7 +173,7 @@ class RemoveIntervals extends Pass with PreservesAll[Transform] { case DefNode(info, name, value) => value.tpe match { case IntervalType(l, u, p) => val newType = IntervalType(l, u, p) - Block(Seq(DefWire(info, name, newType), Connect(info, WRef(name, newType, WireKind, FEMALE), value))) + Block(Seq(DefWire(info, name, newType), Connect(info, WRef(name, newType, WireKind, SinkFlow), value))) case other => s } case other => other map makeWireStmt diff --git a/src/main/scala/firrtl/transforms/SimplifyMems.scala b/src/main/scala/firrtl/transforms/SimplifyMems.scala index 1552f2f6..cc53e13d 100644 --- a/src/main/scala/firrtl/transforms/SimplifyMems.scala +++ b/src/main/scala/firrtl/transforms/SimplifyMems.scala @@ -28,8 +28,7 @@ class SimplifyMems extends Transform { val mTarget = ModuleTarget(c.main, m.name) def onExpr(e: Expression): Expression = e.map(onExpr) match { - case WRef(name, tpe, MemKind, gender) if memAdapters.contains(name) => - WRef(name, tpe, WireKind, gender) + case wr @ WRef(name, _, MemKind, _) if memAdapters.contains(name) => wr.copy(kind = WireKind) case e => e } |
