diff options
| author | Adam Izraelevitz | 2017-03-15 14:55:04 -0700 |
|---|---|---|
| committer | Adam Izraelevitz | 2017-03-22 13:34:15 -0700 |
| commit | 945d78448dc932290f89c271916fe8946aacb9c2 (patch) | |
| tree | cebd7790f953ea0a558e1d65d20e04ba4ff182c5 /src | |
| parent | 0c49cfecfcf7831ee3df20b986585942b5cc9812 (diff) | |
Throw different error message for missing emitanno
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/Compiler.scala | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/main/scala/firrtl/Compiler.scala b/src/main/scala/firrtl/Compiler.scala index 60ec0eb0..b0d42332 100644 --- a/src/main/scala/firrtl/Compiler.scala +++ b/src/main/scala/firrtl/Compiler.scala @@ -279,10 +279,7 @@ trait Compiler extends LazyLogging { writer: Writer, customTransforms: Seq[Transform] = Seq.empty): CircuitState = { val finalState = compileAndEmit(state, customTransforms) - finalState.emittedCircuitOption match { - case Some(emitted) => writer.write(emitted.value) - case _ => throwInternalError - } + writer.write(finalState.getEmittedCircuit.value) finalState } |