aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorDonggyu2017-08-01 16:10:52 -0700
committerGitHub2017-08-01 16:10:52 -0700
commit86f7abd4d63a33bbb0012fa254b01edf10ba2159 (patch)
treeb2f4c8859b2892509e1aa598efecf88f9d9f1221 /src
parent7faf651a45c1470ca8308ef7fc22819b4bea3cd4 (diff)
DCE for IsInvalid (#629)
Diffstat (limited to 'src')
-rw-r--r--src/main/scala/firrtl/transforms/DeadCodeElimination.scala3
-rw-r--r--src/test/scala/firrtlTests/DCETests.scala2
2 files changed, 5 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/transforms/DeadCodeElimination.scala b/src/main/scala/firrtl/transforms/DeadCodeElimination.scala
index aa147733..48978a7a 100644
--- a/src/main/scala/firrtl/transforms/DeadCodeElimination.scala
+++ b/src/main/scala/firrtl/transforms/DeadCodeElimination.scala
@@ -207,6 +207,9 @@ class DeadCodeElimination extends Transform {
case Attach(info, exprs) => // If any exprs are dead then all are
val dead = exprs.flatMap(getDeps(_)).forall(deadNodes.contains(_))
if (dead) EmptyStmt else Attach(info, exprs)
+ case IsInvalid(info, expr) =>
+ val node = getDeps(expr) match { case Seq(elt) => elt }
+ if (deadNodes.contains(node)) EmptyStmt else IsInvalid(info, expr)
case block: Block => block map onStmt
case other => other
}
diff --git a/src/test/scala/firrtlTests/DCETests.scala b/src/test/scala/firrtlTests/DCETests.scala
index 41edfa8b..ea34d4be 100644
--- a/src/test/scala/firrtlTests/DCETests.scala
+++ b/src/test/scala/firrtlTests/DCETests.scala
@@ -109,6 +109,8 @@ class DCETests extends FirrtlFlatSpec {
| input x : UInt<1>
| input y : UInt<1>
| output z : UInt<1>
+ | x is invalid
+ | y is invalid
| z <= x
| module Top :
| input x : UInt<1>