Bugfix: Dedup aggressively (ignore comments) (#375)

FileInfo is merged

2 files changed, 40 insertions, 2 deletions

diff --git a/src/test/scala/firrtlTests/PassTests.scala b/src/test/scala/firrtlTests/PassTests.scala
index 7fa67153..44bd0382 100644
--- a/src/test/scala/firrtlTests/PassTests.scala
+++ b/src/test/scala/firrtlTests/PassTests.scala
@@ -7,7 +7,7 @@ import java.io.{StringWriter,Writer}
 import org.scalatest.{FlatSpec, Matchers}
 import org.scalatest.junit.JUnitRunner
 import firrtl.ir.Circuit
-import firrtl.Parser.IgnoreInfo
+import firrtl.Parser.UseInfo
 import firrtl.passes.{Pass, PassExceptions, RemoveEmpty}
 import firrtl.{
    Transform,
@@ -37,7 +37,7 @@ abstract class SimpleTransformSpec extends FlatSpec with Matchers with Compiler
    def emitter = new FirrtlEmitter
 
    // Utility function
-   def parse(s: String): Circuit = Parser.parse(s.split("\n").toIterator, infoMode = IgnoreInfo)
+   def parse(s: String): Circuit = Parser.parse(s.split("\n").toIterator, infoMode = UseInfo)
    def squash(c: Circuit): Circuit = RemoveEmpty.run(c)
 
    // Executes the test. Call in tests.
diff --git a/src/test/scala/firrtlTests/transforms/DedupTests.scala b/src/test/scala/firrtlTests/transforms/DedupTests.scala
index 1bcd711c..a17e6ae1 100644
--- a/src/test/scala/firrtlTests/transforms/DedupTests.scala
+++ b/src/test/scala/firrtlTests/transforms/DedupTests.scala
@@ -89,6 +89,44 @@ class DedupModuleTests extends HighTransformSpec {
       val aMap = new AnnotationMap(Nil)
       execute(writer, aMap, input, check)
    }
+   "The module A and B with comments" should "be deduped" in {
+      val input =
+         """circuit Top :
+           |  module Top :
+           |    inst a1 of A
+           |    inst a2 of A_
+           |  module A : @[yy 2:2]
+           |    output x: UInt<1> @[yy 2:2]
+           |    inst b of B @[yy 2:2]
+           |    x <= b.x @[yy 2:2]
+           |  module A_ : @[xx 1:1]
+           |    output x: UInt<1> @[xx 1:1]
+           |    inst b of B_ @[xx 1:1]
+           |    x <= b.x @[xx 1:1]
+           |  module B :
+           |    output x: UInt<1>
+           |    x <= UInt(1)
+           |  module B_ :
+           |    output x: UInt<1>
+           |    x <= UInt(1)
+           """.stripMargin
+      val check =
+         """circuit Top :
+           |  module Top :
+           |    inst a1 of A
+           |    inst a2 of A
+           |  module A : @[yy 2:2 xx 1:1]
+           |    output x: UInt<1> @[yy 2:2 xx 1:1]
+           |    inst b of B @[yy 2:2 xx 1:1]
+           |    x <= b.x @[yy 2:2 xx 1:1]
+           |  module B :
+           |    output x: UInt<1>
+           |    x <= UInt(1)
+           """.stripMargin
+      val writer = new StringWriter()
+      val aMap = new AnnotationMap(Nil)
+      execute(writer, aMap, input, check)
+   }
 }
 
 // Execution driven tests for inlining modules