Merge pull request #1528 from freechipsproject/conditionally-scopes

Create new scopes for child statements of Conditionally

2 files changed, 50 insertions, 3 deletions

diff --git a/src/test/resources/features/ChirrtlMems.fir b/src/test/resources/features/ChirrtlMems.fir
index c51e3b78..de5b3cf3 100644
--- a/src/test/resources/features/ChirrtlMems.fir
+++ b/src/test/resources/features/ChirrtlMems.fir
@@ -14,13 +14,13 @@ circuit ChirrtlMems :
     raddr <= add(raddr, UInt(1))
     infer mport r = ram[raddr], newClock
 
+    reg waddr : UInt<4>, clock with : (reset => (reset, UInt(0)))
+    waddr <= add(waddr, UInt(1))
+
     when wen :
       node newerClock = clock
-      reg waddr : UInt<4>, clock with : (reset => (reset, UInt(0)))
-      waddr <= add(waddr, UInt(1))
       infer mport w = ram[waddr], newerClock
       w <= waddr
-
       when eq(waddr, UInt(0)) :
         raddr <= UInt(0)
 
diff --git a/src/test/scala/firrtlTests/CheckSpec.scala b/src/test/scala/firrtlTests/CheckSpec.scala
index c622bde5..b49054ad 100644
--- a/src/test/scala/firrtlTests/CheckSpec.scala
+++ b/src/test/scala/firrtlTests/CheckSpec.scala
@@ -352,6 +352,53 @@ class CheckSpec extends AnyFlatSpec with Matchers {
     }
   }
 
+  "Conditionally statements" should "create a new scope" in {
+    val input =
+      s"""|circuit scopes:
+          |  module scopes:
+          |    input i: UInt<1>
+          |    output o: UInt<1>
+          |    when i:
+          |      node x = not(i)
+          |    o <= and(x, i)
+          |""".stripMargin
+    assertThrows[CheckHighForm.UndeclaredReferenceException] {
+      checkHighInput(input)
+    }
+  }
+
+  "Attempting to shadow a component name" should "throw an error" in {
+    val input =
+      s"""|circuit scopes:
+          |  module scopes:
+          |    input i: UInt<1>
+          |    output o: UInt<1>
+          |    wire x: UInt<1>
+          |    when i:
+          |      node x = not(i)
+          |    o <= and(x, i)
+          |""".stripMargin
+    assertThrows[CheckHighForm.NotUniqueException] {
+      checkHighInput(input)
+    }
+  }
+
+  "Conditionally statements" should "create separate consequent and alternate scopes" in {
+    val input =
+      s"""|circuit scopes:
+          |  module scopes:
+          |    input i: UInt<1>
+          |    output o: UInt<1>
+          |    o <= i
+          |    when i:
+          |      node x = not(i)
+          |    else:
+          |      o <= and(x, i)
+          |""".stripMargin
+    assertThrows[CheckHighForm.UndeclaredReferenceException] {
+      checkHighInput(input)
+    }
+  }
 }
 
 object CheckSpec {