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authorChick Markley2017-01-31 09:25:32 -0800
committerGitHub2017-01-31 09:25:32 -0800
commit568f25b221884eeb0db362c902c933f734c7e47e (patch)
tree5c0974d82d494a44deb47e2cec8e8550f4dbe3e3 /src/test/resources
parentbb389aa69f0b6a99c3daecbf02e4df1e303ec636 (diff)
Blackboxhelper (#418)
* First pass at implementing a annotation based mechanism to move black box verilator files into the target directory * A little bit of style cleanup * A little bit of style cleanup * Fix the driver, wasn't appending targetDir properly Add some docs * test had wrong value now that targetdir is added to annnos * Now saves a list of all black box verilog files moved into target directory. Then creates a file black_box_verilog_files.f that contains this list with -v prepended to each line * Made black box source helper be low to low form Added it to the verilog compiler transforms Added a test to make sure it got there * targetDir annotation is targeted to a CircuitName("All")
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