Designs with no SeqMems should produce empty MemConf strings, and this should be parsable without excepting (#1060)

1 files changed, 3 insertions, 2 deletions

diff --git a/src/main/scala/firrtl/passes/memlib/MemConf.scala b/src/main/scala/firrtl/passes/memlib/MemConf.scala
index 55600bf6..e53a5de7 100644
--- a/src/main/scala/firrtl/passes/memlib/MemConf.scala
+++ b/src/main/scala/firrtl/passes/memlib/MemConf.scala
@@ -51,9 +51,10 @@ object MemConf {
 
   def fromString(s: String): Seq[MemConf] = {
     s.split("\n").toSeq.map(_ match {
-      case MemConf.regex(name, depth, width, ports, maskGran) => MemConf(name, depth.toInt, width.toInt, MemPort.fromString(ports), Option(maskGran).map(_.toInt))
+      case MemConf.regex(name, depth, width, ports, maskGran) => Some(MemConf(name, depth.toInt, width.toInt, MemPort.fromString(ports), Option(maskGran).map(_.toInt)))
+      case "" => None
       case _ => throw new Exception(s"Error parsing MemConf string : ${s}")
-    })
+    }).flatten
   }
 
   def apply(name: String, depth: Int, width: Int, readPorts: Int, writePorts: Int, readWritePorts: Int, maskGranularity: Option[Int]): MemConf = {