diff options
| author | Adam Izraelevitz | 2016-12-05 09:29:40 -0800 |
|---|---|---|
| committer | GitHub | 2016-12-05 09:29:40 -0800 |
| commit | ad36788b79f8b63be59d9612134889aef874c286 (patch) | |
| tree | a8e305c6265b44a51ad960f4a757f28462ddb76b /src/main | |
| parent | a4da2e07469374dcafd1b2b50293ed875340832f (diff) | |
Bugfix: expand whens not voiding memories (#380)
Diffstat (limited to 'src/main')
| -rw-r--r-- | src/main/scala/firrtl/passes/ExpandWhens.scala | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/passes/ExpandWhens.scala b/src/main/scala/firrtl/passes/ExpandWhens.scala index 52c7e6ee..4d02e192 100644 --- a/src/main/scala/firrtl/passes/ExpandWhens.scala +++ b/src/main/scala/firrtl/passes/ExpandWhens.scala @@ -78,6 +78,9 @@ object ExpandWhens extends Pass { case w: DefWire => netlist ++= (getFemaleRefs(w.name, w.tpe, BIGENDER) map (ref => we(ref) -> WVoid)) w + case w: DefMemory => + netlist ++= (getFemaleRefs(w.name, MemPortUtils.memType(w), MALE) map (ref => we(ref) -> WVoid)) + w case r: DefRegister => netlist ++= (getFemaleRefs(r.name, r.tpe, BIGENDER) map (ref => we(ref) -> ref)) r |