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authorJack Koenig2017-06-13 13:23:31 -0700
committerJack Koenig2017-06-13 13:52:12 -0700
commit51fb6db4fc82aba80650f6e98267b34fcea14122 (patch)
tree12a29ad4d1b2ecfe6ba6f4478064b19074846d34 /src/main
parent769f2d0a368819046a1def1e9e2050500e0b72a8 (diff)
Make ExpandWhens delete 'is invalid' for attached Analog components
Also add tests for what should happen to 'is invalid' in ExpandWhens Fixes #606
Diffstat (limited to 'src/main')
-rw-r--r--src/main/scala/firrtl/passes/ExpandWhens.scala8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/ExpandWhens.scala b/src/main/scala/firrtl/passes/ExpandWhens.scala
index 1f093dd1..181fb642 100644
--- a/src/main/scala/firrtl/passes/ExpandWhens.scala
+++ b/src/main/scala/firrtl/passes/ExpandWhens.scala
@@ -45,9 +45,10 @@ object ExpandWhens extends Pass {
}
}
}
- private def expandNetlist(netlist: Netlist) =
+ private def expandNetlist(netlist: Netlist, attached: Set[WrappedExpression]) =
netlist map {
- case (k, WInvalid) => IsInvalid(NoInfo, k.e1)
+ case (k, WInvalid) => // Remove IsInvalids on attached Analog types
+ if (attached.contains(k)) EmptyStmt else IsInvalid(NoInfo, k.e1)
case (k, v) => Connect(NoInfo, k.e1, v)
}
/** Combines Attaches
@@ -186,7 +187,8 @@ object ExpandWhens extends Pass {
case m: ExtModule => m
case m: Module =>
val (netlist, simlist, attaches, bodyx) = expandWhens(m)
- val newBody = Block(Seq(squashEmpty(bodyx)) ++ expandNetlist(netlist) ++
+ val attachedAnalogs = attaches.flatMap(_.exprs.map(we)).toSet
+ val newBody = Block(Seq(squashEmpty(bodyx)) ++ expandNetlist(netlist, attachedAnalogs) ++
combineAttaches(attaches) ++ simlist)
Module(m.info, m.name, m.ports, newBody)
}