Fix almost all Scaladoc warnings

This fixes all Scaladoc warnings except for those trying to link to
Java.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

1 files changed, 5 insertions, 5 deletions

diff --git a/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala b/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
index 2bce124c..2d04dc89 100644
--- a/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
+++ b/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
@@ -11,14 +11,14 @@ import scala.collection.mutable
 
 object FlattenRegUpdate {
 
-  /** Mapping from references to the [[Expression]]s that drive them */
+  /** Mapping from references to the [[firrtl.ir.Expression Expression]]s that drive them */
   type Netlist = mutable.HashMap[WrappedExpression, Expression]
 
   /** Build a [[Netlist]] from a Module's connections and Nodes
     *
-    * This assumes [[LowForm]]
+    * This assumes [[firrtl.LowForm LowForm]]
     *
-    * @param mod [[Module]] from which to build a [[Netlist]]
+    * @param mod [[firrtl.ir.Module Module]] from which to build a [[Netlist]]
     * @return [[Netlist]] of the module's connections and nodes
     */
   def buildNetlist(mod: Module): Netlist = {
@@ -43,8 +43,8 @@ object FlattenRegUpdate {
     * Constructs nested mux trees (up to a certain arbitrary threshold) for register updates. This
     * can result in dead code that this function does NOT remove.
     *
-    * @param mod [[Module]] to transform
-    * @return [[Module]] with register updates flattened
+    * @param mod [[firrtl.ir.Module Module]] to transform
+    * @return [[firrtl.ir.Module Module]] with register updates flattened
     */
   def flattenReg(mod: Module): Module = {
     // We want to flatten Mux trees for reg updates into if-trees for