diff options
| author | Schuyler Eldridge | 2020-06-19 01:11:15 -0400 |
|---|---|---|
| committer | Schuyler Eldridge | 2020-06-22 19:00:20 -0400 |
| commit | d66ff2357e59113ecf48c7d257edff429c4266e0 (patch) | |
| tree | 30f5d068ea78caf172008f900e3d4fde7e20f6b0 /src/main/scala/firrtl/transforms/CheckCombLoops.scala | |
| parent | 2d1e074a67483c136d5f0ed86e8ecf1b8505bc10 (diff) | |
Convert PreservesAll to explicit invalidates=false
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/main/scala/firrtl/transforms/CheckCombLoops.scala')
| -rw-r--r-- | src/main/scala/firrtl/transforms/CheckCombLoops.scala | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/transforms/CheckCombLoops.scala b/src/main/scala/firrtl/transforms/CheckCombLoops.scala index 29f9ffdb..dbfd5cf8 100644 --- a/src/main/scala/firrtl/transforms/CheckCombLoops.scala +++ b/src/main/scala/firrtl/transforms/CheckCombLoops.scala @@ -12,7 +12,7 @@ import firrtl.annotations._ import firrtl.Utils.throwInternalError import firrtl.graph._ import firrtl.analyses.InstanceGraph -import firrtl.options.{Dependency, PreservesAll, RegisteredTransform, ShellOption} +import firrtl.options.{Dependency, RegisteredTransform, ShellOption} /** * A case class that represents a net in the circuit. This is necessary since combinational loop @@ -100,8 +100,7 @@ case class CombinationalPath(sink: ReferenceTarget, sources: Seq[ReferenceTarget */ class CheckCombLoops extends Transform with RegisteredTransform - with DependencyAPIMigration - with PreservesAll[Transform] { + with DependencyAPIMigration { override def prerequisites = firrtl.stage.Forms.MidForm ++ Seq( Dependency(passes.LowerTypes), @@ -112,6 +111,8 @@ class CheckCombLoops extends Transform override def optionalPrerequisiteOf = Seq.empty + override def invalidates(a: Transform) = false + import CheckCombLoops._ val options = Seq( |