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authorJack Koenig2018-03-27 21:54:30 -0700
committerGitHub2018-03-27 21:54:30 -0700
commitcf0d971beda33a1802c384bd8d5eebb150d9d578 (patch)
tree95d47d79d784289904fc0cb0c88b349617dc3a67 /src/main/scala/firrtl/passes
parent65454f5ff1a370d66202a073e18cdcd40180f051 (diff)
Change throwInternalError to use a String instead of Option[String] (#777)
Diffstat (limited to 'src/main/scala/firrtl/passes')
-rw-r--r--src/main/scala/firrtl/passes/CheckWidths.scala2
-rw-r--r--src/main/scala/firrtl/passes/Checks.scala2
-rw-r--r--src/main/scala/firrtl/passes/ConvertFixedToSInt.scala4
-rw-r--r--src/main/scala/firrtl/passes/InferWidths.scala2
-rw-r--r--src/main/scala/firrtl/passes/RemoveAccesses.scala2
-rw-r--r--src/main/scala/firrtl/passes/Resolves.scala8
-rw-r--r--src/main/scala/firrtl/passes/Uniquify.scala2
-rw-r--r--src/main/scala/firrtl/passes/ZeroWidth.scala1
-rw-r--r--src/main/scala/firrtl/passes/clocklist/ClockList.scala2
-rw-r--r--src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala2
10 files changed, 13 insertions, 14 deletions
diff --git a/src/main/scala/firrtl/passes/CheckWidths.scala b/src/main/scala/firrtl/passes/CheckWidths.scala
index 7406f09a..7827c55e 100644
--- a/src/main/scala/firrtl/passes/CheckWidths.scala
+++ b/src/main/scala/firrtl/passes/CheckWidths.scala
@@ -50,7 +50,7 @@ object CheckWidths extends Pass {
def hasWidth(tpe: Type): Boolean = tpe match {
case GroundType(IntWidth(w)) => true
case GroundType(_) => false
- case _ => throwInternalError(Some(s"hasWidth - $tpe"))
+ case _ => throwInternalError(s"hasWidth - $tpe")
}
def check_width_t(info: Info, mname: String)(t: Type): Type =
diff --git a/src/main/scala/firrtl/passes/Checks.scala b/src/main/scala/firrtl/passes/Checks.scala
index 2946127a..215c5425 100644
--- a/src/main/scala/firrtl/passes/Checks.scala
+++ b/src/main/scala/firrtl/passes/Checks.scala
@@ -305,7 +305,7 @@ object CheckTypes extends Pass {
case UnknownType =>
errors.append(new IllegalUnknownType(info, mname, e.serialize))
(isUInt, isSInt, isClock, isFix)
- case other => throwInternalError(Some(s"Illegal Type: ${other.serialize}"))
+ case other => throwInternalError(s"Illegal Type: ${other.serialize}")
}
} match {
// (UInt, SInt, Clock, Fixed)
diff --git a/src/main/scala/firrtl/passes/ConvertFixedToSInt.scala b/src/main/scala/firrtl/passes/ConvertFixedToSInt.scala
index b52dacb7..4004b8d6 100644
--- a/src/main/scala/firrtl/passes/ConvertFixedToSInt.scala
+++ b/src/main/scala/firrtl/passes/ConvertFixedToSInt.scala
@@ -19,7 +19,7 @@ object ConvertFixedToSInt extends Pass {
} else if (point - p < 0) {
DoPrim(Shr, Seq(e), Seq(p - point), UnknownType)
} else e
- case FixedType(w, p) => throwInternalError(Some(s"alignArg: shouldn't be here - $e"))
+ case FixedType(w, p) => throwInternalError(s"alignArg: shouldn't be here - $e")
case _ => e
}
def calcPoint(es: Seq[Expression]): BigInt =
@@ -29,7 +29,7 @@ object ConvertFixedToSInt extends Pass {
}).reduce(max(_, _))
def toSIntType(t: Type): Type = t match {
case FixedType(IntWidth(w), IntWidth(p)) => SIntType(IntWidth(w))
- case FixedType(w, p) => throwInternalError(Some(s"toSIntType: shouldn't be here - $t"))
+ case FixedType(w, p) => throwInternalError(s"toSIntType: shouldn't be here - $t")
case _ => t map toSIntType
}
def run(c: Circuit): Circuit = {
diff --git a/src/main/scala/firrtl/passes/InferWidths.scala b/src/main/scala/firrtl/passes/InferWidths.scala
index aacd3656..9ccd8c78 100644
--- a/src/main/scala/firrtl/passes/InferWidths.scala
+++ b/src/main/scala/firrtl/passes/InferWidths.scala
@@ -333,7 +333,7 @@ object InferWidths extends Pass {
case wx: MinusWidth => map2(solve(wx.arg1), solve(wx.arg2), {_ - _})
case wx: ExpWidth => map2(Some(BigInt(2)), solve(wx.arg1), pow_minus_one)
case wx: IntWidth => Some(wx.width)
- case wx => throwInternalError(Some(s"solve: shouldn't be here - %$wx")); None;
+ case wx => throwInternalError(s"solve: shouldn't be here - %$wx")
}
solve(w) match {
diff --git a/src/main/scala/firrtl/passes/RemoveAccesses.scala b/src/main/scala/firrtl/passes/RemoveAccesses.scala
index 9b19b221..30aae284 100644
--- a/src/main/scala/firrtl/passes/RemoveAccesses.scala
+++ b/src/main/scala/firrtl/passes/RemoveAccesses.scala
@@ -95,7 +95,7 @@ object RemoveAccesses extends Pass {
case (_:WSubAccess| _: WSubField| _: WSubIndex| _: WRef) if hasAccess(e) =>
val rs = getLocations(e)
rs find (x => x.guard != one) match {
- case None => throwInternalError(Some(s"removeMale: shouldn't be here - $e"))
+ case None => throwInternalError(s"removeMale: shouldn't be here - $e")
case Some(_) =>
val (wire, temp) = create_temp(e)
val temps = create_exps(temp)
diff --git a/src/main/scala/firrtl/passes/Resolves.scala b/src/main/scala/firrtl/passes/Resolves.scala
index b601c81e..e4a06525 100644
--- a/src/main/scala/firrtl/passes/Resolves.scala
+++ b/src/main/scala/firrtl/passes/Resolves.scala
@@ -85,19 +85,19 @@ object CInferMDir extends Pass {
mports get e.name match {
case None =>
case Some(p) => mports(e.name) = (p, dir) match {
- case (MInfer, MInfer) => throwInternalError(Some(s"infer_mdir_e: shouldn't be here - $p, $dir"))
+ case (MInfer, MInfer) => throwInternalError(s"infer_mdir_e: shouldn't be here - $p, $dir")
case (MInfer, MWrite) => MWrite
case (MInfer, MRead) => MRead
case (MInfer, MReadWrite) => MReadWrite
- case (MWrite, MInfer) => throwInternalError(Some(s"infer_mdir_e: shouldn't be here - $p, $dir"))
+ case (MWrite, MInfer) => throwInternalError(s"infer_mdir_e: shouldn't be here - $p, $dir")
case (MWrite, MWrite) => MWrite
case (MWrite, MRead) => MReadWrite
case (MWrite, MReadWrite) => MReadWrite
- case (MRead, MInfer) => throwInternalError(Some(s"infer_mdir_e: shouldn't be here - $p, $dir"))
+ case (MRead, MInfer) => throwInternalError(s"infer_mdir_e: shouldn't be here - $p, $dir")
case (MRead, MWrite) => MReadWrite
case (MRead, MRead) => MRead
case (MRead, MReadWrite) => MReadWrite
- case (MReadWrite, MInfer) => throwInternalError(Some(s"infer_mdir_e: shouldn't be here - $p, $dir"))
+ case (MReadWrite, MInfer) => throwInternalError(s"infer_mdir_e: shouldn't be here - $p, $dir")
case (MReadWrite, MWrite) => MReadWrite
case (MReadWrite, MRead) => MReadWrite
case (MReadWrite, MReadWrite) => MReadWrite
diff --git a/src/main/scala/firrtl/passes/Uniquify.scala b/src/main/scala/firrtl/passes/Uniquify.scala
index 661dbf4e..79954254 100644
--- a/src/main/scala/firrtl/passes/Uniquify.scala
+++ b/src/main/scala/firrtl/passes/Uniquify.scala
@@ -109,7 +109,7 @@ object Uniquify extends Transform {
}
recUniquifyNames(t, namespace) match {
case tx: BundleType => tx
- case tx => throwInternalError(Some(s"uniquifyNames: shouldn't be here - $tx"))
+ case tx => throwInternalError(s"uniquifyNames: shouldn't be here - $tx")
}
}
diff --git a/src/main/scala/firrtl/passes/ZeroWidth.scala b/src/main/scala/firrtl/passes/ZeroWidth.scala
index 32b0b833..5b61c373 100644
--- a/src/main/scala/firrtl/passes/ZeroWidth.scala
+++ b/src/main/scala/firrtl/passes/ZeroWidth.scala
@@ -7,7 +7,6 @@ import firrtl.PrimOps._
import firrtl.ir._
import firrtl._
import firrtl.Mappers._
-import firrtl.Utils.throwInternalError
object ZeroWidth extends Transform {
diff --git a/src/main/scala/firrtl/passes/clocklist/ClockList.scala b/src/main/scala/firrtl/passes/clocklist/ClockList.scala
index fcc3cd5e..43583726 100644
--- a/src/main/scala/firrtl/passes/clocklist/ClockList.scala
+++ b/src/main/scala/firrtl/passes/clocklist/ClockList.scala
@@ -44,7 +44,7 @@ class ClockList(top: String, writer: Writer) extends Pass {
val modulesToInline = (c.modules.collect { case Module(_, n, _, _) if n != top => ModuleName(n, CircuitName(c.main)) }).toSet
val inlineTransform = new InlineInstances
val inlinedCircuit = inlineTransform.run(onlyClockCircuit, modulesToInline, Set(), Seq()).circuit
- val topModule = inlinedCircuit.modules.find(_.name == top).getOrElse(throwInternalError(Some("no top module")))
+ val topModule = inlinedCircuit.modules.find(_.name == top).getOrElse(throwInternalError("no top module"))
// Build a hashmap of connections to use for getOrigins
val connects = getConnects(topModule)
diff --git a/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala b/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
index 5ac9e63e..42b7fb21 100644
--- a/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
+++ b/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
@@ -214,7 +214,7 @@ class ReplaceMemMacros(writer: ConfWriter) extends Transform {
val pins = pannos match {
case Seq() => Nil
case Seq(PinAnnotation(pins)) => pins
- case _ => throwInternalError(Some(s"execute: getMyAnnotations - ${getMyAnnotations(state)}"))
+ case _ => throwInternalError(s"execute: getMyAnnotations - ${getMyAnnotations(state)}")
}
val annos = pins.foldLeft(Seq[Annotation]()) { (seq, pin) =>
seq ++ memMods.collect {