diff options
| author | Jack Koenig | 2021-01-19 20:19:08 -0800 |
|---|---|---|
| committer | GitHub | 2021-01-20 04:19:08 +0000 |
| commit | 031fe1382660867750e6eeebea5665c137dbccbe (patch) | |
| tree | cc65ca17a57fe093a73a5c25059f42cd22332a76 /src/main/scala/firrtl/passes/clocklist | |
| parent | 698a9dca52f819aca6309e3b03f2420a71bc89a6 (diff) | |
Cleanup some warnings (#2032)
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Diffstat (limited to 'src/main/scala/firrtl/passes/clocklist')
| -rw-r--r-- | src/main/scala/firrtl/passes/clocklist/RemoveAllButClocks.scala | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/passes/clocklist/RemoveAllButClocks.scala b/src/main/scala/firrtl/passes/clocklist/RemoveAllButClocks.scala index 9ad653cf..671a08b9 100644 --- a/src/main/scala/firrtl/passes/clocklist/RemoveAllButClocks.scala +++ b/src/main/scala/firrtl/passes/clocklist/RemoveAllButClocks.scala @@ -16,7 +16,6 @@ object RemoveAllButClocks extends Pass { case DefWire(i, n, ClockType) => s case DefNode(i, n, value) if value.tpe == ClockType => s case Connect(i, l, r) if l.tpe == ClockType => s - case sx: WDefInstance => sx case sx: DefInstance => sx case sx: Block => sx case sx: Conditionally => sx |