diff options
| author | azidar | 2015-04-09 16:57:00 -0700 |
|---|---|---|
| committer | azidar | 2015-04-09 16:57:00 -0700 |
| commit | a604e0789a85d8b3c5d6def2f9860047f479b68a (patch) | |
| tree | ff2890d273f30155c52b610824a3ea632f2c12c6 /notes | |
| parent | 16b9cb55c7d3e546af7eee3528079c9ac9bb530b (diff) | |
Added more 'fake' tests. infer-widths now collects constraints
Diffstat (limited to 'notes')
| -rw-r--r-- | notes/chisel.04.06.15.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/notes/chisel.04.06.15.txt b/notes/chisel.04.06.15.txt index 67f80aa5..5e509ed2 100644 --- a/notes/chisel.04.06.15.txt +++ b/notes/chisel.04.06.15.txt @@ -9,7 +9,7 @@ mem m : { tag : UInt<10> data : UInt<128> }[32] accessor w = m[i] == Low FIRRTL == -mem m : { tag : UInt<10> data : UInt<128> }[32] +mem m : { tag : UInt<10>[32] data : UInt<128>[32] } wire w#tag : UInt<10> wire w#data : UInt<128> WritePort(m.tag,i,en*) := w#tag |