From a604e0789a85d8b3c5d6def2f9860047f479b68a Mon Sep 17 00:00:00 2001
From: azidar
Date: Thu, 9 Apr 2015 16:57:00 -0700
Subject: Added more 'fake' tests. infer-widths now collects constraints

---
 notes/chisel.04.06.15.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'notes')

diff --git a/notes/chisel.04.06.15.txt b/notes/chisel.04.06.15.txt
index 67f80aa5..5e509ed2 100644
--- a/notes/chisel.04.06.15.txt
+++ b/notes/chisel.04.06.15.txt
@@ -9,7 +9,7 @@ mem m : { tag : UInt<10> data : UInt<128> }[32]
 accessor w = m[i]
 
 == Low FIRRTL ==
-mem m : { tag : UInt<10> data : UInt<128> }[32]
+mem m : { tag : UInt<10>[32] data : UInt<128>[32] }
 wire w#tag : UInt<10>
 wire w#data : UInt<128>
 WritePort(m.tag,i,en*) := w#tag
-- 
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