diff options
| author | azidar | 2015-07-31 17:27:38 -0700 |
|---|---|---|
| committer | azidar | 2015-07-31 17:27:38 -0700 |
| commit | fb625a03237a2ec094778d8e8c0935d5b8e2c715 (patch) | |
| tree | 6e01d8f789801429b4ad29f597b68eca2fa5c391 | |
| parent | c39fec5264d0b6dccf73796cea6edeb8b5e85ee0 (diff) | |
Reading from output ports no longer causes errors
| -rw-r--r-- | src/main/stanza/errors.stanza | 2 | ||||
| -rw-r--r-- | test/errors/gender/BulkWrong.fir | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/main/stanza/errors.stanza b/src/main/stanza/errors.stanza index 924eba2c..a008a25b 100644 --- a/src/main/stanza/errors.stanza +++ b/src/main/stanza/errors.stanza @@ -695,7 +695,7 @@ defn InferDirection (info:FileInfo,name:Symbol) : defn dir-to-gender (d:PortDirection) -> Gender : switch {_ == d} : INPUT : MALE - OUTPUT : FEMALE + OUTPUT : BI-GENDER defn gender (s:DefAccessor) -> Gender : switch {_ == acc-dir(s)} : diff --git a/test/errors/gender/BulkWrong.fir b/test/errors/gender/BulkWrong.fir index 13534385..632dd709 100644 --- a/test/errors/gender/BulkWrong.fir +++ b/test/errors/gender/BulkWrong.fir @@ -6,7 +6,9 @@ circuit BTB : input clk : Clock input reset : UInt<1> input req : {valid : UInt<1>, bits : {addr : UInt<39>}} + output r : UInt<1> wire x : {valid : UInt<1>, bits : {addr : UInt<39>}} req <> x + x.valid := r |