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authorazidar2015-04-21 09:50:49 -0700
committerazidar2015-04-21 09:50:49 -0700
commitf6d851cf2a7ebcd08cf324a3c504125de8e2c797 (patch)
treea117322a8d4be1f26b077122fe717033140f9ca8
parentfe2b96f8bbb5ed8deff6cbc8b377087b53d0c4d2 (diff)
Updated Todo
-rw-r--r--TODO13
1 files changed, 9 insertions, 4 deletions
diff --git a/TODO b/TODO
index 46ee3536..6b1849f1 100644
--- a/TODO
+++ b/TODO
@@ -2,12 +2,15 @@
========== ADAM's BIG ASS TODO LIST ============
================================================
-Important things:
+======== Current Tasks ========
+on-reset
+Parser
+ Error if incorrectly assign stuff, like use = instead of :=
+ Update parser and update tests
======== Update Core ==========
-Change all primops to be strict on data widths
-Update parser and update tests
on-reset
+Change all primops to be strict on data widths
Add source locaters
Add Unit Tests for each pass
@@ -39,7 +42,6 @@ naming for split nodes
subword accesses
annotation system
zero-width wires
-on-reset
expanding mems (consider changing defmem to be size, and element type)
Make instances always male, flip the bundles on declaration
Multi-streams for print statements/asserts (Jack)
@@ -72,6 +74,9 @@ Bounds checks for accessors
Overflow checks for add/add-wrap
Check combinational
Fast C++ where wires/register/instances are predicated
+Verilog backend - put stuff in posedge clock, not assign statements, for speedup
+Annotate mems with location stuff
+Coverage tests, such as statespace or specific instances (like asserts, sort of)
======== FIRRTL++ =========
Variable size FIFOs