diff options
| author | azidar | 2015-05-27 15:43:15 -0700 |
|---|---|---|
| committer | azidar | 2015-05-27 15:43:15 -0700 |
| commit | a2a48576534f87b28566504bb1e0c7faa493f463 (patch) | |
| tree | 9fd3ce5825922c50c38507a1b0fc1e070bb9a481 | |
| parent | cf80ff9c83c2fedd42ec186a3e342520c89f91ab (diff) | |
Added external modules. Switched lower firrtl back to wire r; r := Register, instead of using nodes. Added a renaming pass for different backends. This will likely get deprecated, as a more robust name mangling scheme could be needed
23 files changed, 412 insertions, 3564 deletions
@@ -4,17 +4,18 @@ ======== Current Tasks ======== SeqMem -BlackBoxes -Scaling move width inference earlier Temp elimination needs to count # uses Declared references needs to understand scope <= check in high form check Check for recursively defined instances Names in bundles must be unique Fix reset scope +Fix firrtl-gen so it is a relative pass, not global state Add Unit Tests for each pass Check after each pass write test that checks instance types are correctly lowered +Scaling +Do name-mangling differently, use _xEF or something like that ======== Verilog Backend Notes ======== * 1) Emit module. No Parameters. Include clk and reset signals @@ -32,7 +33,6 @@ Notes: WritePorts? ======== Update Core ========== -Add exmodule Add vptype Add readwriteport @@ -51,15 +51,11 @@ Width inference connect can connect from big to small?? ======== Other Passes ======== -; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s -; CHECK: Done! - constant folding (partial eval) pass Get rid of unnecessary pads push pad into literal common subexpression elimination pass deadcode elimination -Eliminate skips ======== Consultations ======== Andrew: Way to keep Array information for backends to avoid code explosion diff --git a/src/main/stanza/compilers.stanza b/src/main/stanza/compilers.stanza index 762ed9a8..efa8c992 100644 --- a/src/main/stanza/compilers.stanza +++ b/src/main/stanza/compilers.stanza @@ -12,7 +12,7 @@ public defstruct StandardFlo <: Compiler : file: String with: (as-method => true) public defmethod passes (c:StandardFlo) -> List<Pass> : to-list $ [ - CheckHighForm() + CheckHighForm(expand-delin) TempElimination() ToWorkingIR() MakeExplicitReset() @@ -31,6 +31,9 @@ public defmethod passes (c:StandardFlo) -> List<Pass> : Inline() SplitExp() ToRealIR() + SpecialRename(`#,`_) + SpecialRename(`$,`::) + CheckHighForm(`::) Flo(file(c)) ] @@ -38,7 +41,7 @@ public defstruct StandardVerilog <: Compiler : file: String with: (as-method => true) public defmethod passes (c:StandardVerilog) -> List<Pass> : to-list $ [ - CheckHighForm() + CheckHighForm(expand-delin) TempElimination() ToWorkingIR() MakeExplicitReset() @@ -53,9 +56,9 @@ public defmethod passes (c:StandardVerilog) -> List<Pass> : ExpandIndexedConnects() ExpandWhens() InferWidths() - ;Inline() SplitExp() ToRealIR() + SpecialRename(`#,`_) Verilog(file(c)) ] diff --git a/src/main/stanza/errors.stanza b/src/main/stanza/errors.stanza index e8b00087..0795a2a9 100644 --- a/src/main/stanza/errors.stanza +++ b/src/main/stanza/errors.stanza @@ -46,8 +46,9 @@ defpackage firrtl/errors : ; * Width sizes are positive ; * Primops have the correct number of arguments -public defstruct CheckHighForm <: Pass -public defmethod pass (b:CheckHighForm) -> (Circuit -> Circuit) : check-high-form +public defstruct CheckHighForm <: Pass : + sym : Symbol +public defmethod pass (b:CheckHighForm) -> (Circuit -> Circuit) : check-high-form{_,sym(b)} public defmethod name (b:CheckHighForm) -> String : "High Form Check" public defmethod short-name (b:CheckHighForm) -> String : "high-form-check" @@ -132,26 +133,25 @@ defn contains?<?T> (c:?T,cs:Streamable<?T>) -> True|False : if x == c : myret(true) false -defn is-prefix? (s:Symbol,v:Vector<Symbol>) -> Symbol|False : +defn is-prefix? (s:Symbol,v:Vector<Symbol>,sym:Symbol) -> Symbol|False : + defn is-prefix? (s1:Symbol,s2:Symbol) -> True|False : + var is? = true + val s1* = to-string(s1) + val s2* = to-string(s2) + for (x in s1*, y in s2*) do : + if x != y : is? = false + if length(s1*) > length(s2*) : + if s1*[length(s2*)] != to-string(sym)[0] : is? = false + if length(s1*) < length(s2*) : + if s2*[length(s1*)] != to-string(sym)[0] : is? = false + if length(s1*) == length(s2*) : + is? = false + is? label<Symbol|False> myret : for x in v do : if is-prefix?(x,s) : myret(x) false -defn is-prefix? (s1:Symbol,s2:Symbol) -> True|False : - var is? = true - val s1* = to-string(s1) - val s2* = to-string(s2) - for (x in s1*, y in s2*) do : - if x != y : is? = false - if length(s1*) > length(s2*) : - if s1*[length(s2*)] != '$' : is? = false - if length(s1*) < length(s2*) : - if s2*[length(s1*)] != '$' : is? = false - if length(s1*) == length(s2*) : - is? = false - is? - defn check-high-form-primop (e:DoPrim, errors:Vector<PassException>,info:FileInfo) -> False : defn correct-num (ne:Int|False,nc:Int) -> False : if not (ne typeof False) : @@ -196,7 +196,7 @@ defn check-high-form-primop (e:DoPrim, errors:Vector<PassException>,info:FileInf BITS-SELECT-OP : correct-num(1,2) ;--------------- Check High Form Pass ------------------- -public defn check-high-form (c:Circuit) -> Circuit : +public defn check-high-form (c:Circuit,sym:Symbol) -> Circuit : val errors = Vector<PassException>() defn check-valid-loc (info:FileInfo,e:Expression) -> False : @@ -244,7 +244,7 @@ public defn check-high-form (c:Circuit) -> Circuit : defn check-high-form-s (s:Stmt,names:Vector<Symbol>) -> Stmt : defn check-name (info:FileInfo,name:Symbol) -> False : if contains?(name,names) : add(errors,NotUnique(info,name)) - val prefix = is-prefix?(name,names) + val prefix = is-prefix?(name,names,sym) if prefix typeof Symbol : add(errors,IsPrefix(info,name,prefix as Symbol)) map(check-high-form-t{info(s),_:Type},s) @@ -297,7 +297,9 @@ public defn check-high-form (c:Circuit) -> Circuit : add(names,`reset) - check-high-form-s(body(m),names) + match(m) : + (m:ExModule) : false + (m:InModule) : check-high-form-s(body(m),names) false var number-top-m = 0 @@ -389,7 +391,9 @@ public defn check-kinds (c:Circuit) -> Circuit : do(check-kinds-s,s) for m in modules(c) do : - check-kinds-s(body(m)) + match(m) : + (m:ExModule) : false + (m:InModule) : check-kinds-s(body(m)) throw(PassExceptions(errors)) when not empty?(errors) c @@ -580,7 +584,9 @@ public defn check-types (c:Circuit) -> Circuit : s }() for m in modules(c) do : - check-types-s(body(m)) + match(m) : + (m:ExModule) : false + (m:InModule) : check-types-s(body(m)) throw(PassExceptions(errors)) when not empty?(errors) c @@ -682,6 +688,9 @@ public defn check-genders (c:Circuit) -> Circuit : val genders = HashTable<Symbol,Gender>(symbol-hash) for p in ports(m) do : genders[name(p)] = dir-to-gender(direction(p)) - check-genders-s(body(m),genders) + match(m) : + (m:ExModule) : false + (m:InModule) : check-genders-s(body(m),genders) throw(PassExceptions(errors)) when not empty?(errors) c + diff --git a/src/main/stanza/firrtl-ir.stanza b/src/main/stanza/firrtl-ir.stanza index e13e7655..eef48b11 100644 --- a/src/main/stanza/firrtl-ir.stanza +++ b/src/main/stanza/firrtl-ir.stanza @@ -5,6 +5,9 @@ defpackage firrtl/ir2 : public defmulti info! (x:?) -> FileInfo public defmethod info! (x:?) : FileInfo() +public val expand-delin = `$ +public val gen-delin = `# + public definterface Direction public val INPUT = new Direction public val OUTPUT = new Direction @@ -167,12 +170,21 @@ public defstruct Port : direction: Direction type: Type -public defstruct Module : +public definterface Module +public defmulti name (m:Module) -> Symbol +public defmulti ports (m:Module) -> List<Port> + +public defstruct InModule <: Module : info: FileInfo - name: Symbol - ports: List<Port> + name: Symbol with: (as-method => true) + ports: List<Port> with: (as-method => true) body: Stmt +public defstruct ExModule <: Module : + info: FileInfo + name: Symbol with: (as-method => true) + ports: List<Port> with: (as-method => true) + public defstruct Circuit : info: FileInfo modules: List<Module> diff --git a/src/main/stanza/flo.stanza b/src/main/stanza/flo.stanza index e870d7ed..0f1f4eeb 100644 --- a/src/main/stanza/flo.stanza +++ b/src/main/stanza/flo.stanza @@ -32,15 +32,15 @@ defn pad-widths-e (desired:Int,e:Expression) -> Expression : if i > desired : DoPrim(BITS-SELECT-OP,list(e),list(0,desired),set-width(desired,type(e))) else if i == desired : e* - else : DoPrim(PAD-OP,list(e*),list(),set-width(desired,type(e*))) + else : DoPrim(PAD-OP,list(e*),list(desired),set-width(desired,type(e*))) else : e - (e:WRef|WSubfield|WIndex) : + (e:WRef|WSubfield|WIndex|Register|ReadPort) : println(e) val i = int-width!(type(e)) if i > desired : DoPrim(BITS-SELECT-OP,list(e),list(0,desired),set-width(desired,type(e))) else if i == desired : e - else : DoPrim(PAD-OP,list(e),list(),set-width(desired,type(e))) + else : DoPrim(PAD-OP,list(e),list(desired),set-width(desired,type(e))) (e:UIntValue) : val i = int-width!(type(e)) if i > desired : @@ -64,7 +64,9 @@ defn pad-widths-s (s:Stmt) -> Stmt : public defn pad-widths (c:Circuit) -> Circuit : Circuit{info(c),_,main(c)} $ for m in modules(c) map : - Module(info(m),name(m),ports(m),pad-widths-s(body(m))) + match(m) : + (m:ExModule) : error("Cannot use flo backend with external modules") + (m:InModule) : InModule(info(m),name(m),ports(m),pad-widths-s(body(m))) ;============= Flo Backend ================ @@ -224,7 +226,7 @@ defn emit-s (s:Stmt, v:List<Symbol>, top:Symbol) : error("Unknown Connect") (s) : s -defn emit-module (m:Module) : +defn emit-module (m:InModule) : val v = Vector<Symbol>() for port in ports(m) do : if name(port) ==`reset : @@ -236,6 +238,6 @@ defn emit-module (m:Module) : public defn emit-flo (file:String, c:Circuit) : with-output-file{file, _} $ fn () : - emit-module(modules(c)[0]) + emit-module(modules(c)[0] as InModule) false c diff --git a/src/main/stanza/ir-parser.stanza b/src/main/stanza/ir-parser.stanza index 2f7b3771..db3324e4 100644 --- a/src/main/stanza/ir-parser.stanza +++ b/src/main/stanza/ir-parser.stanza @@ -151,9 +151,15 @@ defsyntax firrtl : module = (module ?name:#id! #:! (?ps:#port ... ?cs:#stmt ... ?rest ...)) : if not empty?(rest) : FPE(rest, "Expected a statement here.") - Module(first-info(form),name, ps, Begin(cs)) + InModule(first-info(form),name, ps, Begin(cs)) + module = (exmodule ?name:#id! #:! (?ps:#port ... ?rest ...)) : + if not empty?(rest) : + FPE(rest, "Expected a port here.") + ExModule(first-info(form),name, ps) module != (module) : FPE(form, "Invalid syntax for module definition.") + module != (exmodule) : + FPE(form, "Invalid syntax for exmodule definition.") defrule port : port = (input ?name:#id! #:! ?type:#type!) : Port(first-info(form),name, INPUT, type) diff --git a/src/main/stanza/ir-utils.stanza b/src/main/stanza/ir-utils.stanza index 28cdd136..4271edca 100644 --- a/src/main/stanza/ir-utils.stanza +++ b/src/main/stanza/ir-utils.stanza @@ -18,6 +18,10 @@ public defn firrtl-gensym (s:Symbol) -> Symbol : public defn firrtl-gensym () -> Symbol : firrtl-gensym(`gen) + +;public defn get-sym-hash (m:Circuit) -> HashTable<Symbol,Int> : + ;public defn get-sym-hash (c:Circuit) -> HashTable<Symbol,Int> : + ;============== Exceptions ===================== @@ -183,7 +187,7 @@ defmethod print (o:OutputStream, p:Port) : print-all(o, [direction(p) " " name(p) " : " type(p)]) print-debug(o,p) -defmethod print (o:OutputStream, m:Module) : +defmethod print (o:OutputStream, m:InModule) : print-all(o, ["module " name(m) " :"]) print-debug(o,m) print(o,"\n") @@ -192,6 +196,14 @@ defmethod print (o:OutputStream, m:Module) : println(io,p) print(io,body(m)) +defmethod print (o:OutputStream, m:ExModule) : + print-all(o, ["exmodule " name(m) " :"]) + print-debug(o,m) + print(o,"\n") + val io = IndentedStream(o, 3) + for p in ports(m) do : + println(io,p) + defmethod print (o:OutputStream, c:Circuit) : print-all(o, ["circuit " main(c) " :"]) print-debug(o,c) diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza index 96225064..3e2a058b 100644 --- a/src/main/stanza/passes.stanza +++ b/src/main/stanza/passes.stanza @@ -9,7 +9,7 @@ defpackage firrtl/passes : ;============== Pass List ================ public val standard-passes = to-list $ [ - CheckHighForm() + CheckHighForm(expand-delin) TempElimination() ToWorkingIR() MakeExplicitReset() @@ -309,7 +309,9 @@ defn temp-elimination (c:Circuit) : Circuit(info(c),modules*, main(c)) where : val modules* = for m in modules(c) map : - Module(info(m),name(m), ports(m), temp-elim-s(body(m))) + match(m) : + (m:InModule) : InModule(info(m),name(m), ports(m), temp-elim-s(body(m))) + (m:ExModule) : m ;================= Bring to Working IR ======================== ; Returns a new Circuit with Refs, Subfields, Indexes and DefAccessors @@ -335,7 +337,9 @@ defn to-working-ir (c:Circuit) : Circuit(info(c),modules*, main(c)) where : val modules* = for m in modules(c) map : - Module(info(m),name(m), ports(m), to-stmt(body(m))) + match(m) : + (m:InModule) : InModule(info(m),name(m), ports(m), to-stmt(body(m))) + (m:ExModule) : m ;=============== MAKE EXPLICIT RESET ======================= ; All modules have an implicit reset signal - however, the @@ -372,8 +376,11 @@ defn make-explicit-reset (c:Circuit) : var ports! = ports(m) if not contains?(explicit-reset,name(m)) : ports! = append(ports(m),list(Port(FileInfo(),`reset,INPUT,UIntType(IntWidth(1))))) - val body! = route-reset(body(m)) - Module(info(m),name(m),ports!,body!) + match(m) : + (m:InModule) : + val body! = route-reset(body(m)) + InModule(info(m),name(m),ports!,body!) + (m:ExModule) : ExModule(info(m),name(m),ports!) defn make-explicit-reset (m:Module, c:Circuit) -> Module : val explicit-reset = find-explicit(c) @@ -422,15 +429,20 @@ defn resolve-kinds (c:Circuit) : kinds[name(m)] = ModuleKind() for p in ports(m) do : kinds[name(p)] = PortKind() - find-stmt(body(m)) + match(m) : + (m:InModule) : find-stmt(body(m)) + (m:ExModule) : false defn resolve-kinds (m:Module, c:Circuit) -> Module : val kinds = HashTable<Symbol,Kind>(symbol-hash) for m in modules(c) do : kinds[name(m)] = ModuleKind() find(m,kinds) - val body! = resolve(body(m),kinds) - Module(info(m),name(m),ports(m),body!) + match(m) : + (m:InModule) : + val body! = resolve(body(m),kinds) + InModule(info(m),name(m),ports(m),body!) + (m:ExModule) : ExModule(info(m),name(m),ports(m)) Circuit(info(c),modules*, main(c)) where : val modules* = @@ -516,8 +528,11 @@ defn infer-types (m:Module, l:List<KeyValue<Symbol,Type>>) -> Module : for p in ports(m) map : name(p) => type(p) println-all-debug(append(ptypes,l)) - val [s,l*] = infer-types(body(m),append(ptypes, l)) - Module(info(m),name(m),ports(m),s) + match(m) : + (m:InModule) : + val [s,l*] = infer-types(body(m),append(ptypes, l)) + InModule(info(m),name(m),ports(m),s) + (m:ExModule) : m defn infer-types (c:Circuit) -> Circuit : val l = @@ -570,8 +585,11 @@ defn resolve-genders (c:Circuit) : var done? = true defn resolve-iter (m:Module) -> Module : - val body* = resolve-stmt(body(m)) - Module(info(m),name(m),ports(m),body*) + match(m) : + (m:InModule) : + val body* = resolve-stmt(body(m)) + InModule(info(m),name(m),ports(m),body*) + (m:ExModule) : m defn get-gender (n:Symbol,g:Gender) -> Gender : defn force-gender (n:Symbol,g:Gender) -> Gender : @@ -703,7 +721,9 @@ defn expand-accessors (c:Circuit) : Circuit(info(c),modules*, main(c)) where : val modules* = for m in modules(c) map : - Module(info(m),name(m),ports(m),expand-stmt(body(m))) + match(m) : + (m:InModule) : InModule(info(m),name(m),ports(m),expand-stmt(body(m))) + (m:ExModule) : m ;;=============== LOWERING TO GROUND TYPES ============================= ; All non-ground (elevated) types (Vectors, Bundles) are expanded out to @@ -750,7 +770,7 @@ defn index-of-elem (t:BundleType, s:Symbol) -> Int : error("Shouldn't be here") defn generate-entry (n:Symbol,t:Type) -> List<NTF> : - defn uniquify (n*:Symbol) -> Symbol : symbol-join([n "_" n*]) + defn uniquify (n*:Symbol) -> Symbol : symbol-join([n expand-delin n*]) match(t) : (t:BundleType) : for f in fields(t) map-append : @@ -936,9 +956,13 @@ defn lower (body:Stmt) -> Stmt : lower-stmt(body) defn lower-module (c:Circuit,m:Module) -> Module : - Module(info(m),name(m),ports*,body*) where : - val body* = lower(body(m)) - val ports* = lower-ports(ports(m)) + val ports* = lower-ports(ports(m)) + match(m) : + (m:InModule) : + val body* = lower(body(m)) + InModule(info(m),name(m),ports*,body*) + (m:ExModule) : + ExModule(info(m),name(m),ports*) defn lower-to-ground (c:Circuit) -> Circuit : Circuit(info(c),modules*, main(c)) where : @@ -961,15 +985,15 @@ defn expand-connect-indexed-stmt (s: Stmt) -> Stmt : DoPrim(EQUAL-OP,list(e1,e2),List(),UIntType(UnknownWidth())) defn get-name (e:Expression) -> Symbol : match(e) : - (e:WRef) : symbol-join([name(e) `__]) - (e:WSubfield) : symbol-join([get-name(exp(e)) `. name(e) `__]) - (e:WIndex) : symbol-join([get-name(exp(e)) `. to-symbol(value(e)) `__]) + (e:WRef) : symbol-join([name(e) gen-delin]) + (e:WSubfield) : symbol-join([get-name(exp(e)) `. name(e) gen-delin]) + (e:WIndex) : symbol-join([get-name(exp(e)) `. to-symbol(value(e)) gen-delin]) (e) : `T match(s) : (s:ConnectToIndexed) : Begin $ if length(locs(s)) == 0 : list(EmptyStmt()) else : - val ref = WRef(firrtl-gensym(get-name(exp(s))),type(index(s)),NodeKind(),UNKNOWN-GENDER) + val ref = WRef(firrtl-gensym(get-name(index(s))),type(index(s)),NodeKind(),UNKNOWN-GENDER) append( list(DefNode(info(s),name(ref),index(s))) to-list $ @@ -983,7 +1007,7 @@ defn expand-connect-indexed-stmt (s: Stmt) -> Stmt : (s:ConnectFromIndexed) : Begin $ if length(exps(s)) == 0 : list(EmptyStmt()) else : - val ref = WRef(firrtl-gensym(get-name(loc(s))),type(index(s)),NodeKind(),UNKNOWN-GENDER) + val ref = WRef(firrtl-gensym(get-name(index(s))),type(index(s)),NodeKind(),UNKNOWN-GENDER) append( list(Connect(info(s),loc(s),head(exps(s))),DefNode(info(s),name(ref),index(s))) to-list $ @@ -997,7 +1021,9 @@ defn expand-connect-indexed-stmt (s: Stmt) -> Stmt : (s) : map(expand-connect-indexed-stmt,s) defn expand-connect-indexed (m: Module) -> Module : - Module(info(m),name(m),ports(m),expand-connect-indexed-stmt(body(m))) + match(m) : + (m:InModule) : InModule(info(m),name(m),ports(m),expand-connect-indexed-stmt(body(m))) + (m:ExModule) : m defn expand-connect-indexed (c: Circuit) -> Circuit : Circuit(info(c),modules*, main(c)) where : @@ -1201,63 +1227,49 @@ defn expand-whens (ports:List<Port>, table:HashTable<Symbol,SymbolicValue>,cons: for p in ports do : if direction(p) == OUTPUT : val ref = WRef(name(p),type(p),PortKind(),FEMALE) - add{cons,_} $ - if has-nul?(table[name(p)]) : - println("Uninitialized: ~" % [to-string(name(p))]);TODO actually collect error - EmptyStmt() - else : Connect(FileInfo(),ref,to-exp(table[name(p)]) as Expression) + if has-nul?(table[name(p)]) : + println("Uninitialized: ~" % [to-string(name(p))]);TODO actually collect error + else : add{cons,_} $ Connect(FileInfo(),ref,to-exp(table[name(p)]) as Expression) defn expand-whens (s:Stmt, table:HashTable<Symbol,SymbolicValue>,decs:Vector<Stmt>,cons:Vector<Stmt>) -> Stmt : match(map(expand-whens{_,table,decs,cons},s)) : (s:DefNode|DefMemory) : add(decs,s) (s:DefWire) : add(decs,s) - add{cons,_} $ { - val ref = WRef(name(s),type(s),NodeKind(),FEMALE) - if has-nul?(table[name(s)]) : - println("Uninitialized: ~" % [to-string(name(s))]);TODO actually collect error - EmptyStmt() - else : Connect(info(s),ref,to-exp(table[name(s)]) as Expression) - }() + val ref = WRef(name(s),type(s),NodeKind(),FEMALE) + if has-nul?(table[name(s)]) : + println("Uninitialized: ~" % [to-string(name(s))]);TODO actually collect error + else : add{cons,_} $ Connect(info(s),ref,to-exp(table[name(s)]) as Expression) (s:DefRegister) : - ;add(decs,DefWire(info(s),name(s),type(s))) - ;add{cons,_} $ { - ; val ref = WRef(name(s),type(s),RegKind(),FEMALE) - ; val e = to-exp(table[name(s)]) - ; match(e) : - ; (e:False) : EmptyStmt() - ; (e:Expression) : Connect(info(s),ref,Register(type(s),e, to-exp(optimize $ get-write-enable(table[name(s)])) as Expression)) - ;}() val e = to-exp(table[name(s)]) - add{cons,_} $ { - match(e) : - (e:False) : EmptyStmt() - (e:Expression) : DefNode(info(s),name(s),Register(type(s),e,to-exp(optimize $ get-write-enable(table[name(s)])) as Expression)) - }() + match(e) : + (e:Expression) : + add{decs,_} $ DefWire(info(s),name(s),type(s)) + val ref = WRef(name(s),type(s),NodeKind(),FEMALE) + add{cons,_} $ Connect(info(s),ref,Register(type(s),e,to-exp(optimize $ get-write-enable(table[name(s)])) as Expression)) + (e:False) : false (s:WDefAccessor) : val t = type(type(source(s)) as VectorType) val n = name(s) - add{cons,_} $ { switch {_ == gender(s)} : MALE : - Begin $ list $ DefNode(info(s),n,ReadPort(source(s),index(s),t,get-read-enable(n,table))) + add{decs,_} $ DefWire(info(s),n,t) + val ref = WRef(n,t,WriteAccessorKind(),FEMALE) + add{cons,_} $ Connect(info(s),ref,ReadPort(source(s),index(s),t,get-read-enable(n,table))) FEMALE : add(decs,DefWire(info(s),n,t)) - val ref = WRef(n,t,WriteAccessorKind(),FEMALE) + val ref = WRef(n,t,WriteAccessorKind(),MALE) + val enable = (to-exp $ optimize $ get-write-enable(table[n])) as Expression + val wp = WritePort(source(s),index(s),t,enable as Expression) val e = to-exp(table[n]) - val s* = match(e) : + add{cons,_} $ Connect(info(s),wp,ref) + match(e) : (e:False) : println("Uninitialized: ~" % [to-string(n)]) ;TODO actually collect error - EmptyStmt() (e:Expression) : - Connect(info(s),ref,e) - val enable = (to-exp $ optimize $ get-write-enable(table[n])) as Expression - val wp = WritePort(source(s),index(s),t,enable as Expression) - Begin $ list(Connect(info(s),wp,ref),s*) - }() + add{cons,_} $ Connect(info(s),ref,e) (s:DefInstance) : add(decs,s) - add{cons,_} $ Begin $ for f in fields(type(module(s)) as BundleType) map : if flip(f) == REVERSE : val n = to-symbol("~.~" % [name(s),name(f)]) ; only on inputs @@ -1267,9 +1279,7 @@ defn expand-whens (s:Stmt, table:HashTable<Symbol,SymbolicValue>,decs:Vector<Stm val sref = WSubfield(ref,f,bundle-field-type(type(module(s)),f),FEMALE) if has-nul?(table[n]) : println("Uninitialized: ~" % [to-string(n)]);TODO actually collect error - EmptyStmt() - else : Connect(info(s),sref,to-exp(table[n]) as Expression) - else : EmptyStmt() + else : add{cons,_} $ Connect(info(s),sref,to-exp(table[n]) as Expression) (s:Connect|Conditionally|OnReset|Begin|EmptyStmt) : false s @@ -1375,34 +1385,37 @@ defn build-tables (s:Stmt, (s:DefMemory|DefNode|EmptyStmt) : false defn expand-whens (m:Module) -> Module : - val assign = HashTable<Symbol,SymbolicValue>(symbol-hash) - val resets = HashTable<Symbol,SymbolicValue>(symbol-hash) - val flattn = HashTable<Symbol,True|False>(symbol-hash) - - for p in ports(m) do : - if direction(p) == OUTPUT : - assign[name(p)] = SVNul() - flattn[name(p)] = false - - build-tables(body(m),assign,resets,flattn) - for x in assign do : assign[key(x)] = optimize(value(x)) - for x in resets do : resets[key(x)] = optimize(value(x)) - ;val enables = get-enables(assign,kinds) - ;for x in enables do : enables[key(x)] = optimize(value(x)) - - println-debug("====== Assigns ======") - for x in assign do : println-debug(x) - println-debug("====== Resets ======") - for x in resets do : println-debug(x) - - val table = merge-resets(assign,resets) - println-debug("====== Table ======") - for x in table do : println-debug(x) - val decs = Vector<Stmt>() - val cons = Vector<Stmt>() - expand-whens(ports(m),table,cons) - expand-whens(body(m),table,decs,cons) - Module(info(m),name(m),ports(m),Begin(append(to-list(decs),to-list(cons)))) + match(m) : + (m:ExModule) : m + (m:InModule) : + val assign = HashTable<Symbol,SymbolicValue>(symbol-hash) + val resets = HashTable<Symbol,SymbolicValue>(symbol-hash) + val flattn = HashTable<Symbol,True|False>(symbol-hash) + + for p in ports(m) do : + if direction(p) == OUTPUT : + assign[name(p)] = SVNul() + flattn[name(p)] = false + + build-tables(body(m),assign,resets,flattn) + for x in assign do : assign[key(x)] = optimize(value(x)) + for x in resets do : resets[key(x)] = optimize(value(x)) + ;val enables = get-enables(assign,kinds) + ;for x in enables do : enables[key(x)] = optimize(value(x)) + + println-debug("====== Assigns ======") + for x in assign do : println-debug(x) + println-debug("====== Resets ======") + for x in resets do : println-debug(x) + + val table = merge-resets(assign,resets) + println-debug("====== Table ======") + for x in table do : println-debug(x) + val decs = Vector<Stmt>() + val cons = Vector<Stmt>() + expand-whens(ports(m),table,cons) + expand-whens(body(m),table,decs,cons) + InModule(info(m),name(m),ports(m),Begin(append(to-list(decs),to-list(cons)))) defn expand-whens (c:Circuit) -> Circuit : Circuit(info(c),modules*, main(c)) where : @@ -1680,7 +1693,9 @@ defn gen-constraints (m:Module, h:HashTable<Symbol,Type>, v:Vector<WGeq>) -> Mod val ports* = for p in ports(m) map : Port(info(p),name(p),direction(p),h[name(p)]) - Module(info(m),name(m),ports*,gen-constraints-s(body(m))) + match(m) : + (m:ExModule) : ExModule(info(m),name(m),ports*) + (m:InModule) : InModule(info(m),name(m),ports*,gen-constraints-s(body(m))) defn build-environment (c:Circuit,m:Module,h:HashTable<Symbol,Type>) -> HashTable<Symbol,Type> : defn build-environment (s:Stmt) -> False : @@ -1693,7 +1708,10 @@ defn build-environment (c:Circuit,m:Module,h:HashTable<Symbol,Type>) -> HashTabl do(build-environment,s) for p in ports(m) do : h[name(p)] = bundle-field-type(h[name(m)],name(p)) - build-environment(body(m)) + + match(m) : + (m:ExModule) : false + (m:InModule) : build-environment(body(m)) h defn reduce-var-widths (c:Circuit,h:HashTable<Symbol,Width>) -> Circuit : @@ -1734,9 +1752,12 @@ defn reduce-var-widths (c:Circuit,h:HashTable<Symbol,Width>) -> Circuit : w* val modules* = for m in modules(c) map : - Module{info(m),name(m),_,mapr(reduce-var-widths-w,body(m))} $ - for p in ports(m) map : - Port(info(p),name(p),direction(p),mapr(reduce-var-widths-w,type(p))) + val ports* = for p in ports(m) map : + Port(info(p),name(p),direction(p),mapr(reduce-var-widths-w,type(p))) + + match(m) : + (m:ExModule) : ExModule(info(m),name(m),ports*) + (m:InModule) : InModule(info(m),name(m),ports*,mapr(reduce-var-widths-w,body(m))) Circuit(info(c),modules*,main(c)) @@ -1786,7 +1807,7 @@ public defmethod name (b:Inline) -> String : "Inline Instances" public defmethod short-name (b:Inline) -> String : "inline-instances" defn inline-instances (c:Circuit) : - val h = HashTable<Symbol,Module>(symbol-hash) + val h = HashTable<Symbol,InModule>(symbol-hash) val h-s = HashTable<Symbol,Stmt>(symbol-hash) defn inline-inst (s:Stmt) -> Stmt : match(map(inline-inst,s)) : @@ -1809,17 +1830,17 @@ defn inline-instances (c:Circuit) : (e:WSubfield) : match(kind(exp(e) as WRef)) : (k:InstanceKind) : - WRef(symbol-join([name(exp(e) as WRef) "_" name(e)]),type(e),k,gender(e)) + WRef(symbol-join([name(exp(e) as WRef) expand-delin name(e)]),type(e),k,gender(e)) (k:MemKind) : e (e) : e - defn rename (ref:Symbol,n:Symbol) -> Symbol : symbol-join([n "_" ref]) + defn rename (ref:Symbol,n:Symbol) -> Symbol : symbol-join([n expand-delin ref]) defn rename-e (e:Expression,n:Symbol) -> Expression : match(map(rename-e{_,n},e)) : (e:WRef) : WRef(rename(name(e),n),type(e),kind(e),gender(e)) (e:WSubfield) : match(kind(exp(e) as WRef)) : (k:InstanceKind) : - WRef(symbol-join([name(exp(e) as WRef) "_" name(e)]),type(e),k,gender(e)) + WRef(symbol-join([name(exp(e) as WRef) expand-delin name(e)]),type(e),k,gender(e)) (k:MemKind) : e (e) : e defn rename-s (s:Stmt,n:Symbol) -> Stmt : @@ -1830,9 +1851,11 @@ defn inline-instances (c:Circuit) : (s:DefNode) : DefNode(info(s),rename(name(s),n),value(s)) (s) : s for m in modules(c) do : - h[name(m)] = m - val top = (for m in modules(c) find : name(m) == main(c)) as Module - Circuit(info(c),list(Module(info(top),name(top),ports(top),inline-inst(body(top)))),main(c)) + match(m) : + (m:ExModule) : error("Cannot inline with external modules") + (m:InModule) : h[name(m)] = m + val top = (for m in modules(c) find : name(m) == main(c)) as InModule + Circuit(info(c),list(InModule(info(top),name(top),ports(top),inline-inst(body(top)))),main(c)) ;================= Split Expressions ======================== @@ -1867,16 +1890,19 @@ defn split-exp (c:Circuit) : (e:DoPrim) : val n* = if n typeof False : firrtl-gensym(`T) - else : firrtl-gensym(symbol-join([n as Symbol `__])) + else : firrtl-gensym(symbol-join([n as Symbol gen-delin])) add(v,DefNode(info,n*,e)) WRef(n*,type(e),NodeKind(),UNKNOWN-GENDER) (e) : e Circuit{info(c),_,main(c)} $ for m in modules(c) map : - val v = Vector<Stmt>() - split-exp-s(body(m),v) - Module(info(m),name(m),ports(m),Begin(to-list(v))) + match(m) : + (m:InModule) : + val v = Vector<Stmt>() + split-exp-s(body(m),v) + InModule(info(m),name(m),ports(m),Begin(to-list(v))) + (m:ExModule) : m ;================= Bring to Real IR ======================== ; Returns a new Circuit with only real IR nodes. @@ -1902,5 +1928,60 @@ defn to-real-ir (c:Circuit) : Circuit(info(c),modules*, main(c)) where : val modules* = for m in modules(c) map : - Module(info(m),name(m), ports(m), to-stmt(body(m))) + match(m) : + (m:InModule) : InModule(info(m),name(m), ports(m), to-stmt(body(m))) + (m:ExModule) : m + +;================= Special Rename ======================== +; Returns a new Circuit with only real IR nodes. +public defstruct SpecialRename <: Pass : + original-sym : Symbol + new-sym : Symbol +public defmethod pass (b:SpecialRename) -> (Circuit -> Circuit) : special-rename{original-sym(b),new-sym(b),_:Circuit} +public defmethod name (b:SpecialRename) -> String : "Special Rename" +public defmethod short-name (b:SpecialRename) -> String : "special-rename" + +public defn special-rename (original-sym:Symbol,new-sym:Symbol,c:Circuit) : + defn rename (s:Symbol) -> Symbol : + val y = Vector<String>() + val os = to-string $ original-sym + val ns = to-string $ new-sym + defn rename (st:String) -> False : + if st == os : + add(y,ns) + else if length(st) <= length(os) : + add(y,st) + else : + if substring(st,0,length(os)) == os : + add(y,ns) + rename(substring(st,length(os),length(st))) + else : + add(y,substring(st,0,1)) + rename(substring(st,1,length(st))) + rename(to-string(s)) + to-symbol $ string-join $ to-list(y) + defn to-exp (e:Expression) -> Expression : + match(map(to-exp,e)) : + (e:Ref) : Ref(rename(name(e)), type(e)) + (e:Subfield) : Subfield(exp(e),rename(name(e)),type(e)) + (e) : e + defn to-stmt (s:Stmt) -> Stmt : + match(map(to-exp,s)) : + (s:DefWire) : DefWire(info(s),rename(name(s)),type(s)) + (s:DefRegister) : DefRegister(info(s),rename(name(s)),type(s)) + (s:DefInstance) : DefInstance(info(s),rename(name(s)),module(s)) + (s:DefMemory) : DefMemory(info(s),rename(name(s)),type(s)) + (s:DefNode) : DefNode(info(s),rename(name(s)),value(s)) + (s:DefAccessor) : DefAccessor(info(s),rename(name(s)),source(s),index(s)) + (s) : map(to-stmt,s) + + defn to-port (p:Port) -> Port : Port(info(p),rename(name(p)),direction(p),type(p)) + + Circuit(info(c),modules*, main(c)) where : + val modules* = + for m in modules(c) map : + match(m) : + (m:InModule) : InModule(info(m),name(m), map(to-port,ports(m)), to-stmt(body(m))) + (m:ExModule) : m + diff --git a/src/main/stanza/verilog.stanza b/src/main/stanza/verilog.stanza index 19472573..79bccefb 100644 --- a/src/main/stanza/verilog.stanza +++ b/src/main/stanza/verilog.stanza @@ -109,7 +109,20 @@ defn emit (e:Expression) -> String : v = concat(v, [" ^ " emit(x)]) v -defn emit-module (m:Module) : +defn emit-module (m:InModule) : + val h = Vector<Symbol>() + defn build-table (m:InModule) : + defn build-table (s:Stmt) -> Stmt : + match(map(build-table,s)) : + (s:Connect) : + match(exp(s)) : + (e:Register) : add(h,name(loc(s) as Ref)) + (e) : false + (s) : false + s + build-table(body(m)) + build-table(m) + val wires = Vector<Streamable>() val regs = Vector<Streamable>() val inits = Vector<Streamable>() @@ -120,13 +133,15 @@ defn emit-module (m:Module) : defn emit-s (s:Stmt) : match(map(remove-subfield,s)) : - (s:DefWire) : add(wires,["wire " get-width(type(s)) " " name(s) ";"]) + (s:DefWire) : + if contains?(to-list $ h, name(s)) : + add(regs,["reg " get-width(type(s)) " " name(s) ";"]) + else : + add(wires,["wire " get-width(type(s)) " " name(s) ";"]) (s:DefInstance) : inst-ports[name(s)] = Vector<Streamable>() insts[name(s)] = name(module(s) as Ref) for f in fields(type(module(s)) as BundleType) do : - ;val sf = value(s) as Subfield - ;val e = exp(sf) as Ref val n* = to-symbol $ string-join $ [name(s) "_" name(f)] add(wires,["wire " get-width(type(f)) " " n* ";"]) add(inst-ports[name(s)], ["." name(f) "( " n* " )"]) @@ -137,17 +152,6 @@ defn emit-module (m:Module) : add(inits,["for (initvar = 0; initvar < " size(vtype) "; initvar = initvar+1)"]) add(inits,[name(s) " = {" width!(type(vtype)) "{$random}};"]) (s:DefNode) : - if value(s) typeof Register : - val reg = value(s) as Register - add(regs,["reg " get-width(type(reg)) " " name(s) ";"]) - add(inits,[name(s) " = {" width!(type(reg)) "{$random}};"]) - add(updates,["if(" emit(enable(reg)) ") begin"]) - add(updates,[" " name(s) " <= " emit(value(reg)) ";"]) - add(updates,["end"]) - else if value(s) typeof ReadPort : - val rp = value(s) as ReadPort - add(assigns,["assign " name(s) " = " emit(mem(rp)) "[" emit(index(rp)) "];"]) - else : add(wires,["wire " get-width(type(value(s))) " " name(s) ";"]) add(assigns,["assign " name(s) " = " emit(value(s)) ";"]) (s:Begin) : do(emit-s, body(s)) @@ -158,7 +162,19 @@ defn emit-module (m:Module) : add(updates,[" " emit(mem(wp)) "[" emit(index(wp)) "] <= " emit(exp(s)) ";"]) add(updates,["end"]) else : - add(assigns,["assign " emit(loc(s)) " = " emit(exp(s)) ";"]) + if exp(s) typeof Register : + val n = name(loc(s) as Ref) + val reg = exp(s) as Register + add(inits,[n " = {" width!(type(reg)) "{$random}};"]) + add(updates,["if(" emit(enable(reg)) ") begin"]) + add(updates,[" " n " <= " emit(value(reg)) ";"]) + add(updates,["end"]) + else if exp(s) typeof ReadPort : + val n = name(loc(s) as Ref) + val rp = exp(s) as ReadPort + add(assigns,["assign " n " = " emit(mem(rp)) "[" emit(index(rp)) "];"]) + else : + add(assigns,["assign " emit(loc(s)) " = " emit(exp(s)) ";"]) (s) : s emit-s(body(m)) @@ -219,5 +235,8 @@ defn emit-module (m:Module) : public defn emit-verilog (file:String, c:Circuit) : with-output-file{file, _} $ fn () : for m in modules(c) do : - emit-module(m) + match(m) : + (m:InModule) : emit-module(m) + (m:ExModule) : false + c diff --git a/test/features/ExModule.fir b/test/features/ExModule.fir new file mode 100644 index 00000000..b47b14ab --- /dev/null +++ b/test/features/ExModule.fir @@ -0,0 +1,14 @@ +; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s +circuit Top : + module Top : + output z : UInt<4> + inst i of BlackBox + i.x := UInt(1) + i.y := UInt(2) + z := i.z + exmodule BlackBox : + input x : UInt<4> + input y : UInt<4> + output z : UInt<4> + +;CHECK: Done! diff --git a/test/passes/expand-connect-indexed/bundle-vecs.fir b/test/passes/expand-connect-indexed/bundle-vecs.fir index 901ab4e6..9d375087 100644 --- a/test/passes/expand-connect-indexed/bundle-vecs.fir +++ b/test/passes/expand-connect-indexed/bundle-vecs.fir @@ -7,23 +7,23 @@ circuit top : wire j : UInt wire a : { x : UInt<32>, flip y : UInt<32> }[2] - ; CHECK: wire a_0_x : UInt<32> - ; CHECK: wire a_0_y : UInt<32> - ; CHECK: wire a_1_x : UInt<32> - ; CHECK: wire a_1_y : UInt<32> + ; CHECK: wire a$0$x : UInt<32> + ; CHECK: wire a$0$y : UInt<32> + ; CHECK: wire a$1$x : UInt<32> + ; CHECK: wire a$1$y : UInt<32> accessor b = a[i] - ; CHECK: wire b_x : UInt<32> - ; CHECK: wire b_y : UInt<32> - ; CHECK: b_x := a_0_x - ; CHECK: node b_x__0 = i - ; CHECK: when eq(b_x__0, UInt(1)) : - ; CHECK: b_x := a_1_x - ; CHECK: node b_y__0 = i - ; CHECK: when eq(b_y__0, UInt(0)) : - ; CHECK: a_0_y := b_y - ; CHECK: when eq(b_y__0, UInt(1)) : - ; CHECK: a_1_y := b_y + ; CHECK: wire b$x : UInt<32> + ; CHECK: wire b$y : UInt<32> + ; CHECK: b$x := a$0$x + ; CHECK: node i#0 = i + ; CHECK: when eq(i#0, UInt(1)) : + ; CHECK: b$x := a$1$x + ; CHECK: node i#1 = i + ; CHECK: when eq(i#1, UInt(0)) : + ; CHECK: a$0$y := b$y + ; CHECK: when eq(i#1, UInt(1)) : + ; CHECK: a$1$y := b$y j := b.x ; CHECK: Finished Expand Indexed Connects diff --git a/test/passes/expand-whens/bundle-init.fir b/test/passes/expand-whens/bundle-init.fir index c51604eb..4f8c31e2 100644 --- a/test/passes/expand-whens/bundle-init.fir +++ b/test/passes/expand-whens/bundle-init.fir @@ -15,11 +15,11 @@ circuit top : r.y := b on-reset r := w -; CHECK: node r_x = Register(mux(reset, w_x, a), UInt(1)) -; CHECK: node r_y = Register(b, UInt(1)) +; CHECK: r$x := Register(mux(reset, w$x, a), UInt(1)) +; CHECK: r$y := Register(b, UInt(1)) ; CHECK: a := UInt(1) ; CHECK: b := UInt(2) -; CHECK: w_x := b -; CHECK: w_y := mux(reset, r_y, a) +; CHECK: w$x := b +; CHECK: w$y := mux(reset, r$y, a) ; CHECK: Finished Expand Whens diff --git a/test/passes/expand-whens/nested-whens.fir b/test/passes/expand-whens/nested-whens.fir index 21a6f24b..f7ac8337 100644 --- a/test/passes/expand-whens/nested-whens.fir +++ b/test/passes/expand-whens/nested-whens.fir @@ -20,5 +20,5 @@ circuit top : on-reset r := y r := b r := z -; CHECK: node r = Register(mux(reset, mux(q, y, mux(p, x, w)), z), UInt(1)) +; CHECK: r := Register(mux(reset, mux(q, y, mux(p, x, w)), z), UInt(1)) ; CHECK: Finished Expand Whens diff --git a/test/passes/jacktest/Control.fir b/test/passes/jacktest/Control.fir deleted file mode 100644 index b0acfc50..00000000 --- a/test/passes/jacktest/Control.fir +++ /dev/null @@ -1,648 +0,0 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s -;CHECK: Done! -circuit Control : - module Control : - output ctrl : {flip inst : UInt<32>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, pc_sel : UInt<1>, inst_re : UInt<1>, flip stall : UInt<1>, data_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>} - - node T_831 = bit-and(UInt<7>(127), ctrl.inst) - node T_832 = eq(T_831, UInt<6>(55)) - node T_833 = bit-and(UInt<7>(127), ctrl.inst) - node T_834 = eq(T_833, UInt<5>(23)) - node T_835 = bit-and(UInt<7>(127), ctrl.inst) - node T_836 = eq(T_835, UInt<7>(111)) - node T_837 = bit-and(UInt<15>(28799), ctrl.inst) - node T_838 = eq(T_837, UInt<7>(103)) - node T_839 = bit-and(UInt<15>(28799), ctrl.inst) - node T_840 = eq(T_839, UInt<7>(99)) - node T_841 = bit-and(UInt<15>(28799), ctrl.inst) - node T_842 = eq(T_841, UInt<13>(4195)) - node T_843 = bit-and(UInt<15>(28799), ctrl.inst) - node T_844 = eq(T_843, UInt<15>(16483)) - node T_845 = bit-and(UInt<15>(28799), ctrl.inst) - node T_846 = eq(T_845, UInt<15>(20579)) - node T_847 = bit-and(UInt<15>(28799), ctrl.inst) - node T_848 = eq(T_847, UInt<15>(24675)) - node T_849 = bit-and(UInt<15>(28799), ctrl.inst) - node T_850 = eq(T_849, UInt<15>(28771)) - node T_851 = bit-and(UInt<15>(28799), ctrl.inst) - node T_852 = eq(T_851, UInt<2>(3)) - node T_853 = bit-and(UInt<15>(28799), ctrl.inst) - node T_854 = eq(T_853, UInt<13>(4099)) - node T_855 = bit-and(UInt<15>(28799), ctrl.inst) - node T_856 = eq(T_855, UInt<14>(8195)) - node T_857 = bit-and(UInt<15>(28799), ctrl.inst) - node T_858 = eq(T_857, UInt<15>(16387)) - node T_859 = bit-and(UInt<15>(28799), ctrl.inst) - node T_860 = eq(T_859, UInt<15>(20483)) - node T_861 = bit-and(UInt<15>(28799), ctrl.inst) - node T_862 = eq(T_861, UInt<6>(35)) - node T_863 = bit-and(UInt<15>(28799), ctrl.inst) - node T_864 = eq(T_863, UInt<13>(4131)) - node T_865 = bit-and(UInt<15>(28799), ctrl.inst) - node T_866 = eq(T_865, UInt<14>(8227)) - node T_867 = bit-and(UInt<15>(28799), ctrl.inst) - node T_868 = eq(T_867, UInt<5>(19)) - node T_869 = bit-and(UInt<15>(28799), ctrl.inst) - node T_870 = eq(T_869, UInt<14>(8211)) - node T_871 = bit-and(UInt<15>(28799), ctrl.inst) - node T_872 = eq(T_871, UInt<14>(12307)) - node T_873 = bit-and(UInt<15>(28799), ctrl.inst) - node T_874 = eq(T_873, UInt<15>(16403)) - node T_875 = bit-and(UInt<15>(28799), ctrl.inst) - node T_876 = eq(T_875, UInt<15>(24595)) - node T_877 = bit-and(UInt<15>(28799), ctrl.inst) - node T_878 = eq(T_877, UInt<15>(28691)) - node T_879 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_880 = eq(T_879, UInt<13>(4115)) - node T_881 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_882 = eq(T_881, UInt<15>(20499)) - node T_883 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_884 = eq(T_883, UInt<31>(1073762323)) - node T_885 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_886 = eq(T_885, UInt<6>(51)) - node T_887 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_888 = eq(T_887, UInt<31>(1073741875)) - node T_889 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_890 = eq(T_889, UInt<13>(4147)) - node T_891 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_892 = eq(T_891, UInt<14>(8243)) - node T_893 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_894 = eq(T_893, UInt<14>(12339)) - node T_895 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_896 = eq(T_895, UInt<15>(16435)) - node T_897 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_898 = eq(T_897, UInt<15>(20531)) - node T_899 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_900 = eq(T_899, UInt<31>(1073762355)) - node T_901 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_902 = eq(T_901, UInt<15>(24627)) - node T_903 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_904 = eq(T_903, UInt<15>(28723)) - node T_905 = bit-and(UInt<15>(28799), ctrl.inst) - node T_906 = eq(T_905, UInt<13>(4211)) - node T_907 = bit-and(UInt<15>(28799), ctrl.inst) - node T_908 = eq(T_907, UInt<14>(8307)) - node T_909 = bit-and(UInt<15>(28799), ctrl.inst) - node T_910 = eq(T_909, UInt<14>(12403)) - node T_911 = bit-and(UInt<15>(28799), ctrl.inst) - node T_912 = eq(T_911, UInt<15>(20595)) - node T_913 = bit-and(UInt<15>(28799), ctrl.inst) - node T_914 = eq(T_913, UInt<15>(24691)) - node T_915 = bit-and(UInt<15>(28799), ctrl.inst) - node T_916 = eq(T_915, UInt<15>(28787)) - node T_917 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_918 = mux(T_914, UInt<1>(0), T_917) - node T_919 = mux(T_912, UInt<1>(0), T_918) - node T_920 = mux(T_910, UInt<1>(0), T_919) - node T_921 = mux(T_908, UInt<1>(0), T_920) - node T_922 = mux(T_906, UInt<1>(0), T_921) - node T_923 = mux(T_904, UInt<1>(0), T_922) - node T_924 = mux(T_902, UInt<1>(0), T_923) - node T_925 = mux(T_900, UInt<1>(0), T_924) - node T_926 = mux(T_898, UInt<1>(0), T_925) - node T_927 = mux(T_896, UInt<1>(0), T_926) - node T_928 = mux(T_894, UInt<1>(0), T_927) - node T_929 = mux(T_892, UInt<1>(0), T_928) - node T_930 = mux(T_890, UInt<1>(0), T_929) - node T_931 = mux(T_888, UInt<1>(0), T_930) - node T_932 = mux(T_886, UInt<1>(0), T_931) - node T_933 = mux(T_884, UInt<1>(0), T_932) - node T_934 = mux(T_882, UInt<1>(0), T_933) - node T_935 = mux(T_880, UInt<1>(0), T_934) - node T_936 = mux(T_878, UInt<1>(0), T_935) - node T_937 = mux(T_876, UInt<1>(0), T_936) - node T_938 = mux(T_874, UInt<1>(0), T_937) - node T_939 = mux(T_872, UInt<1>(0), T_938) - node T_940 = mux(T_870, UInt<1>(0), T_939) - node T_941 = mux(T_868, UInt<1>(0), T_940) - node T_942 = mux(T_866, UInt<1>(0), T_941) - node T_943 = mux(T_864, UInt<1>(0), T_942) - node T_944 = mux(T_862, UInt<1>(0), T_943) - node T_945 = mux(T_860, UInt<1>(0), T_944) - node T_946 = mux(T_858, UInt<1>(0), T_945) - node T_947 = mux(T_856, UInt<1>(0), T_946) - node T_948 = mux(T_854, UInt<1>(0), T_947) - node T_949 = mux(T_852, UInt<1>(0), T_948) - node T_950 = mux(T_850, UInt<1>(0), T_949) - node T_951 = mux(T_848, UInt<1>(0), T_950) - node T_952 = mux(T_846, UInt<1>(0), T_951) - node T_953 = mux(T_844, UInt<1>(0), T_952) - node T_954 = mux(T_842, UInt<1>(0), T_953) - node T_955 = mux(T_840, UInt<1>(0), T_954) - node T_956 = mux(T_838, UInt<1>(1), T_955) - node T_957 = mux(T_836, UInt<1>(1), T_956) - node T_958 = mux(T_834, UInt<1>(0), T_957) - node T_959 = mux(T_832, UInt<1>(0), T_958) - node T_960 = mux(T_916, UInt<1>(1), UInt<1>(1)) - node T_961 = mux(T_914, UInt<1>(1), T_960) - node T_962 = mux(T_912, UInt<1>(1), T_961) - node T_963 = mux(T_910, UInt<1>(0), T_962) - node T_964 = mux(T_908, UInt<1>(0), T_963) - node T_965 = mux(T_906, UInt<1>(0), T_964) - node T_966 = mux(T_904, UInt<1>(0), T_965) - node T_967 = mux(T_902, UInt<1>(0), T_966) - node T_968 = mux(T_900, UInt<1>(0), T_967) - node T_969 = mux(T_898, UInt<1>(0), T_968) - node T_970 = mux(T_896, UInt<1>(0), T_969) - node T_971 = mux(T_894, UInt<1>(0), T_970) - node T_972 = mux(T_892, UInt<1>(0), T_971) - node T_973 = mux(T_890, UInt<1>(0), T_972) - node T_974 = mux(T_888, UInt<1>(0), T_973) - node T_975 = mux(T_886, UInt<1>(0), T_974) - node T_976 = mux(T_884, UInt<1>(0), T_975) - node T_977 = mux(T_882, UInt<1>(0), T_976) - node T_978 = mux(T_880, UInt<1>(0), T_977) - node T_979 = mux(T_878, UInt<1>(0), T_978) - node T_980 = mux(T_876, UInt<1>(0), T_979) - node T_981 = mux(T_874, UInt<1>(0), T_980) - node T_982 = mux(T_872, UInt<1>(0), T_981) - node T_983 = mux(T_870, UInt<1>(0), T_982) - node T_984 = mux(T_868, UInt<1>(0), T_983) - node T_985 = mux(T_866, UInt<1>(0), T_984) - node T_986 = mux(T_864, UInt<1>(0), T_985) - node T_987 = mux(T_862, UInt<1>(0), T_986) - node T_988 = mux(T_860, UInt<1>(0), T_987) - node T_989 = mux(T_858, UInt<1>(0), T_988) - node T_990 = mux(T_856, UInt<1>(0), T_989) - node T_991 = mux(T_854, UInt<1>(0), T_990) - node T_992 = mux(T_852, UInt<1>(0), T_991) - node T_993 = mux(T_850, UInt<1>(1), T_992) - node T_994 = mux(T_848, UInt<1>(1), T_993) - node T_995 = mux(T_846, UInt<1>(1), T_994) - node T_996 = mux(T_844, UInt<1>(1), T_995) - node T_997 = mux(T_842, UInt<1>(1), T_996) - node T_998 = mux(T_840, UInt<1>(1), T_997) - node T_999 = mux(T_838, UInt<1>(0), T_998) - node T_1000 = mux(T_836, UInt<1>(1), T_999) - node T_1001 = mux(T_834, UInt<1>(1), T_1000) - node T_1002 = mux(T_832, UInt<1>(1), T_1001) - node T_1003 = mux(T_916, UInt<1>(1), UInt<1>(0)) - node T_1004 = mux(T_914, UInt<1>(1), T_1003) - node T_1005 = mux(T_912, UInt<1>(1), T_1004) - node T_1006 = mux(T_910, UInt<1>(0), T_1005) - node T_1007 = mux(T_908, UInt<1>(0), T_1006) - node T_1008 = mux(T_906, UInt<1>(0), T_1007) - node T_1009 = mux(T_904, UInt<1>(0), T_1008) - node T_1010 = mux(T_902, UInt<1>(0), T_1009) - node T_1011 = mux(T_900, UInt<1>(0), T_1010) - node T_1012 = mux(T_898, UInt<1>(0), T_1011) - node T_1013 = mux(T_896, UInt<1>(0), T_1012) - node T_1014 = mux(T_894, UInt<1>(0), T_1013) - node T_1015 = mux(T_892, UInt<1>(0), T_1014) - node T_1016 = mux(T_890, UInt<1>(0), T_1015) - node T_1017 = mux(T_888, UInt<1>(0), T_1016) - node T_1018 = mux(T_886, UInt<1>(0), T_1017) - node T_1019 = mux(T_884, UInt<1>(1), T_1018) - node T_1020 = mux(T_882, UInt<1>(1), T_1019) - node T_1021 = mux(T_880, UInt<1>(1), T_1020) - node T_1022 = mux(T_878, UInt<1>(1), T_1021) - node T_1023 = mux(T_876, UInt<1>(1), T_1022) - node T_1024 = mux(T_874, UInt<1>(1), T_1023) - node T_1025 = mux(T_872, UInt<1>(1), T_1024) - node T_1026 = mux(T_870, UInt<1>(1), T_1025) - node T_1027 = mux(T_868, UInt<1>(1), T_1026) - node T_1028 = mux(T_866, UInt<1>(1), T_1027) - node T_1029 = mux(T_864, UInt<1>(1), T_1028) - node T_1030 = mux(T_862, UInt<1>(1), T_1029) - node T_1031 = mux(T_860, UInt<1>(1), T_1030) - node T_1032 = mux(T_858, UInt<1>(1), T_1031) - node T_1033 = mux(T_856, UInt<1>(1), T_1032) - node T_1034 = mux(T_854, UInt<1>(1), T_1033) - node T_1035 = mux(T_852, UInt<1>(1), T_1034) - node T_1036 = mux(T_850, UInt<1>(1), T_1035) - node T_1037 = mux(T_848, UInt<1>(1), T_1036) - node T_1038 = mux(T_846, UInt<1>(1), T_1037) - node T_1039 = mux(T_844, UInt<1>(1), T_1038) - node T_1040 = mux(T_842, UInt<1>(1), T_1039) - node T_1041 = mux(T_840, UInt<1>(1), T_1040) - node T_1042 = mux(T_838, UInt<1>(1), T_1041) - node T_1043 = mux(T_836, UInt<1>(1), T_1042) - node T_1044 = mux(T_834, UInt<1>(1), T_1043) - node T_1045 = mux(T_832, UInt<1>(1), T_1044) - node T_1046 = mux(T_916, UInt<3>(5), UInt<3>(7)) - node T_1047 = mux(T_914, UInt<3>(5), T_1046) - node T_1048 = mux(T_912, UInt<3>(5), T_1047) - node T_1049 = mux(T_910, UInt<3>(5), T_1048) - node T_1050 = mux(T_908, UInt<3>(5), T_1049) - node T_1051 = mux(T_906, UInt<3>(5), T_1050) - node T_1052 = mux(T_904, UInt<3>(7), T_1051) - node T_1053 = mux(T_902, UInt<3>(7), T_1052) - node T_1054 = mux(T_900, UInt<3>(7), T_1053) - node T_1055 = mux(T_898, UInt<3>(7), T_1054) - node T_1056 = mux(T_896, UInt<3>(7), T_1055) - node T_1057 = mux(T_894, UInt<3>(7), T_1056) - node T_1058 = mux(T_892, UInt<3>(7), T_1057) - node T_1059 = mux(T_890, UInt<3>(7), T_1058) - node T_1060 = mux(T_888, UInt<3>(7), T_1059) - node T_1061 = mux(T_886, UInt<3>(7), T_1060) - node T_1062 = mux(T_884, UInt<3>(0), T_1061) - node T_1063 = mux(T_882, UInt<3>(0), T_1062) - node T_1064 = mux(T_880, UInt<3>(0), T_1063) - node T_1065 = mux(T_878, UInt<3>(0), T_1064) - node T_1066 = mux(T_876, UInt<3>(0), T_1065) - node T_1067 = mux(T_874, UInt<3>(0), T_1066) - node T_1068 = mux(T_872, UInt<3>(0), T_1067) - node T_1069 = mux(T_870, UInt<3>(0), T_1068) - node T_1070 = mux(T_868, UInt<3>(0), T_1069) - node T_1071 = mux(T_866, UInt<3>(1), T_1070) - node T_1072 = mux(T_864, UInt<3>(1), T_1071) - node T_1073 = mux(T_862, UInt<3>(1), T_1072) - node T_1074 = mux(T_860, UInt<3>(0), T_1073) - node T_1075 = mux(T_858, UInt<3>(0), T_1074) - node T_1076 = mux(T_856, UInt<3>(0), T_1075) - node T_1077 = mux(T_854, UInt<3>(0), T_1076) - node T_1078 = mux(T_852, UInt<3>(0), T_1077) - node T_1079 = mux(T_850, UInt<3>(4), T_1078) - node T_1080 = mux(T_848, UInt<3>(4), T_1079) - node T_1081 = mux(T_846, UInt<3>(4), T_1080) - node T_1082 = mux(T_844, UInt<3>(4), T_1081) - node T_1083 = mux(T_842, UInt<3>(4), T_1082) - node T_1084 = mux(T_840, UInt<3>(4), T_1083) - node T_1085 = mux(T_838, UInt<3>(0), T_1084) - node T_1086 = mux(T_836, UInt<3>(3), T_1085) - node T_1087 = mux(T_834, UInt<3>(2), T_1086) - node T_1088 = mux(T_832, UInt<3>(2), T_1087) - node T_1089 = mux(T_916, UInt<4>(11), UInt<4>(15)) - node T_1090 = mux(T_914, UInt<4>(11), T_1089) - node T_1091 = mux(T_912, UInt<4>(11), T_1090) - node T_1092 = mux(T_910, UInt<4>(10), T_1091) - node T_1093 = mux(T_908, UInt<4>(10), T_1092) - node T_1094 = mux(T_906, UInt<4>(10), T_1093) - node T_1095 = mux(T_904, UInt<4>(2), T_1094) - node T_1096 = mux(T_902, UInt<4>(3), T_1095) - node T_1097 = mux(T_900, UInt<4>(9), T_1096) - node T_1098 = mux(T_898, UInt<4>(8), T_1097) - node T_1099 = mux(T_896, UInt<4>(4), T_1098) - node T_1100 = mux(T_894, UInt<4>(7), T_1099) - node T_1101 = mux(T_892, UInt<4>(5), T_1100) - node T_1102 = mux(T_890, UInt<4>(6), T_1101) - node T_1103 = mux(T_888, UInt<4>(1), T_1102) - node T_1104 = mux(T_886, UInt<4>(0), T_1103) - node T_1105 = mux(T_884, UInt<4>(9), T_1104) - node T_1106 = mux(T_882, UInt<4>(8), T_1105) - node T_1107 = mux(T_880, UInt<4>(6), T_1106) - node T_1108 = mux(T_878, UInt<4>(2), T_1107) - node T_1109 = mux(T_876, UInt<4>(3), T_1108) - node T_1110 = mux(T_874, UInt<4>(4), T_1109) - node T_1111 = mux(T_872, UInt<4>(7), T_1110) - node T_1112 = mux(T_870, UInt<4>(5), T_1111) - node T_1113 = mux(T_868, UInt<4>(0), T_1112) - node T_1114 = mux(T_866, UInt<4>(0), T_1113) - node T_1115 = mux(T_864, UInt<4>(0), T_1114) - node T_1116 = mux(T_862, UInt<4>(0), T_1115) - node T_1117 = mux(T_860, UInt<4>(0), T_1116) - node T_1118 = mux(T_858, UInt<4>(0), T_1117) - node T_1119 = mux(T_856, UInt<4>(0), T_1118) - node T_1120 = mux(T_854, UInt<4>(0), T_1119) - node T_1121 = mux(T_852, UInt<4>(0), T_1120) - node T_1122 = mux(T_850, UInt<4>(0), T_1121) - node T_1123 = mux(T_848, UInt<4>(0), T_1122) - node T_1124 = mux(T_846, UInt<4>(0), T_1123) - node T_1125 = mux(T_844, UInt<4>(0), T_1124) - node T_1126 = mux(T_842, UInt<4>(0), T_1125) - node T_1127 = mux(T_840, UInt<4>(0), T_1126) - node T_1128 = mux(T_838, UInt<4>(0), T_1127) - node T_1129 = mux(T_836, UInt<4>(0), T_1128) - node T_1130 = mux(T_834, UInt<4>(0), T_1129) - node T_1131 = mux(T_832, UInt<4>(11), T_1130) - node T_1132 = mux(T_916, UInt<3>(7), UInt<3>(7)) - node T_1133 = mux(T_914, UInt<3>(7), T_1132) - node T_1134 = mux(T_912, UInt<3>(7), T_1133) - node T_1135 = mux(T_910, UInt<3>(7), T_1134) - node T_1136 = mux(T_908, UInt<3>(7), T_1135) - node T_1137 = mux(T_906, UInt<3>(7), T_1136) - node T_1138 = mux(T_904, UInt<3>(7), T_1137) - node T_1139 = mux(T_902, UInt<3>(7), T_1138) - node T_1140 = mux(T_900, UInt<3>(7), T_1139) - node T_1141 = mux(T_898, UInt<3>(7), T_1140) - node T_1142 = mux(T_896, UInt<3>(7), T_1141) - node T_1143 = mux(T_894, UInt<3>(7), T_1142) - node T_1144 = mux(T_892, UInt<3>(7), T_1143) - node T_1145 = mux(T_890, UInt<3>(7), T_1144) - node T_1146 = mux(T_888, UInt<3>(7), T_1145) - node T_1147 = mux(T_886, UInt<3>(7), T_1146) - node T_1148 = mux(T_884, UInt<3>(7), T_1147) - node T_1149 = mux(T_882, UInt<3>(7), T_1148) - node T_1150 = mux(T_880, UInt<3>(7), T_1149) - node T_1151 = mux(T_878, UInt<3>(7), T_1150) - node T_1152 = mux(T_876, UInt<3>(7), T_1151) - node T_1153 = mux(T_874, UInt<3>(7), T_1152) - node T_1154 = mux(T_872, UInt<3>(7), T_1153) - node T_1155 = mux(T_870, UInt<3>(7), T_1154) - node T_1156 = mux(T_868, UInt<3>(7), T_1155) - node T_1157 = mux(T_866, UInt<3>(7), T_1156) - node T_1158 = mux(T_864, UInt<3>(7), T_1157) - node T_1159 = mux(T_862, UInt<3>(7), T_1158) - node T_1160 = mux(T_860, UInt<3>(7), T_1159) - node T_1161 = mux(T_858, UInt<3>(7), T_1160) - node T_1162 = mux(T_856, UInt<3>(7), T_1161) - node T_1163 = mux(T_854, UInt<3>(7), T_1162) - node T_1164 = mux(T_852, UInt<3>(7), T_1163) - node T_1165 = mux(T_850, UInt<3>(4), T_1164) - node T_1166 = mux(T_848, UInt<3>(0), T_1165) - node T_1167 = mux(T_846, UInt<3>(5), T_1166) - node T_1168 = mux(T_844, UInt<3>(1), T_1167) - node T_1169 = mux(T_842, UInt<3>(6), T_1168) - node T_1170 = mux(T_840, UInt<3>(2), T_1169) - node T_1171 = mux(T_838, UInt<3>(7), T_1170) - node T_1172 = mux(T_836, UInt<3>(7), T_1171) - node T_1173 = mux(T_834, UInt<3>(7), T_1172) - node T_1174 = mux(T_832, UInt<3>(7), T_1173) - node T_1175 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_1176 = mux(T_914, UInt<1>(0), T_1175) - node T_1177 = mux(T_912, UInt<1>(0), T_1176) - node T_1178 = mux(T_910, UInt<1>(0), T_1177) - node T_1179 = mux(T_908, UInt<1>(0), T_1178) - node T_1180 = mux(T_906, UInt<1>(0), T_1179) - node T_1181 = mux(T_904, UInt<1>(0), T_1180) - node T_1182 = mux(T_902, UInt<1>(0), T_1181) - node T_1183 = mux(T_900, UInt<1>(0), T_1182) - node T_1184 = mux(T_898, UInt<1>(0), T_1183) - node T_1185 = mux(T_896, UInt<1>(0), T_1184) - node T_1186 = mux(T_894, UInt<1>(0), T_1185) - node T_1187 = mux(T_892, UInt<1>(0), T_1186) - node T_1188 = mux(T_890, UInt<1>(0), T_1187) - node T_1189 = mux(T_888, UInt<1>(0), T_1188) - node T_1190 = mux(T_886, UInt<1>(0), T_1189) - node T_1191 = mux(T_884, UInt<1>(0), T_1190) - node T_1192 = mux(T_882, UInt<1>(0), T_1191) - node T_1193 = mux(T_880, UInt<1>(0), T_1192) - node T_1194 = mux(T_878, UInt<1>(0), T_1193) - node T_1195 = mux(T_876, UInt<1>(0), T_1194) - node T_1196 = mux(T_874, UInt<1>(0), T_1195) - node T_1197 = mux(T_872, UInt<1>(0), T_1196) - node T_1198 = mux(T_870, UInt<1>(0), T_1197) - node T_1199 = mux(T_868, UInt<1>(0), T_1198) - node T_1200 = mux(T_866, UInt<1>(0), T_1199) - node T_1201 = mux(T_864, UInt<1>(0), T_1200) - node T_1202 = mux(T_862, UInt<1>(0), T_1201) - node T_1203 = mux(T_860, UInt<1>(0), T_1202) - node T_1204 = mux(T_858, UInt<1>(0), T_1203) - node T_1205 = mux(T_856, UInt<1>(0), T_1204) - node T_1206 = mux(T_854, UInt<1>(0), T_1205) - node T_1207 = mux(T_852, UInt<1>(0), T_1206) - node T_1208 = mux(T_850, UInt<1>(0), T_1207) - node T_1209 = mux(T_848, UInt<1>(0), T_1208) - node T_1210 = mux(T_846, UInt<1>(0), T_1209) - node T_1211 = mux(T_844, UInt<1>(0), T_1210) - node T_1212 = mux(T_842, UInt<1>(0), T_1211) - node T_1213 = mux(T_840, UInt<1>(0), T_1212) - node T_1214 = mux(T_838, UInt<1>(1), T_1213) - node T_1215 = mux(T_836, UInt<1>(1), T_1214) - node T_1216 = mux(T_834, UInt<1>(0), T_1215) - node T_1217 = mux(T_832, UInt<1>(0), T_1216) - node T_1218 = mux(T_916, UInt<2>(3), UInt<2>(3)) - node T_1219 = mux(T_914, UInt<2>(3), T_1218) - node T_1220 = mux(T_912, UInt<2>(3), T_1219) - node T_1221 = mux(T_910, UInt<2>(3), T_1220) - node T_1222 = mux(T_908, UInt<2>(3), T_1221) - node T_1223 = mux(T_906, UInt<2>(3), T_1222) - node T_1224 = mux(T_904, UInt<2>(3), T_1223) - node T_1225 = mux(T_902, UInt<2>(3), T_1224) - node T_1226 = mux(T_900, UInt<2>(3), T_1225) - node T_1227 = mux(T_898, UInt<2>(3), T_1226) - node T_1228 = mux(T_896, UInt<2>(3), T_1227) - node T_1229 = mux(T_894, UInt<2>(3), T_1228) - node T_1230 = mux(T_892, UInt<2>(3), T_1229) - node T_1231 = mux(T_890, UInt<2>(3), T_1230) - node T_1232 = mux(T_888, UInt<2>(3), T_1231) - node T_1233 = mux(T_886, UInt<2>(3), T_1232) - node T_1234 = mux(T_884, UInt<2>(3), T_1233) - node T_1235 = mux(T_882, UInt<2>(3), T_1234) - node T_1236 = mux(T_880, UInt<2>(3), T_1235) - node T_1237 = mux(T_878, UInt<2>(3), T_1236) - node T_1238 = mux(T_876, UInt<2>(3), T_1237) - node T_1239 = mux(T_874, UInt<2>(3), T_1238) - node T_1240 = mux(T_872, UInt<2>(3), T_1239) - node T_1241 = mux(T_870, UInt<2>(3), T_1240) - node T_1242 = mux(T_868, UInt<2>(3), T_1241) - node T_1243 = mux(T_866, UInt<2>(0), T_1242) - node T_1244 = mux(T_864, UInt<2>(1), T_1243) - node T_1245 = mux(T_862, UInt<2>(2), T_1244) - node T_1246 = mux(T_860, UInt<2>(3), T_1245) - node T_1247 = mux(T_858, UInt<2>(3), T_1246) - node T_1248 = mux(T_856, UInt<2>(3), T_1247) - node T_1249 = mux(T_854, UInt<2>(3), T_1248) - node T_1250 = mux(T_852, UInt<2>(3), T_1249) - node T_1251 = mux(T_850, UInt<2>(3), T_1250) - node T_1252 = mux(T_848, UInt<2>(3), T_1251) - node T_1253 = mux(T_846, UInt<2>(3), T_1252) - node T_1254 = mux(T_844, UInt<2>(3), T_1253) - node T_1255 = mux(T_842, UInt<2>(3), T_1254) - node T_1256 = mux(T_840, UInt<2>(3), T_1255) - node T_1257 = mux(T_838, UInt<2>(3), T_1256) - node T_1258 = mux(T_836, UInt<2>(3), T_1257) - node T_1259 = mux(T_834, UInt<2>(3), T_1258) - node T_1260 = mux(T_832, UInt<2>(3), T_1259) - node T_1261 = mux(T_916, UInt<3>(7), UInt<3>(7)) - node T_1262 = mux(T_914, UInt<3>(7), T_1261) - node T_1263 = mux(T_912, UInt<3>(7), T_1262) - node T_1264 = mux(T_910, UInt<3>(7), T_1263) - node T_1265 = mux(T_908, UInt<3>(7), T_1264) - node T_1266 = mux(T_906, UInt<3>(7), T_1265) - node T_1267 = mux(T_904, UInt<3>(7), T_1266) - node T_1268 = mux(T_902, UInt<3>(7), T_1267) - node T_1269 = mux(T_900, UInt<3>(7), T_1268) - node T_1270 = mux(T_898, UInt<3>(7), T_1269) - node T_1271 = mux(T_896, UInt<3>(7), T_1270) - node T_1272 = mux(T_894, UInt<3>(7), T_1271) - node T_1273 = mux(T_892, UInt<3>(7), T_1272) - node T_1274 = mux(T_890, UInt<3>(7), T_1273) - node T_1275 = mux(T_888, UInt<3>(7), T_1274) - node T_1276 = mux(T_886, UInt<3>(7), T_1275) - node T_1277 = mux(T_884, UInt<3>(7), T_1276) - node T_1278 = mux(T_882, UInt<3>(7), T_1277) - node T_1279 = mux(T_880, UInt<3>(7), T_1278) - node T_1280 = mux(T_878, UInt<3>(7), T_1279) - node T_1281 = mux(T_876, UInt<3>(7), T_1280) - node T_1282 = mux(T_874, UInt<3>(7), T_1281) - node T_1283 = mux(T_872, UInt<3>(7), T_1282) - node T_1284 = mux(T_870, UInt<3>(7), T_1283) - node T_1285 = mux(T_868, UInt<3>(7), T_1284) - node T_1286 = mux(T_866, UInt<3>(7), T_1285) - node T_1287 = mux(T_864, UInt<3>(7), T_1286) - node T_1288 = mux(T_862, UInt<3>(7), T_1287) - node T_1289 = mux(T_860, UInt<3>(3), T_1288) - node T_1290 = mux(T_858, UInt<3>(4), T_1289) - node T_1291 = mux(T_856, UInt<3>(0), T_1290) - node T_1292 = mux(T_854, UInt<3>(1), T_1291) - node T_1293 = mux(T_852, UInt<3>(2), T_1292) - node T_1294 = mux(T_850, UInt<3>(7), T_1293) - node T_1295 = mux(T_848, UInt<3>(7), T_1294) - node T_1296 = mux(T_846, UInt<3>(7), T_1295) - node T_1297 = mux(T_844, UInt<3>(7), T_1296) - node T_1298 = mux(T_842, UInt<3>(7), T_1297) - node T_1299 = mux(T_840, UInt<3>(7), T_1298) - node T_1300 = mux(T_838, UInt<3>(7), T_1299) - node T_1301 = mux(T_836, UInt<3>(7), T_1300) - node T_1302 = mux(T_834, UInt<3>(7), T_1301) - node T_1303 = mux(T_832, UInt<3>(7), T_1302) - node T_1304 = mux(T_916, UInt<2>(3), UInt<2>(0)) - node T_1305 = mux(T_914, UInt<2>(3), T_1304) - node T_1306 = mux(T_912, UInt<2>(3), T_1305) - node T_1307 = mux(T_910, UInt<2>(3), T_1306) - node T_1308 = mux(T_908, UInt<2>(3), T_1307) - node T_1309 = mux(T_906, UInt<2>(3), T_1308) - node T_1310 = mux(T_904, UInt<2>(0), T_1309) - node T_1311 = mux(T_902, UInt<2>(0), T_1310) - node T_1312 = mux(T_900, UInt<2>(0), T_1311) - node T_1313 = mux(T_898, UInt<2>(0), T_1312) - node T_1314 = mux(T_896, UInt<2>(0), T_1313) - node T_1315 = mux(T_894, UInt<2>(0), T_1314) - node T_1316 = mux(T_892, UInt<2>(0), T_1315) - node T_1317 = mux(T_890, UInt<2>(0), T_1316) - node T_1318 = mux(T_888, UInt<2>(0), T_1317) - node T_1319 = mux(T_886, UInt<2>(0), T_1318) - node T_1320 = mux(T_884, UInt<2>(0), T_1319) - node T_1321 = mux(T_882, UInt<2>(0), T_1320) - node T_1322 = mux(T_880, UInt<2>(0), T_1321) - node T_1323 = mux(T_878, UInt<2>(0), T_1322) - node T_1324 = mux(T_876, UInt<2>(0), T_1323) - node T_1325 = mux(T_874, UInt<2>(0), T_1324) - node T_1326 = mux(T_872, UInt<2>(0), T_1325) - node T_1327 = mux(T_870, UInt<2>(0), T_1326) - node T_1328 = mux(T_868, UInt<2>(0), T_1327) - node T_1329 = mux(T_866, UInt<2>(0), T_1328) - node T_1330 = mux(T_864, UInt<2>(0), T_1329) - node T_1331 = mux(T_862, UInt<2>(0), T_1330) - node T_1332 = mux(T_860, UInt<2>(1), T_1331) - node T_1333 = mux(T_858, UInt<2>(1), T_1332) - node T_1334 = mux(T_856, UInt<2>(1), T_1333) - node T_1335 = mux(T_854, UInt<2>(1), T_1334) - node T_1336 = mux(T_852, UInt<2>(1), T_1335) - node T_1337 = mux(T_850, UInt<2>(0), T_1336) - node T_1338 = mux(T_848, UInt<2>(0), T_1337) - node T_1339 = mux(T_846, UInt<2>(0), T_1338) - node T_1340 = mux(T_844, UInt<2>(0), T_1339) - node T_1341 = mux(T_842, UInt<2>(0), T_1340) - node T_1342 = mux(T_840, UInt<2>(0), T_1341) - node T_1343 = mux(T_838, UInt<2>(2), T_1342) - node T_1344 = mux(T_836, UInt<2>(2), T_1343) - node T_1345 = mux(T_834, UInt<2>(0), T_1344) - node T_1346 = mux(T_832, UInt<2>(0), T_1345) - node T_1347 = mux(T_916, UInt<1>(0), UInt<1>(0)) - node T_1348 = mux(T_914, UInt<1>(0), T_1347) - node T_1349 = mux(T_912, UInt<1>(0), T_1348) - node T_1350 = mux(T_910, UInt<1>(0), T_1349) - node T_1351 = mux(T_908, UInt<1>(0), T_1350) - node T_1352 = mux(T_906, UInt<1>(0), T_1351) - node T_1353 = mux(T_904, UInt<1>(1), T_1352) - node T_1354 = mux(T_902, UInt<1>(1), T_1353) - node T_1355 = mux(T_900, UInt<1>(1), T_1354) - node T_1356 = mux(T_898, UInt<1>(1), T_1355) - node T_1357 = mux(T_896, UInt<1>(1), T_1356) - node T_1358 = mux(T_894, UInt<1>(1), T_1357) - node T_1359 = mux(T_892, UInt<1>(1), T_1358) - node T_1360 = mux(T_890, UInt<1>(1), T_1359) - node T_1361 = mux(T_888, UInt<1>(1), T_1360) - node T_1362 = mux(T_886, UInt<1>(1), T_1361) - node T_1363 = mux(T_884, UInt<1>(1), T_1362) - node T_1364 = mux(T_882, UInt<1>(1), T_1363) - node T_1365 = mux(T_880, UInt<1>(1), T_1364) - node T_1366 = mux(T_878, UInt<1>(1), T_1365) - node T_1367 = mux(T_876, UInt<1>(1), T_1366) - node T_1368 = mux(T_874, UInt<1>(1), T_1367) - node T_1369 = mux(T_872, UInt<1>(1), T_1368) - node T_1370 = mux(T_870, UInt<1>(1), T_1369) - node T_1371 = mux(T_868, UInt<1>(1), T_1370) - node T_1372 = mux(T_866, UInt<1>(0), T_1371) - node T_1373 = mux(T_864, UInt<1>(0), T_1372) - node T_1374 = mux(T_862, UInt<1>(0), T_1373) - node T_1375 = mux(T_860, UInt<1>(1), T_1374) - node T_1376 = mux(T_858, UInt<1>(1), T_1375) - node T_1377 = mux(T_856, UInt<1>(1), T_1376) - node T_1378 = mux(T_854, UInt<1>(1), T_1377) - node T_1379 = mux(T_852, UInt<1>(1), T_1378) - node T_1380 = mux(T_850, UInt<1>(0), T_1379) - node T_1381 = mux(T_848, UInt<1>(0), T_1380) - node T_1382 = mux(T_846, UInt<1>(0), T_1381) - node T_1383 = mux(T_844, UInt<1>(0), T_1382) - node T_1384 = mux(T_842, UInt<1>(0), T_1383) - node T_1385 = mux(T_840, UInt<1>(0), T_1384) - node T_1386 = mux(T_838, UInt<1>(1), T_1385) - node T_1387 = mux(T_836, UInt<1>(1), T_1386) - node T_1388 = mux(T_834, UInt<1>(1), T_1387) - node T_1389 = mux(T_832, UInt<1>(1), T_1388) - node T_1390 = mux(T_916, UInt<2>(3), UInt<2>(0)) - node T_1391 = mux(T_914, UInt<2>(2), T_1390) - node T_1392 = mux(T_912, UInt<2>(1), T_1391) - node T_1393 = mux(T_910, UInt<2>(3), T_1392) - node T_1394 = mux(T_908, UInt<2>(2), T_1393) - node T_1395 = mux(T_906, UInt<2>(1), T_1394) - node T_1396 = mux(T_904, UInt<2>(0), T_1395) - node T_1397 = mux(T_902, UInt<2>(0), T_1396) - node T_1398 = mux(T_900, UInt<2>(0), T_1397) - node T_1399 = mux(T_898, UInt<2>(0), T_1398) - node T_1400 = mux(T_896, UInt<2>(0), T_1399) - node T_1401 = mux(T_894, UInt<2>(0), T_1400) - node T_1402 = mux(T_892, UInt<2>(0), T_1401) - node T_1403 = mux(T_890, UInt<2>(0), T_1402) - node T_1404 = mux(T_888, UInt<2>(0), T_1403) - node T_1405 = mux(T_886, UInt<2>(0), T_1404) - node T_1406 = mux(T_884, UInt<2>(0), T_1405) - node T_1407 = mux(T_882, UInt<2>(0), T_1406) - node T_1408 = mux(T_880, UInt<2>(0), T_1407) - node T_1409 = mux(T_878, UInt<2>(0), T_1408) - node T_1410 = mux(T_876, UInt<2>(0), T_1409) - node T_1411 = mux(T_874, UInt<2>(0), T_1410) - node T_1412 = mux(T_872, UInt<2>(0), T_1411) - node T_1413 = mux(T_870, UInt<2>(0), T_1412) - node T_1414 = mux(T_868, UInt<2>(0), T_1413) - node T_1415 = mux(T_866, UInt<2>(0), T_1414) - node T_1416 = mux(T_864, UInt<2>(0), T_1415) - node T_1417 = mux(T_862, UInt<2>(0), T_1416) - node T_1418 = mux(T_860, UInt<2>(0), T_1417) - node T_1419 = mux(T_858, UInt<2>(0), T_1418) - node T_1420 = mux(T_856, UInt<2>(0), T_1419) - node T_1421 = mux(T_854, UInt<2>(0), T_1420) - node T_1422 = mux(T_852, UInt<2>(0), T_1421) - node T_1423 = mux(T_850, UInt<2>(0), T_1422) - node T_1424 = mux(T_848, UInt<2>(0), T_1423) - node T_1425 = mux(T_846, UInt<2>(0), T_1424) - node T_1426 = mux(T_844, UInt<2>(0), T_1425) - node T_1427 = mux(T_842, UInt<2>(0), T_1426) - node T_1428 = mux(T_840, UInt<2>(0), T_1427) - node T_1429 = mux(T_838, UInt<2>(0), T_1428) - node T_1430 = mux(T_836, UInt<2>(0), T_1429) - node T_1431 = mux(T_834, UInt<2>(0), T_1430) - node T_1432 = mux(T_832, UInt<2>(0), T_1431) - node rs1_addr = bits(ctrl.inst, 19, 15) - node rs2_addr = bits(ctrl.inst, 24, 20) - reg st_type : UInt<2> - reg ld_type : UInt<3> - reg wb_sel : UInt<2> - node T_1433 = bit(T_1389, 0) - reg wb_en : UInt<1> - reg csr_cmd : UInt<2> - ctrl.pc_sel := T_959 - node T_1434 = bit-not(ctrl.stall) - node T_1435 = bit-not(ctrl.data_re) - node T_1436 = bit-and(T_1434, T_1435) - ctrl.inst_re := T_1436 - node T_1437 = neq(T_1303, UInt<3>(7)) - node T_1438 = bit(T_1217, 0) - node T_1439 = bit-or(T_1437, T_1438) - node T_1440 = mux(T_1439, UInt<1>(1), UInt<1>(0)) - ctrl.inst_type := T_1440 - ctrl.A_sel := T_1002 - ctrl.B_sel := T_1045 - ctrl.imm_sel := T_1088 - ctrl.alu_op := T_1131 - ctrl.br_type := T_1174 - ctrl.st_type := T_1260 - node T_1441 = bit-not(ctrl.stall) - when T_1441 : - st_type := ctrl.st_type - ld_type := T_1303 - wb_sel := T_1346 - node T_1442 = bit(T_1389, 0) - wb_en := T_1442 - csr_cmd := T_1432 - node T_1443 = neq(ctrl.ld_type, UInt<3>(7)) - node T_1444 = neq(T_1303, UInt<3>(7)) - node T_1445 = mux(ctrl.stall, T_1443, T_1444) - ctrl.data_re := T_1445 - ctrl.ld_type := ld_type - ctrl.wb_en := wb_en - ctrl.wb_sel := wb_sel - ctrl.csr_cmd := csr_cmd diff --git a/test/passes/jacktest/Core.fir b/test/passes/jacktest/Core.fir deleted file mode 100644 index 667f52f3..00000000 --- a/test/passes/jacktest/Core.fir +++ /dev/null @@ -1,1022 +0,0 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s -;CHECK: Done! -circuit Core : - module ALU : - input B : UInt<32> - output out : UInt<32> - output sum : UInt<32> - input A : UInt<32> - input alu_op : UInt<4> - - node shamt = bits(B, 4, 0) - node T_1224 = add-wrap(A, B) - node T_1225 = sub-wrap(A, B) - node T_1226 = convert(A) - node T_1227 = dshr(T_1226, shamt) - node T_1228 = as-UInt(T_1227) - node T_1229 = dshr(A, shamt) - node T_1230 = dshl(A, shamt) - node T_1231 = bits(T_1230, 31, 0) - node T_1232 = convert(A) - node T_1233 = convert(B) - node T_1234 = lt(T_1232, T_1233) - node T_1235 = as-UInt(T_1234) - node T_1236 = lt(A, B) - node T_1237 = as-UInt(T_1236) - node T_1238 = bit-and(A, B) - node T_1239 = bit-or(A, B) - node T_1240 = bit-xor(A, B) - node T_1241 = eq(UInt<4>(10), alu_op) - node T_1242 = mux(T_1241, A, B) - node T_1243 = eq(UInt<4>(4), alu_op) - node T_1244 = mux(T_1243, T_1240, T_1242) - node T_1245 = eq(UInt<4>(3), alu_op) - node T_1246 = mux(T_1245, T_1239, T_1244) - node T_1247 = eq(UInt<4>(2), alu_op) - node T_1248 = mux(T_1247, T_1238, T_1246) - node T_1249 = eq(UInt<4>(7), alu_op) - node T_1250 = mux(T_1249, T_1237, T_1248) - node T_1251 = eq(UInt<4>(5), alu_op) - node T_1252 = mux(T_1251, T_1235, T_1250) - node T_1253 = eq(UInt<4>(6), alu_op) - node T_1254 = mux(T_1253, T_1231, T_1252) - node T_1255 = eq(UInt<4>(8), alu_op) - node T_1256 = mux(T_1255, T_1229, T_1254) - node T_1257 = eq(UInt<4>(9), alu_op) - node T_1258 = mux(T_1257, T_1228, T_1256) - node T_1259 = eq(UInt<4>(1), alu_op) - node T_1260 = mux(T_1259, T_1225, T_1258) - node T_1261 = eq(UInt<4>(0), alu_op) - node oot = mux(T_1261, T_1224, T_1260) - node T_1262 = bits(oot, 31, 0) - out := T_1262 - node T_1263 = bit(alu_op, 0) - node T_1264 = sub-wrap(UInt<1>(0), B) - node T_1265 = mux(T_1263, T_1264, B) - node T_1266 = add-wrap(A, T_1265) - sum := T_1266 - module BrCond : - input rs1 : UInt<32> - input rs2 : UInt<32> - output taken : UInt<1> - input br_type : UInt<3> - - node eq = eq(rs1, rs2) - node neq = bit-not(eq) - node T_1267 = convert(rs1) - node T_1268 = convert(rs2) - node lt = lt(T_1267, T_1268) - node ge = bit-not(lt) - node ltu = lt(rs1, rs2) - node geu = bit-not(ltu) - node T_1269 = eq(br_type, UInt<3>(2)) - node T_1270 = bit-and(T_1269, eq) - node T_1271 = eq(br_type, UInt<3>(6)) - node T_1272 = bit-and(T_1271, neq) - node T_1273 = bit-or(T_1270, T_1272) - node T_1274 = eq(br_type, UInt<3>(1)) - node T_1275 = bit-and(T_1274, lt) - node T_1276 = bit-or(T_1273, T_1275) - node T_1277 = eq(br_type, UInt<3>(5)) - node T_1278 = bit-and(T_1277, ge) - node T_1279 = bit-or(T_1276, T_1278) - node T_1280 = eq(br_type, UInt<3>(0)) - node T_1281 = bit-and(T_1280, ltu) - node T_1282 = bit-or(T_1279, T_1281) - node T_1283 = eq(br_type, UInt<3>(4)) - node T_1284 = bit-and(T_1283, geu) - node T_1285 = bit-or(T_1282, T_1284) - taken := T_1285 - module RegFile : - input raddr1 : UInt<5> - input raddr2 : UInt<5> - output rdata1 : UInt<32> - output rdata2 : UInt<32> - input wen : UInt<1> - input waddr : UInt<5> - input wdata : UInt<32> - - mem regs : UInt<32>[32] - node T_1286 = eq(raddr1, UInt<1>(0)) - node T_1287 = bit-not(T_1286) - accessor T_1288 = regs[raddr1] - node T_1289 = mux(T_1287, T_1288, UInt<1>(0)) - rdata1 := T_1289 - node T_1290 = eq(raddr2, UInt<1>(0)) - node T_1291 = bit-not(T_1290) - accessor T_1292 = regs[raddr2] - node T_1293 = mux(T_1291, T_1292, UInt<1>(0)) - rdata2 := T_1293 - node T_1294 = eq(waddr, UInt<1>(0)) - node T_1295 = bit-not(T_1294) - node T_1296 = bit-and(wen, T_1295) - when T_1296 : - accessor T_1297 = regs[waddr] - T_1297 := wdata - module ImmGenWire : - output out : UInt<32> - input sel : UInt<3> - input inst : UInt<32> - - node T_1298 = bits(inst, 31, 20) - node Iimm = convert(T_1298) - node T_1299 = bits(inst, 31, 25) - node T_1300 = bits(inst, 11, 7) - node T_1301 = cat(T_1299, T_1300) - node Simm = convert(T_1301) - node T_1302 = bit(inst, 31) - node T_1303 = bit(inst, 7) - node T_1304 = bits(inst, 30, 25) - node T_1305 = bits(inst, 11, 8) - node T_1306 = cat(T_1302, T_1303) - node T_1307 = cat(T_1305, UInt<1>(0)) - node T_1308 = cat(T_1304, T_1307) - node T_1309 = cat(T_1306, T_1308) - node Bimm = convert(T_1309) - node T_1310 = bits(inst, 31, 12) - node T_1311 = cat(T_1310, UInt<12>(0)) - node Uimm = convert(T_1311) - node T_1312 = bit(inst, 31) - node T_1313 = bits(inst, 19, 12) - node T_1314 = bit(inst, 20) - node T_1315 = bits(inst, 30, 25) - node T_1316 = bits(inst, 24, 21) - node T_1317 = cat(T_1313, T_1314) - node T_1318 = cat(T_1312, T_1317) - node T_1319 = cat(T_1316, UInt<1>(0)) - node T_1320 = cat(T_1315, T_1319) - node T_1321 = cat(T_1318, T_1320) - node Jimm = convert(T_1321) - node T_1322 = bits(inst, 19, 15) - node T_1323 = Pad(T_1322, 32) - node Zimm = convert(T_1323) - node T_1324 = eq(UInt<3>(3), sel) - node T_1325 = mux(T_1324, Jimm, Zimm) - node T_1326 = eq(UInt<3>(2), sel) - node T_1327 = mux(T_1326, Uimm, T_1325) - node T_1328 = eq(UInt<3>(4), sel) - node T_1329 = mux(T_1328, Bimm, T_1327) - node T_1330 = eq(UInt<3>(1), sel) - node T_1331 = mux(T_1330, Simm, T_1329) - node T_1332 = eq(UInt<3>(0), sel) - node T_1333 = mux(T_1332, Iimm, T_1331) - node T_1334 = as-UInt(T_1333) - out := T_1334 - module CSR : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input src : UInt<32> - input cmd : UInt<2> - output data : UInt<32> - input addr : UInt<12> - - reg reg_tohost : UInt<32> - on-reset reg_tohost := UInt<32>(0) - reg reg_status : UInt<32> - on-reset reg_status := UInt<32>(0) - host.tohost := reg_tohost - host.status := reg_status - node T_1335 = eq(UInt<12>(1291), addr) - node T_1336 = mux(T_1335, host.hid, UInt<1>(0)) - node T_1337 = eq(UInt<12>(1290), addr) - node T_1338 = mux(T_1337, reg_status, T_1336) - node T_1339 = eq(UInt<12>(1310), addr) - node T_1340 = mux(T_1339, reg_tohost, T_1338) - data := T_1340 - node T_1341 = eq(cmd, UInt<2>(1)) - when T_1341 : - node T_1342 = eq(addr, UInt<12>(1310)) - when T_1342 : reg_tohost := src - node T_1343 = eq(addr, UInt<12>(1290)) - when T_1343 : reg_status := src - node T_1344 = eq(cmd, UInt<2>(2)) - node T_1345 = neq(src, UInt<1>(0)) - node T_1346 = bit-and(T_1344, T_1345) - when T_1346 : - node T_1347 = eq(addr, UInt<12>(1310)) - when T_1347 : - node T_1348 = dshl(UInt<1>(1), src) - node T_1349 = bit-or(data, T_1348) - reg_tohost := T_1349 - node T_1350 = eq(addr, UInt<12>(1290)) - when T_1350 : - node T_1351 = dshl(UInt<1>(1), src) - node T_1352 = bit-or(data, T_1351) - reg_status := T_1352 - node T_1353 = eq(cmd, UInt<2>(3)) - node T_1354 = neq(src, UInt<1>(0)) - node T_1355 = bit-and(T_1353, T_1354) - when T_1355 : - node T_1356 = eq(addr, UInt<12>(1310)) - when T_1356 : - node T_1357 = dshl(UInt<1>(0), src) - node T_1358 = bit-and(data, T_1357) - reg_tohost := T_1358 - node T_1359 = eq(addr, UInt<12>(1290)) - when T_1359 : - node T_1360 = dshl(UInt<1>(0), src) - node T_1361 = bit-and(data, T_1360) - reg_status := T_1361 - module Datapath : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - input ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, pc_sel : UInt<1>, inst_re : UInt<1>, A_sel : UInt<1>, inst_type : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} - input stall : UInt<1> - output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - - inst alu of ALU - inst brCond of BrCond - inst regFile of RegFile - inst immGen of ImmGenWire - reg fe_inst : UInt<32> - on-reset fe_inst := UInt<32>(0) - reg fe_pc : UInt - reg ew_inst : UInt<32> - on-reset ew_inst := UInt<32>(0) - reg ew_pc : UInt - reg ew_alu : UInt - node T_1362 = sub-wrap(UInt<14>(8192), UInt<32>(4)) - reg pc : UInt<32> - on-reset pc := T_1362 - node T_1363 = eq(ctrl.pc_sel, UInt<1>(1)) - node T_1364 = bit-or(T_1363, brCond.taken) - node T_1365 = add-wrap(pc, UInt<3>(4)) - node iaddr = mux(T_1364, alu.sum, T_1365) - node T_1366 = eq(ctrl.inst_type, UInt<1>(1)) - node T_1367 = bit-or(T_1366, brCond.taken) - node inst = mux(T_1367, UInt<32>(19), icache.dout) - icache.we := UInt<1>(0) - icache.din := UInt<1>(0) - icache.addr := iaddr - icache.re := ctrl.inst_re - node T_1368 = eq(dcache.we, UInt<1>(0)) - node T_1369 = bit-not(T_1368) - node T_1370 = bit-not(T_1369) - node T_1371 = bit-and(icache.re, T_1370) - node T_1372 = mux(T_1371, iaddr, pc) - pc := T_1372 - node T_1373 = bit-not(stall) - when T_1373 : - fe_pc := pc - fe_inst := inst - ctrl.inst := fe_inst - ctrl.stall := stall - node rd_addr = bits(fe_inst, 11, 7) - node rs1_addr = bits(fe_inst, 19, 15) - node rs2_addr = bits(fe_inst, 24, 20) - regFile.raddr1 := rs1_addr - regFile.raddr2 := rs2_addr - immGen.inst := fe_inst - immGen.sel := ctrl.imm_sel - node T_1374 = eq(rs1_addr, UInt<1>(0)) - node rs1NotZero = bit-not(T_1374) - node T_1375 = eq(rs2_addr, UInt<1>(0)) - node rs2NotZero = bit-not(T_1375) - node T_1376 = eq(ctrl.wb_sel, UInt<2>(0)) - node alutype = bit-and(ctrl.wb_en, T_1376) - node ex_rd_addr = bits(ew_inst, 11, 7) - node T_1377 = bit-and(alutype, rs1NotZero) - node T_1378 = eq(rs1_addr, ex_rd_addr) - node T_1379 = bit-and(T_1377, T_1378) - node rs1 = mux(T_1379, ew_alu, regFile.rdata1) - node T_1380 = bit-and(alutype, rs2NotZero) - node T_1381 = eq(rs2_addr, ex_rd_addr) - node T_1382 = bit-and(T_1380, T_1381) - node rs2 = mux(T_1382, ew_alu, regFile.rdata2) - node T_1383 = eq(ctrl.A_sel, UInt<1>(0)) - node T_1384 = mux(T_1383, rs1, fe_pc) - alu.A := T_1384 - node T_1385 = eq(ctrl.B_sel, UInt<1>(0)) - node T_1386 = mux(T_1385, rs2, immGen.out) - alu.B := T_1386 - alu.alu_op := ctrl.alu_op - brCond.rs1 := rs1 - brCond.rs2 := rs2 - brCond.br_type := ctrl.br_type - node T_1387 = bit(alu.sum, 1) - node T_1388 = dshl(T_1387, UInt<3>(4)) - node T_1389 = bit(alu.sum, 0) - node T_1390 = dshl(T_1389, UInt<2>(3)) - node woffset = bit-or(T_1388, T_1390) - dcache.re := ctrl.data_re - node T_1391 = mux(stall, ew_alu, alu.sum) - dcache.addr := T_1391 - node T_1392 = bits(alu.sum, 1, 0) - node T_1393 = dshl(UInt<2>(3), T_1392) - node T_1394 = bits(T_1393, 3, 0) - node T_1395 = bits(alu.sum, 1, 0) - node T_1396 = dshl(UInt<1>(1), T_1395) - node T_1397 = bits(T_1396, 3, 0) - node T_1398 = eq(UInt<2>(2), ctrl.st_type) - node T_1399 = mux(T_1398, T_1397, UInt<4>(0)) - node T_1400 = eq(UInt<2>(1), ctrl.st_type) - node T_1401 = mux(T_1400, T_1394, T_1399) - node T_1402 = eq(UInt<2>(0), ctrl.st_type) - node T_1403 = mux(T_1402, UInt<4>(15), T_1401) - node T_1404 = mux(stall, UInt<4>(0), T_1403) - dcache.we := T_1404 - node T_1405 = dshl(rs2, woffset) - node T_1406 = bits(T_1405, 31, 0) - dcache.din := T_1406 - node T_1407 = bit-not(stall) - when T_1407 : - ew_pc := fe_pc - ew_inst := fe_inst - ew_alu := alu.out - node T_1408 = bit(ew_alu, 1) - node T_1409 = dshl(T_1408, UInt<3>(4)) - node T_1410 = bit(ew_alu, 0) - node T_1411 = dshl(T_1410, UInt<2>(3)) - node loffset = bit-or(T_1409, T_1411) - node lshift = dshr(dcache.dout, loffset) - node T_1412 = bits(lshift, 15, 0) - node T_1413 = convert(T_1412) - node T_1414 = Pad(T_1413, 32) - node T_1415 = as-UInt(T_1414) - node T_1416 = bits(lshift, 7, 0) - node T_1417 = convert(T_1416) - node T_1418 = Pad(T_1417, 32) - node T_1419 = as-UInt(T_1418) - node T_1420 = bits(lshift, 15, 0) - node T_1421 = bits(lshift, 7, 0) - node T_1422 = eq(UInt<3>(4), ctrl.ld_type) - node T_1423 = mux(T_1422, T_1421, dcache.dout) - node T_1424 = eq(UInt<3>(3), ctrl.ld_type) - node T_1425 = mux(T_1424, T_1420, T_1423) - node T_1426 = eq(UInt<3>(2), ctrl.ld_type) - node T_1427 = mux(T_1426, T_1419, T_1425) - node T_1428 = eq(UInt<3>(1), ctrl.ld_type) - node load = mux(T_1428, T_1415, T_1427) - inst csr of CSR - host := csr.host - csr.src := ew_alu - node T_1429 = bits(ew_inst, 31, 20) - csr.addr := T_1429 - csr.cmd := ctrl.csr_cmd - node T_1430 = add-wrap(ew_pc, UInt<3>(4)) - node T_1431 = eq(UInt<2>(3), ctrl.wb_sel) - node T_1432 = mux(T_1431, csr.data, ew_alu) - node T_1433 = eq(UInt<2>(2), ctrl.wb_sel) - node T_1434 = mux(T_1433, T_1430, T_1432) - node T_1435 = eq(UInt<2>(1), ctrl.wb_sel) - node regWrite = mux(T_1435, load, T_1434) - regFile.wen := ctrl.wb_en - regFile.waddr := ex_rd_addr - regFile.wdata := regWrite - module Control : - output ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, pc_sel : UInt<1>, inst_re : UInt<1>, A_sel : UInt<1>, inst_type : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} - - node T_1436 = bit-and(UInt<7>(127), ctrl.inst) - node T_1437 = eq(T_1436, UInt<6>(55)) - node T_1438 = bit-and(UInt<7>(127), ctrl.inst) - node T_1439 = eq(T_1438, UInt<5>(23)) - node T_1440 = bit-and(UInt<7>(127), ctrl.inst) - node T_1441 = eq(T_1440, UInt<7>(111)) - node T_1442 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1443 = eq(T_1442, UInt<7>(103)) - node T_1444 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1445 = eq(T_1444, UInt<7>(99)) - node T_1446 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1447 = eq(T_1446, UInt<13>(4195)) - node T_1448 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1449 = eq(T_1448, UInt<15>(16483)) - node T_1450 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1451 = eq(T_1450, UInt<15>(20579)) - node T_1452 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1453 = eq(T_1452, UInt<15>(24675)) - node T_1454 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1455 = eq(T_1454, UInt<15>(28771)) - node T_1456 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1457 = eq(T_1456, UInt<2>(3)) - node T_1458 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1459 = eq(T_1458, UInt<13>(4099)) - node T_1460 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1461 = eq(T_1460, UInt<14>(8195)) - node T_1462 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1463 = eq(T_1462, UInt<15>(16387)) - node T_1464 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1465 = eq(T_1464, UInt<15>(20483)) - node T_1466 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1467 = eq(T_1466, UInt<6>(35)) - node T_1468 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1469 = eq(T_1468, UInt<13>(4131)) - node T_1470 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1471 = eq(T_1470, UInt<14>(8227)) - node T_1472 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1473 = eq(T_1472, UInt<5>(19)) - node T_1474 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1475 = eq(T_1474, UInt<14>(8211)) - node T_1476 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1477 = eq(T_1476, UInt<14>(12307)) - node T_1478 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1479 = eq(T_1478, UInt<15>(16403)) - node T_1480 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1481 = eq(T_1480, UInt<15>(24595)) - node T_1482 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1483 = eq(T_1482, UInt<15>(28691)) - node T_1484 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1485 = eq(T_1484, UInt<13>(4115)) - node T_1486 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1487 = eq(T_1486, UInt<15>(20499)) - node T_1488 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1489 = eq(T_1488, UInt<31>(1073762323)) - node T_1490 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1491 = eq(T_1490, UInt<6>(51)) - node T_1492 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1493 = eq(T_1492, UInt<31>(1073741875)) - node T_1494 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1495 = eq(T_1494, UInt<13>(4147)) - node T_1496 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1497 = eq(T_1496, UInt<14>(8243)) - node T_1498 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1499 = eq(T_1498, UInt<14>(12339)) - node T_1500 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1501 = eq(T_1500, UInt<15>(16435)) - node T_1502 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1503 = eq(T_1502, UInt<15>(20531)) - node T_1504 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1505 = eq(T_1504, UInt<31>(1073762355)) - node T_1506 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1507 = eq(T_1506, UInt<15>(24627)) - node T_1508 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1509 = eq(T_1508, UInt<15>(28723)) - node T_1510 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1511 = eq(T_1510, UInt<13>(4211)) - node T_1512 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1513 = eq(T_1512, UInt<14>(8307)) - node T_1514 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1515 = eq(T_1514, UInt<14>(12403)) - node T_1516 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1517 = eq(T_1516, UInt<15>(20595)) - node T_1518 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1519 = eq(T_1518, UInt<15>(24691)) - node T_1520 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1521 = eq(T_1520, UInt<15>(28787)) - node T_1522 = mux(T_1521, UInt<1>(0), UInt<1>(0)) - node T_1523 = mux(T_1519, UInt<1>(0), T_1522) - node T_1524 = mux(T_1517, UInt<1>(0), T_1523) - node T_1525 = mux(T_1515, UInt<1>(0), T_1524) - node T_1526 = mux(T_1513, UInt<1>(0), T_1525) - node T_1527 = mux(T_1511, UInt<1>(0), T_1526) - node T_1528 = mux(T_1509, UInt<1>(0), T_1527) - node T_1529 = mux(T_1507, UInt<1>(0), T_1528) - node T_1530 = mux(T_1505, UInt<1>(0), T_1529) - node T_1531 = mux(T_1503, UInt<1>(0), T_1530) - node T_1532 = mux(T_1501, UInt<1>(0), T_1531) - node T_1533 = mux(T_1499, UInt<1>(0), T_1532) - node T_1534 = mux(T_1497, UInt<1>(0), T_1533) - node T_1535 = mux(T_1495, UInt<1>(0), T_1534) - node T_1536 = mux(T_1493, UInt<1>(0), T_1535) - node T_1537 = mux(T_1491, UInt<1>(0), T_1536) - node T_1538 = mux(T_1489, UInt<1>(0), T_1537) - node T_1539 = mux(T_1487, UInt<1>(0), T_1538) - node T_1540 = mux(T_1485, UInt<1>(0), T_1539) - node T_1541 = mux(T_1483, UInt<1>(0), T_1540) - node T_1542 = mux(T_1481, UInt<1>(0), T_1541) - node T_1543 = mux(T_1479, UInt<1>(0), T_1542) - node T_1544 = mux(T_1477, UInt<1>(0), T_1543) - node T_1545 = mux(T_1475, UInt<1>(0), T_1544) - node T_1546 = mux(T_1473, UInt<1>(0), T_1545) - node T_1547 = mux(T_1471, UInt<1>(0), T_1546) - node T_1548 = mux(T_1469, UInt<1>(0), T_1547) - node T_1549 = mux(T_1467, UInt<1>(0), T_1548) - node T_1550 = mux(T_1465, UInt<1>(0), T_1549) - node T_1551 = mux(T_1463, UInt<1>(0), T_1550) - node T_1552 = mux(T_1461, UInt<1>(0), T_1551) - node T_1553 = mux(T_1459, UInt<1>(0), T_1552) - node T_1554 = mux(T_1457, UInt<1>(0), T_1553) - node T_1555 = mux(T_1455, UInt<1>(0), T_1554) - node T_1556 = mux(T_1453, UInt<1>(0), T_1555) - node T_1557 = mux(T_1451, UInt<1>(0), T_1556) - node T_1558 = mux(T_1449, UInt<1>(0), T_1557) - node T_1559 = mux(T_1447, UInt<1>(0), T_1558) - node T_1560 = mux(T_1445, UInt<1>(0), T_1559) - node T_1561 = mux(T_1443, UInt<1>(1), T_1560) - node T_1562 = mux(T_1441, UInt<1>(1), T_1561) - node T_1563 = mux(T_1439, UInt<1>(0), T_1562) - node T_1564 = mux(T_1437, UInt<1>(0), T_1563) - node T_1565 = mux(T_1521, UInt<1>(1), UInt<1>(1)) - node T_1566 = mux(T_1519, UInt<1>(1), T_1565) - node T_1567 = mux(T_1517, UInt<1>(1), T_1566) - node T_1568 = mux(T_1515, UInt<1>(0), T_1567) - node T_1569 = mux(T_1513, UInt<1>(0), T_1568) - node T_1570 = mux(T_1511, UInt<1>(0), T_1569) - node T_1571 = mux(T_1509, UInt<1>(0), T_1570) - node T_1572 = mux(T_1507, UInt<1>(0), T_1571) - node T_1573 = mux(T_1505, UInt<1>(0), T_1572) - node T_1574 = mux(T_1503, UInt<1>(0), T_1573) - node T_1575 = mux(T_1501, UInt<1>(0), T_1574) - node T_1576 = mux(T_1499, UInt<1>(0), T_1575) - node T_1577 = mux(T_1497, UInt<1>(0), T_1576) - node T_1578 = mux(T_1495, UInt<1>(0), T_1577) - node T_1579 = mux(T_1493, UInt<1>(0), T_1578) - node T_1580 = mux(T_1491, UInt<1>(0), T_1579) - node T_1581 = mux(T_1489, UInt<1>(0), T_1580) - node T_1582 = mux(T_1487, UInt<1>(0), T_1581) - node T_1583 = mux(T_1485, UInt<1>(0), T_1582) - node T_1584 = mux(T_1483, UInt<1>(0), T_1583) - node T_1585 = mux(T_1481, UInt<1>(0), T_1584) - node T_1586 = mux(T_1479, UInt<1>(0), T_1585) - node T_1587 = mux(T_1477, UInt<1>(0), T_1586) - node T_1588 = mux(T_1475, UInt<1>(0), T_1587) - node T_1589 = mux(T_1473, UInt<1>(0), T_1588) - node T_1590 = mux(T_1471, UInt<1>(0), T_1589) - node T_1591 = mux(T_1469, UInt<1>(0), T_1590) - node T_1592 = mux(T_1467, UInt<1>(0), T_1591) - node T_1593 = mux(T_1465, UInt<1>(0), T_1592) - node T_1594 = mux(T_1463, UInt<1>(0), T_1593) - node T_1595 = mux(T_1461, UInt<1>(0), T_1594) - node T_1596 = mux(T_1459, UInt<1>(0), T_1595) - node T_1597 = mux(T_1457, UInt<1>(0), T_1596) - node T_1598 = mux(T_1455, UInt<1>(1), T_1597) - node T_1599 = mux(T_1453, UInt<1>(1), T_1598) - node T_1600 = mux(T_1451, UInt<1>(1), T_1599) - node T_1601 = mux(T_1449, UInt<1>(1), T_1600) - node T_1602 = mux(T_1447, UInt<1>(1), T_1601) - node T_1603 = mux(T_1445, UInt<1>(1), T_1602) - node T_1604 = mux(T_1443, UInt<1>(0), T_1603) - node T_1605 = mux(T_1441, UInt<1>(1), T_1604) - node T_1606 = mux(T_1439, UInt<1>(1), T_1605) - node T_1607 = mux(T_1437, UInt<1>(1), T_1606) - node T_1608 = mux(T_1521, UInt<1>(1), UInt<1>(0)) - node T_1609 = mux(T_1519, UInt<1>(1), T_1608) - node T_1610 = mux(T_1517, UInt<1>(1), T_1609) - node T_1611 = mux(T_1515, UInt<1>(0), T_1610) - node T_1612 = mux(T_1513, UInt<1>(0), T_1611) - node T_1613 = mux(T_1511, UInt<1>(0), T_1612) - node T_1614 = mux(T_1509, UInt<1>(0), T_1613) - node T_1615 = mux(T_1507, UInt<1>(0), T_1614) - node T_1616 = mux(T_1505, UInt<1>(0), T_1615) - node T_1617 = mux(T_1503, UInt<1>(0), T_1616) - node T_1618 = mux(T_1501, UInt<1>(0), T_1617) - node T_1619 = mux(T_1499, UInt<1>(0), T_1618) - node T_1620 = mux(T_1497, UInt<1>(0), T_1619) - node T_1621 = mux(T_1495, UInt<1>(0), T_1620) - node T_1622 = mux(T_1493, UInt<1>(0), T_1621) - node T_1623 = mux(T_1491, UInt<1>(0), T_1622) - node T_1624 = mux(T_1489, UInt<1>(1), T_1623) - node T_1625 = mux(T_1487, UInt<1>(1), T_1624) - node T_1626 = mux(T_1485, UInt<1>(1), T_1625) - node T_1627 = mux(T_1483, UInt<1>(1), T_1626) - node T_1628 = mux(T_1481, UInt<1>(1), T_1627) - node T_1629 = mux(T_1479, UInt<1>(1), T_1628) - node T_1630 = mux(T_1477, UInt<1>(1), T_1629) - node T_1631 = mux(T_1475, UInt<1>(1), T_1630) - node T_1632 = mux(T_1473, UInt<1>(1), T_1631) - node T_1633 = mux(T_1471, UInt<1>(1), T_1632) - node T_1634 = mux(T_1469, UInt<1>(1), T_1633) - node T_1635 = mux(T_1467, UInt<1>(1), T_1634) - node T_1636 = mux(T_1465, UInt<1>(1), T_1635) - node T_1637 = mux(T_1463, UInt<1>(1), T_1636) - node T_1638 = mux(T_1461, UInt<1>(1), T_1637) - node T_1639 = mux(T_1459, UInt<1>(1), T_1638) - node T_1640 = mux(T_1457, UInt<1>(1), T_1639) - node T_1641 = mux(T_1455, UInt<1>(1), T_1640) - node T_1642 = mux(T_1453, UInt<1>(1), T_1641) - node T_1643 = mux(T_1451, UInt<1>(1), T_1642) - node T_1644 = mux(T_1449, UInt<1>(1), T_1643) - node T_1645 = mux(T_1447, UInt<1>(1), T_1644) - node T_1646 = mux(T_1445, UInt<1>(1), T_1645) - node T_1647 = mux(T_1443, UInt<1>(1), T_1646) - node T_1648 = mux(T_1441, UInt<1>(1), T_1647) - node T_1649 = mux(T_1439, UInt<1>(1), T_1648) - node T_1650 = mux(T_1437, UInt<1>(1), T_1649) - node T_1651 = mux(T_1521, UInt<3>(5), UInt<3>(7)) - node T_1652 = mux(T_1519, UInt<3>(5), T_1651) - node T_1653 = mux(T_1517, UInt<3>(5), T_1652) - node T_1654 = mux(T_1515, UInt<3>(5), T_1653) - node T_1655 = mux(T_1513, UInt<3>(5), T_1654) - node T_1656 = mux(T_1511, UInt<3>(5), T_1655) - node T_1657 = mux(T_1509, UInt<3>(7), T_1656) - node T_1658 = mux(T_1507, UInt<3>(7), T_1657) - node T_1659 = mux(T_1505, UInt<3>(7), T_1658) - node T_1660 = mux(T_1503, UInt<3>(7), T_1659) - node T_1661 = mux(T_1501, UInt<3>(7), T_1660) - node T_1662 = mux(T_1499, UInt<3>(7), T_1661) - node T_1663 = mux(T_1497, UInt<3>(7), T_1662) - node T_1664 = mux(T_1495, UInt<3>(7), T_1663) - node T_1665 = mux(T_1493, UInt<3>(7), T_1664) - node T_1666 = mux(T_1491, UInt<3>(7), T_1665) - node T_1667 = mux(T_1489, UInt<3>(0), T_1666) - node T_1668 = mux(T_1487, UInt<3>(0), T_1667) - node T_1669 = mux(T_1485, UInt<3>(0), T_1668) - node T_1670 = mux(T_1483, UInt<3>(0), T_1669) - node T_1671 = mux(T_1481, UInt<3>(0), T_1670) - node T_1672 = mux(T_1479, UInt<3>(0), T_1671) - node T_1673 = mux(T_1477, UInt<3>(0), T_1672) - node T_1674 = mux(T_1475, UInt<3>(0), T_1673) - node T_1675 = mux(T_1473, UInt<3>(0), T_1674) - node T_1676 = mux(T_1471, UInt<3>(1), T_1675) - node T_1677 = mux(T_1469, UInt<3>(1), T_1676) - node T_1678 = mux(T_1467, UInt<3>(1), T_1677) - node T_1679 = mux(T_1465, UInt<3>(0), T_1678) - node T_1680 = mux(T_1463, UInt<3>(0), T_1679) - node T_1681 = mux(T_1461, UInt<3>(0), T_1680) - node T_1682 = mux(T_1459, UInt<3>(0), T_1681) - node T_1683 = mux(T_1457, UInt<3>(0), T_1682) - node T_1684 = mux(T_1455, UInt<3>(4), T_1683) - node T_1685 = mux(T_1453, UInt<3>(4), T_1684) - node T_1686 = mux(T_1451, UInt<3>(4), T_1685) - node T_1687 = mux(T_1449, UInt<3>(4), T_1686) - node T_1688 = mux(T_1447, UInt<3>(4), T_1687) - node T_1689 = mux(T_1445, UInt<3>(4), T_1688) - node T_1690 = mux(T_1443, UInt<3>(0), T_1689) - node T_1691 = mux(T_1441, UInt<3>(3), T_1690) - node T_1692 = mux(T_1439, UInt<3>(2), T_1691) - node T_1693 = mux(T_1437, UInt<3>(2), T_1692) - node T_1694 = mux(T_1521, UInt<4>(11), UInt<4>(15)) - node T_1695 = mux(T_1519, UInt<4>(11), T_1694) - node T_1696 = mux(T_1517, UInt<4>(11), T_1695) - node T_1697 = mux(T_1515, UInt<4>(10), T_1696) - node T_1698 = mux(T_1513, UInt<4>(10), T_1697) - node T_1699 = mux(T_1511, UInt<4>(10), T_1698) - node T_1700 = mux(T_1509, UInt<4>(2), T_1699) - node T_1701 = mux(T_1507, UInt<4>(3), T_1700) - node T_1702 = mux(T_1505, UInt<4>(9), T_1701) - node T_1703 = mux(T_1503, UInt<4>(8), T_1702) - node T_1704 = mux(T_1501, UInt<4>(4), T_1703) - node T_1705 = mux(T_1499, UInt<4>(7), T_1704) - node T_1706 = mux(T_1497, UInt<4>(5), T_1705) - node T_1707 = mux(T_1495, UInt<4>(6), T_1706) - node T_1708 = mux(T_1493, UInt<4>(1), T_1707) - node T_1709 = mux(T_1491, UInt<4>(0), T_1708) - node T_1710 = mux(T_1489, UInt<4>(9), T_1709) - node T_1711 = mux(T_1487, UInt<4>(8), T_1710) - node T_1712 = mux(T_1485, UInt<4>(6), T_1711) - node T_1713 = mux(T_1483, UInt<4>(2), T_1712) - node T_1714 = mux(T_1481, UInt<4>(3), T_1713) - node T_1715 = mux(T_1479, UInt<4>(4), T_1714) - node T_1716 = mux(T_1477, UInt<4>(7), T_1715) - node T_1717 = mux(T_1475, UInt<4>(5), T_1716) - node T_1718 = mux(T_1473, UInt<4>(0), T_1717) - node T_1719 = mux(T_1471, UInt<4>(0), T_1718) - node T_1720 = mux(T_1469, UInt<4>(0), T_1719) - node T_1721 = mux(T_1467, UInt<4>(0), T_1720) - node T_1722 = mux(T_1465, UInt<4>(0), T_1721) - node T_1723 = mux(T_1463, UInt<4>(0), T_1722) - node T_1724 = mux(T_1461, UInt<4>(0), T_1723) - node T_1725 = mux(T_1459, UInt<4>(0), T_1724) - node T_1726 = mux(T_1457, UInt<4>(0), T_1725) - node T_1727 = mux(T_1455, UInt<4>(0), T_1726) - node T_1728 = mux(T_1453, UInt<4>(0), T_1727) - node T_1729 = mux(T_1451, UInt<4>(0), T_1728) - node T_1730 = mux(T_1449, UInt<4>(0), T_1729) - node T_1731 = mux(T_1447, UInt<4>(0), T_1730) - node T_1732 = mux(T_1445, UInt<4>(0), T_1731) - node T_1733 = mux(T_1443, UInt<4>(0), T_1732) - node T_1734 = mux(T_1441, UInt<4>(0), T_1733) - node T_1735 = mux(T_1439, UInt<4>(0), T_1734) - node T_1736 = mux(T_1437, UInt<4>(11), T_1735) - node T_1737 = mux(T_1521, UInt<3>(7), UInt<3>(7)) - node T_1738 = mux(T_1519, UInt<3>(7), T_1737) - node T_1739 = mux(T_1517, UInt<3>(7), T_1738) - node T_1740 = mux(T_1515, UInt<3>(7), T_1739) - node T_1741 = mux(T_1513, UInt<3>(7), T_1740) - node T_1742 = mux(T_1511, UInt<3>(7), T_1741) - node T_1743 = mux(T_1509, UInt<3>(7), T_1742) - node T_1744 = mux(T_1507, UInt<3>(7), T_1743) - node T_1745 = mux(T_1505, UInt<3>(7), T_1744) - node T_1746 = mux(T_1503, UInt<3>(7), T_1745) - node T_1747 = mux(T_1501, UInt<3>(7), T_1746) - node T_1748 = mux(T_1499, UInt<3>(7), T_1747) - node T_1749 = mux(T_1497, UInt<3>(7), T_1748) - node T_1750 = mux(T_1495, UInt<3>(7), T_1749) - node T_1751 = mux(T_1493, UInt<3>(7), T_1750) - node T_1752 = mux(T_1491, UInt<3>(7), T_1751) - node T_1753 = mux(T_1489, UInt<3>(7), T_1752) - node T_1754 = mux(T_1487, UInt<3>(7), T_1753) - node T_1755 = mux(T_1485, UInt<3>(7), T_1754) - node T_1756 = mux(T_1483, UInt<3>(7), T_1755) - node T_1757 = mux(T_1481, UInt<3>(7), T_1756) - node T_1758 = mux(T_1479, UInt<3>(7), T_1757) - node T_1759 = mux(T_1477, UInt<3>(7), T_1758) - node T_1760 = mux(T_1475, UInt<3>(7), T_1759) - node T_1761 = mux(T_1473, UInt<3>(7), T_1760) - node T_1762 = mux(T_1471, UInt<3>(7), T_1761) - node T_1763 = mux(T_1469, UInt<3>(7), T_1762) - node T_1764 = mux(T_1467, UInt<3>(7), T_1763) - node T_1765 = mux(T_1465, UInt<3>(7), T_1764) - node T_1766 = mux(T_1463, UInt<3>(7), T_1765) - node T_1767 = mux(T_1461, UInt<3>(7), T_1766) - node T_1768 = mux(T_1459, UInt<3>(7), T_1767) - node T_1769 = mux(T_1457, UInt<3>(7), T_1768) - node T_1770 = mux(T_1455, UInt<3>(4), T_1769) - node T_1771 = mux(T_1453, UInt<3>(0), T_1770) - node T_1772 = mux(T_1451, UInt<3>(5), T_1771) - node T_1773 = mux(T_1449, UInt<3>(1), T_1772) - node T_1774 = mux(T_1447, UInt<3>(6), T_1773) - node T_1775 = mux(T_1445, UInt<3>(2), T_1774) - node T_1776 = mux(T_1443, UInt<3>(7), T_1775) - node T_1777 = mux(T_1441, UInt<3>(7), T_1776) - node T_1778 = mux(T_1439, UInt<3>(7), T_1777) - node T_1779 = mux(T_1437, UInt<3>(7), T_1778) - node T_1780 = mux(T_1521, UInt<1>(0), UInt<1>(0)) - node T_1781 = mux(T_1519, UInt<1>(0), T_1780) - node T_1782 = mux(T_1517, UInt<1>(0), T_1781) - node T_1783 = mux(T_1515, UInt<1>(0), T_1782) - node T_1784 = mux(T_1513, UInt<1>(0), T_1783) - node T_1785 = mux(T_1511, UInt<1>(0), T_1784) - node T_1786 = mux(T_1509, UInt<1>(0), T_1785) - node T_1787 = mux(T_1507, UInt<1>(0), T_1786) - node T_1788 = mux(T_1505, UInt<1>(0), T_1787) - node T_1789 = mux(T_1503, UInt<1>(0), T_1788) - node T_1790 = mux(T_1501, UInt<1>(0), T_1789) - node T_1791 = mux(T_1499, UInt<1>(0), T_1790) - node T_1792 = mux(T_1497, UInt<1>(0), T_1791) - node T_1793 = mux(T_1495, UInt<1>(0), T_1792) - node T_1794 = mux(T_1493, UInt<1>(0), T_1793) - node T_1795 = mux(T_1491, UInt<1>(0), T_1794) - node T_1796 = mux(T_1489, UInt<1>(0), T_1795) - node T_1797 = mux(T_1487, UInt<1>(0), T_1796) - node T_1798 = mux(T_1485, UInt<1>(0), T_1797) - node T_1799 = mux(T_1483, UInt<1>(0), T_1798) - node T_1800 = mux(T_1481, UInt<1>(0), T_1799) - node T_1801 = mux(T_1479, UInt<1>(0), T_1800) - node T_1802 = mux(T_1477, UInt<1>(0), T_1801) - node T_1803 = mux(T_1475, UInt<1>(0), T_1802) - node T_1804 = mux(T_1473, UInt<1>(0), T_1803) - node T_1805 = mux(T_1471, UInt<1>(0), T_1804) - node T_1806 = mux(T_1469, UInt<1>(0), T_1805) - node T_1807 = mux(T_1467, UInt<1>(0), T_1806) - node T_1808 = mux(T_1465, UInt<1>(0), T_1807) - node T_1809 = mux(T_1463, UInt<1>(0), T_1808) - node T_1810 = mux(T_1461, UInt<1>(0), T_1809) - node T_1811 = mux(T_1459, UInt<1>(0), T_1810) - node T_1812 = mux(T_1457, UInt<1>(0), T_1811) - node T_1813 = mux(T_1455, UInt<1>(0), T_1812) - node T_1814 = mux(T_1453, UInt<1>(0), T_1813) - node T_1815 = mux(T_1451, UInt<1>(0), T_1814) - node T_1816 = mux(T_1449, UInt<1>(0), T_1815) - node T_1817 = mux(T_1447, UInt<1>(0), T_1816) - node T_1818 = mux(T_1445, UInt<1>(0), T_1817) - node T_1819 = mux(T_1443, UInt<1>(1), T_1818) - node T_1820 = mux(T_1441, UInt<1>(1), T_1819) - node T_1821 = mux(T_1439, UInt<1>(0), T_1820) - node T_1822 = mux(T_1437, UInt<1>(0), T_1821) - node T_1823 = mux(T_1521, UInt<2>(3), UInt<2>(3)) - node T_1824 = mux(T_1519, UInt<2>(3), T_1823) - node T_1825 = mux(T_1517, UInt<2>(3), T_1824) - node T_1826 = mux(T_1515, UInt<2>(3), T_1825) - node T_1827 = mux(T_1513, UInt<2>(3), T_1826) - node T_1828 = mux(T_1511, UInt<2>(3), T_1827) - node T_1829 = mux(T_1509, UInt<2>(3), T_1828) - node T_1830 = mux(T_1507, UInt<2>(3), T_1829) - node T_1831 = mux(T_1505, UInt<2>(3), T_1830) - node T_1832 = mux(T_1503, UInt<2>(3), T_1831) - node T_1833 = mux(T_1501, UInt<2>(3), T_1832) - node T_1834 = mux(T_1499, UInt<2>(3), T_1833) - node T_1835 = mux(T_1497, UInt<2>(3), T_1834) - node T_1836 = mux(T_1495, UInt<2>(3), T_1835) - node T_1837 = mux(T_1493, UInt<2>(3), T_1836) - node T_1838 = mux(T_1491, UInt<2>(3), T_1837) - node T_1839 = mux(T_1489, UInt<2>(3), T_1838) - node T_1840 = mux(T_1487, UInt<2>(3), T_1839) - node T_1841 = mux(T_1485, UInt<2>(3), T_1840) - node T_1842 = mux(T_1483, UInt<2>(3), T_1841) - node T_1843 = mux(T_1481, UInt<2>(3), T_1842) - node T_1844 = mux(T_1479, UInt<2>(3), T_1843) - node T_1845 = mux(T_1477, UInt<2>(3), T_1844) - node T_1846 = mux(T_1475, UInt<2>(3), T_1845) - node T_1847 = mux(T_1473, UInt<2>(3), T_1846) - node T_1848 = mux(T_1471, UInt<2>(0), T_1847) - node T_1849 = mux(T_1469, UInt<2>(1), T_1848) - node T_1850 = mux(T_1467, UInt<2>(2), T_1849) - node T_1851 = mux(T_1465, UInt<2>(3), T_1850) - node T_1852 = mux(T_1463, UInt<2>(3), T_1851) - node T_1853 = mux(T_1461, UInt<2>(3), T_1852) - node T_1854 = mux(T_1459, UInt<2>(3), T_1853) - node T_1855 = mux(T_1457, UInt<2>(3), T_1854) - node T_1856 = mux(T_1455, UInt<2>(3), T_1855) - node T_1857 = mux(T_1453, UInt<2>(3), T_1856) - node T_1858 = mux(T_1451, UInt<2>(3), T_1857) - node T_1859 = mux(T_1449, UInt<2>(3), T_1858) - node T_1860 = mux(T_1447, UInt<2>(3), T_1859) - node T_1861 = mux(T_1445, UInt<2>(3), T_1860) - node T_1862 = mux(T_1443, UInt<2>(3), T_1861) - node T_1863 = mux(T_1441, UInt<2>(3), T_1862) - node T_1864 = mux(T_1439, UInt<2>(3), T_1863) - node T_1865 = mux(T_1437, UInt<2>(3), T_1864) - node T_1866 = mux(T_1521, UInt<3>(7), UInt<3>(7)) - node T_1867 = mux(T_1519, UInt<3>(7), T_1866) - node T_1868 = mux(T_1517, UInt<3>(7), T_1867) - node T_1869 = mux(T_1515, UInt<3>(7), T_1868) - node T_1870 = mux(T_1513, UInt<3>(7), T_1869) - node T_1871 = mux(T_1511, UInt<3>(7), T_1870) - node T_1872 = mux(T_1509, UInt<3>(7), T_1871) - node T_1873 = mux(T_1507, UInt<3>(7), T_1872) - node T_1874 = mux(T_1505, UInt<3>(7), T_1873) - node T_1875 = mux(T_1503, UInt<3>(7), T_1874) - node T_1876 = mux(T_1501, UInt<3>(7), T_1875) - node T_1877 = mux(T_1499, UInt<3>(7), T_1876) - node T_1878 = mux(T_1497, UInt<3>(7), T_1877) - node T_1879 = mux(T_1495, UInt<3>(7), T_1878) - node T_1880 = mux(T_1493, UInt<3>(7), T_1879) - node T_1881 = mux(T_1491, UInt<3>(7), T_1880) - node T_1882 = mux(T_1489, UInt<3>(7), T_1881) - node T_1883 = mux(T_1487, UInt<3>(7), T_1882) - node T_1884 = mux(T_1485, UInt<3>(7), T_1883) - node T_1885 = mux(T_1483, UInt<3>(7), T_1884) - node T_1886 = mux(T_1481, UInt<3>(7), T_1885) - node T_1887 = mux(T_1479, UInt<3>(7), T_1886) - node T_1888 = mux(T_1477, UInt<3>(7), T_1887) - node T_1889 = mux(T_1475, UInt<3>(7), T_1888) - node T_1890 = mux(T_1473, UInt<3>(7), T_1889) - node T_1891 = mux(T_1471, UInt<3>(7), T_1890) - node T_1892 = mux(T_1469, UInt<3>(7), T_1891) - node T_1893 = mux(T_1467, UInt<3>(7), T_1892) - node T_1894 = mux(T_1465, UInt<3>(3), T_1893) - node T_1895 = mux(T_1463, UInt<3>(4), T_1894) - node T_1896 = mux(T_1461, UInt<3>(0), T_1895) - node T_1897 = mux(T_1459, UInt<3>(1), T_1896) - node T_1898 = mux(T_1457, UInt<3>(2), T_1897) - node T_1899 = mux(T_1455, UInt<3>(7), T_1898) - node T_1900 = mux(T_1453, UInt<3>(7), T_1899) - node T_1901 = mux(T_1451, UInt<3>(7), T_1900) - node T_1902 = mux(T_1449, UInt<3>(7), T_1901) - node T_1903 = mux(T_1447, UInt<3>(7), T_1902) - node T_1904 = mux(T_1445, UInt<3>(7), T_1903) - node T_1905 = mux(T_1443, UInt<3>(7), T_1904) - node T_1906 = mux(T_1441, UInt<3>(7), T_1905) - node T_1907 = mux(T_1439, UInt<3>(7), T_1906) - node T_1908 = mux(T_1437, UInt<3>(7), T_1907) - node T_1909 = mux(T_1521, UInt<2>(3), UInt<2>(0)) - node T_1910 = mux(T_1519, UInt<2>(3), T_1909) - node T_1911 = mux(T_1517, UInt<2>(3), T_1910) - node T_1912 = mux(T_1515, UInt<2>(3), T_1911) - node T_1913 = mux(T_1513, UInt<2>(3), T_1912) - node T_1914 = mux(T_1511, UInt<2>(3), T_1913) - node T_1915 = mux(T_1509, UInt<2>(0), T_1914) - node T_1916 = mux(T_1507, UInt<2>(0), T_1915) - node T_1917 = mux(T_1505, UInt<2>(0), T_1916) - node T_1918 = mux(T_1503, UInt<2>(0), T_1917) - node T_1919 = mux(T_1501, UInt<2>(0), T_1918) - node T_1920 = mux(T_1499, UInt<2>(0), T_1919) - node T_1921 = mux(T_1497, UInt<2>(0), T_1920) - node T_1922 = mux(T_1495, UInt<2>(0), T_1921) - node T_1923 = mux(T_1493, UInt<2>(0), T_1922) - node T_1924 = mux(T_1491, UInt<2>(0), T_1923) - node T_1925 = mux(T_1489, UInt<2>(0), T_1924) - node T_1926 = mux(T_1487, UInt<2>(0), T_1925) - node T_1927 = mux(T_1485, UInt<2>(0), T_1926) - node T_1928 = mux(T_1483, UInt<2>(0), T_1927) - node T_1929 = mux(T_1481, UInt<2>(0), T_1928) - node T_1930 = mux(T_1479, UInt<2>(0), T_1929) - node T_1931 = mux(T_1477, UInt<2>(0), T_1930) - node T_1932 = mux(T_1475, UInt<2>(0), T_1931) - node T_1933 = mux(T_1473, UInt<2>(0), T_1932) - node T_1934 = mux(T_1471, UInt<2>(0), T_1933) - node T_1935 = mux(T_1469, UInt<2>(0), T_1934) - node T_1936 = mux(T_1467, UInt<2>(0), T_1935) - node T_1937 = mux(T_1465, UInt<2>(1), T_1936) - node T_1938 = mux(T_1463, UInt<2>(1), T_1937) - node T_1939 = mux(T_1461, UInt<2>(1), T_1938) - node T_1940 = mux(T_1459, UInt<2>(1), T_1939) - node T_1941 = mux(T_1457, UInt<2>(1), T_1940) - node T_1942 = mux(T_1455, UInt<2>(0), T_1941) - node T_1943 = mux(T_1453, UInt<2>(0), T_1942) - node T_1944 = mux(T_1451, UInt<2>(0), T_1943) - node T_1945 = mux(T_1449, UInt<2>(0), T_1944) - node T_1946 = mux(T_1447, UInt<2>(0), T_1945) - node T_1947 = mux(T_1445, UInt<2>(0), T_1946) - node T_1948 = mux(T_1443, UInt<2>(2), T_1947) - node T_1949 = mux(T_1441, UInt<2>(2), T_1948) - node T_1950 = mux(T_1439, UInt<2>(0), T_1949) - node T_1951 = mux(T_1437, UInt<2>(0), T_1950) - node T_1952 = mux(T_1521, UInt<1>(0), UInt<1>(0)) - node T_1953 = mux(T_1519, UInt<1>(0), T_1952) - node T_1954 = mux(T_1517, UInt<1>(0), T_1953) - node T_1955 = mux(T_1515, UInt<1>(0), T_1954) - node T_1956 = mux(T_1513, UInt<1>(0), T_1955) - node T_1957 = mux(T_1511, UInt<1>(0), T_1956) - node T_1958 = mux(T_1509, UInt<1>(1), T_1957) - node T_1959 = mux(T_1507, UInt<1>(1), T_1958) - node T_1960 = mux(T_1505, UInt<1>(1), T_1959) - node T_1961 = mux(T_1503, UInt<1>(1), T_1960) - node T_1962 = mux(T_1501, UInt<1>(1), T_1961) - node T_1963 = mux(T_1499, UInt<1>(1), T_1962) - node T_1964 = mux(T_1497, UInt<1>(1), T_1963) - node T_1965 = mux(T_1495, UInt<1>(1), T_1964) - node T_1966 = mux(T_1493, UInt<1>(1), T_1965) - node T_1967 = mux(T_1491, UInt<1>(1), T_1966) - node T_1968 = mux(T_1489, UInt<1>(1), T_1967) - node T_1969 = mux(T_1487, UInt<1>(1), T_1968) - node T_1970 = mux(T_1485, UInt<1>(1), T_1969) - node T_1971 = mux(T_1483, UInt<1>(1), T_1970) - node T_1972 = mux(T_1481, UInt<1>(1), T_1971) - node T_1973 = mux(T_1479, UInt<1>(1), T_1972) - node T_1974 = mux(T_1477, UInt<1>(1), T_1973) - node T_1975 = mux(T_1475, UInt<1>(1), T_1974) - node T_1976 = mux(T_1473, UInt<1>(1), T_1975) - node T_1977 = mux(T_1471, UInt<1>(0), T_1976) - node T_1978 = mux(T_1469, UInt<1>(0), T_1977) - node T_1979 = mux(T_1467, UInt<1>(0), T_1978) - node T_1980 = mux(T_1465, UInt<1>(1), T_1979) - node T_1981 = mux(T_1463, UInt<1>(1), T_1980) - node T_1982 = mux(T_1461, UInt<1>(1), T_1981) - node T_1983 = mux(T_1459, UInt<1>(1), T_1982) - node T_1984 = mux(T_1457, UInt<1>(1), T_1983) - node T_1985 = mux(T_1455, UInt<1>(0), T_1984) - node T_1986 = mux(T_1453, UInt<1>(0), T_1985) - node T_1987 = mux(T_1451, UInt<1>(0), T_1986) - node T_1988 = mux(T_1449, UInt<1>(0), T_1987) - node T_1989 = mux(T_1447, UInt<1>(0), T_1988) - node T_1990 = mux(T_1445, UInt<1>(0), T_1989) - node T_1991 = mux(T_1443, UInt<1>(1), T_1990) - node T_1992 = mux(T_1441, UInt<1>(1), T_1991) - node T_1993 = mux(T_1439, UInt<1>(1), T_1992) - node T_1994 = mux(T_1437, UInt<1>(1), T_1993) - node T_1995 = mux(T_1521, UInt<2>(3), UInt<2>(0)) - node T_1996 = mux(T_1519, UInt<2>(2), T_1995) - node T_1997 = mux(T_1517, UInt<2>(1), T_1996) - node T_1998 = mux(T_1515, UInt<2>(3), T_1997) - node T_1999 = mux(T_1513, UInt<2>(2), T_1998) - node T_2000 = mux(T_1511, UInt<2>(1), T_1999) - node T_2001 = mux(T_1509, UInt<2>(0), T_2000) - node T_2002 = mux(T_1507, UInt<2>(0), T_2001) - node T_2003 = mux(T_1505, UInt<2>(0), T_2002) - node T_2004 = mux(T_1503, UInt<2>(0), T_2003) - node T_2005 = mux(T_1501, UInt<2>(0), T_2004) - node T_2006 = mux(T_1499, UInt<2>(0), T_2005) - node T_2007 = mux(T_1497, UInt<2>(0), T_2006) - node T_2008 = mux(T_1495, UInt<2>(0), T_2007) - node T_2009 = mux(T_1493, UInt<2>(0), T_2008) - node T_2010 = mux(T_1491, UInt<2>(0), T_2009) - node T_2011 = mux(T_1489, UInt<2>(0), T_2010) - node T_2012 = mux(T_1487, UInt<2>(0), T_2011) - node T_2013 = mux(T_1485, UInt<2>(0), T_2012) - node T_2014 = mux(T_1483, UInt<2>(0), T_2013) - node T_2015 = mux(T_1481, UInt<2>(0), T_2014) - node T_2016 = mux(T_1479, UInt<2>(0), T_2015) - node T_2017 = mux(T_1477, UInt<2>(0), T_2016) - node T_2018 = mux(T_1475, UInt<2>(0), T_2017) - node T_2019 = mux(T_1473, UInt<2>(0), T_2018) - node T_2020 = mux(T_1471, UInt<2>(0), T_2019) - node T_2021 = mux(T_1469, UInt<2>(0), T_2020) - node T_2022 = mux(T_1467, UInt<2>(0), T_2021) - node T_2023 = mux(T_1465, UInt<2>(0), T_2022) - node T_2024 = mux(T_1463, UInt<2>(0), T_2023) - node T_2025 = mux(T_1461, UInt<2>(0), T_2024) - node T_2026 = mux(T_1459, UInt<2>(0), T_2025) - node T_2027 = mux(T_1457, UInt<2>(0), T_2026) - node T_2028 = mux(T_1455, UInt<2>(0), T_2027) - node T_2029 = mux(T_1453, UInt<2>(0), T_2028) - node T_2030 = mux(T_1451, UInt<2>(0), T_2029) - node T_2031 = mux(T_1449, UInt<2>(0), T_2030) - node T_2032 = mux(T_1447, UInt<2>(0), T_2031) - node T_2033 = mux(T_1445, UInt<2>(0), T_2032) - node T_2034 = mux(T_1443, UInt<2>(0), T_2033) - node T_2035 = mux(T_1441, UInt<2>(0), T_2034) - node T_2036 = mux(T_1439, UInt<2>(0), T_2035) - node T_2037 = mux(T_1437, UInt<2>(0), T_2036) - node rs1_addr = bits(ctrl.inst, 19, 15) - node rs2_addr = bits(ctrl.inst, 24, 20) - reg st_type : UInt<2> - reg ld_type : UInt<3> - reg wb_sel : UInt<2> - node T_2038 = bit(T_1994, 0) - reg wb_en : UInt<1> - reg csr_cmd : UInt<2> - ctrl.pc_sel := T_1564 - node T_2039 = bit-not(ctrl.stall) - node T_2040 = bit-not(ctrl.data_re) - node T_2041 = bit-and(T_2039, T_2040) - ctrl.inst_re := T_2041 - node T_2042 = neq(T_1908, UInt<3>(7)) - node T_2043 = bit(T_1822, 0) - node T_2044 = bit-or(T_2042, T_2043) - node T_2045 = mux(T_2044, UInt<1>(1), UInt<1>(0)) - ctrl.inst_type := T_2045 - ctrl.A_sel := T_1607 - ctrl.B_sel := T_1650 - ctrl.imm_sel := T_1693 - ctrl.alu_op := T_1736 - ctrl.br_type := T_1779 - ctrl.st_type := T_1865 - node T_2046 = bit-not(ctrl.stall) - when T_2046 : - st_type := ctrl.st_type - ld_type := T_1908 - wb_sel := T_1951 - node T_2047 = bit(T_1994, 0) - wb_en := T_2047 - csr_cmd := T_2037 - node T_2048 = neq(ctrl.ld_type, UInt<3>(7)) - node T_2049 = neq(T_1908, UInt<3>(7)) - node T_2050 = mux(ctrl.stall, T_2048, T_2049) - ctrl.data_re := T_2050 - ctrl.ld_type := ld_type - ctrl.wb_en := wb_en - ctrl.wb_sel := wb_sel - ctrl.csr_cmd := csr_cmd - module Core : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - input stall : UInt<1> - output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - - inst dpath of Datapath - inst ctrl of Control - host := dpath.host - icache := dpath.icache - dcache := dpath.dcache - dpath.ctrl := ctrl.ctrl - dpath.stall := stall diff --git a/test/passes/jacktest/Datapath.fir b/test/passes/jacktest/Datapath.fir deleted file mode 100644 index abb902ba..00000000 --- a/test/passes/jacktest/Datapath.fir +++ /dev/null @@ -1,364 +0,0 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s -;CHECK: Done! -circuit Datapath : - module ALU : - input B : UInt<32> - output out : UInt<32> - output sum : UInt<32> - input A : UInt<32> - input alu_op : UInt<4> - - node shamt = bits(B, 4, 0) - node T_433 = add-wrap(A, B) - node T_434 = sub-wrap(A, B) - node T_435 = convert(A) - node T_436 = dshr(T_435, shamt) - node T_437 = as-UInt(T_436) - node T_438 = dshr(A, shamt) - node T_439 = dshl(A, shamt) - node T_440 = bits(T_439, 31, 0) - node T_441 = convert(A) - node T_442 = convert(B) - node T_443 = lt(T_441, T_442) - node T_444 = as-UInt(T_443) - node T_445 = lt(A, B) - node T_446 = as-UInt(T_445) - node T_447 = bit-and(A, B) - node T_448 = bit-or(A, B) - node T_449 = bit-xor(A, B) - node T_450 = eq(UInt<4>(10), alu_op) - node T_451 = mux(T_450, A, B) - node T_452 = eq(UInt<4>(4), alu_op) - node T_453 = mux(T_452, T_449, T_451) - node T_454 = eq(UInt<4>(3), alu_op) - node T_455 = mux(T_454, T_448, T_453) - node T_456 = eq(UInt<4>(2), alu_op) - node T_457 = mux(T_456, T_447, T_455) - node T_458 = eq(UInt<4>(7), alu_op) - node T_459 = mux(T_458, T_446, T_457) - node T_460 = eq(UInt<4>(5), alu_op) - node T_461 = mux(T_460, T_444, T_459) - node T_462 = eq(UInt<4>(6), alu_op) - node T_463 = mux(T_462, T_440, T_461) - node T_464 = eq(UInt<4>(8), alu_op) - node T_465 = mux(T_464, T_438, T_463) - node T_466 = eq(UInt<4>(9), alu_op) - node T_467 = mux(T_466, T_437, T_465) - node T_468 = eq(UInt<4>(1), alu_op) - node T_469 = mux(T_468, T_434, T_467) - node T_470 = eq(UInt<4>(0), alu_op) - node oot = mux(T_470, T_433, T_469) - node T_471 = bits(oot, 31, 0) - out := T_471 - node T_472 = bit(alu_op, 0) - node T_473 = sub-wrap(UInt<1>(0), B) - node T_474 = mux(T_472, T_473, B) - node T_475 = add-wrap(A, T_474) - sum := T_475 - module BrCond : - input br_type : UInt<3> - output taken : UInt<1> - input rs2 : UInt<32> - input rs1 : UInt<32> - - node eq = eq(rs1, rs2) - node neq = bit-not(eq) - node T_476 = convert(rs1) - node T_477 = convert(rs2) - node lt = lt(T_476, T_477) - node ge = bit-not(lt) - node ltu = lt(rs1, rs2) - node geu = bit-not(ltu) - node T_478 = eq(br_type, UInt<3>(2)) - node T_479 = bit-and(T_478, eq) - node T_480 = eq(br_type, UInt<3>(6)) - node T_481 = bit-and(T_480, neq) - node T_482 = bit-or(T_479, T_481) - node T_483 = eq(br_type, UInt<3>(1)) - node T_484 = bit-and(T_483, lt) - node T_485 = bit-or(T_482, T_484) - node T_486 = eq(br_type, UInt<3>(5)) - node T_487 = bit-and(T_486, ge) - node T_488 = bit-or(T_485, T_487) - node T_489 = eq(br_type, UInt<3>(0)) - node T_490 = bit-and(T_489, ltu) - node T_491 = bit-or(T_488, T_490) - node T_492 = eq(br_type, UInt<3>(4)) - node T_493 = bit-and(T_492, geu) - node T_494 = bit-or(T_491, T_493) - taken := T_494 - module RegFile : - input waddr : UInt<5> - input wdata : UInt<32> - input raddr1 : UInt<5> - input raddr2 : UInt<5> - output rdata2 : UInt<32> - output rdata1 : UInt<32> - input wen : UInt<1> - - mem regs : UInt<32>[32] - node T_495 = eq(raddr1, UInt<1>(0)) - node T_496 = bit-not(T_495) - accessor T_497 = regs[raddr1] - node T_498 = mux(T_496, T_497, UInt<1>(0)) - rdata1 := T_498 - node T_499 = eq(raddr2, UInt<1>(0)) - node T_500 = bit-not(T_499) - accessor T_501 = regs[raddr2] - node T_502 = mux(T_500, T_501, UInt<1>(0)) - rdata2 := T_502 - node T_503 = eq(waddr, UInt<1>(0)) - node T_504 = bit-not(T_503) - node T_505 = bit-and(wen, T_504) - when T_505 : - accessor T_506 = regs[waddr] - T_506 := wdata - module ImmGenWire : - output out : UInt<32> - input inst : UInt<32> - input sel : UInt<3> - - node T_507 = bits(inst, 31, 20) - node Iimm = convert(T_507) - node T_508 = bits(inst, 31, 25) - node T_509 = bits(inst, 11, 7) - node T_510 = cat(T_508, T_509) - node Simm = convert(T_510) - node T_511 = bit(inst, 31) - node T_512 = bit(inst, 7) - node T_513 = bits(inst, 30, 25) - node T_514 = bits(inst, 11, 8) - node T_515 = cat(T_511, T_512) - node T_516 = cat(T_514, UInt<1>(0)) - node T_517 = cat(T_513, T_516) - node T_518 = cat(T_515, T_517) - node Bimm = convert(T_518) - node T_519 = bits(inst, 31, 12) - node T_520 = cat(T_519, UInt<12>(0)) - node Uimm = convert(T_520) - node T_521 = bit(inst, 31) - node T_522 = bits(inst, 19, 12) - node T_523 = bit(inst, 20) - node T_524 = bits(inst, 30, 25) - node T_525 = bits(inst, 24, 21) - node T_526 = cat(T_522, T_523) - node T_527 = cat(T_521, T_526) - node T_528 = cat(T_525, UInt<1>(0)) - node T_529 = cat(T_524, T_528) - node T_530 = cat(T_527, T_529) - node Jimm = convert(T_530) - node T_531 = bits(inst, 19, 15) - node T_532 = Pad(T_531, 32) - node Zimm = convert(T_532) - node T_533 = eq(UInt<3>(3), sel) - node T_534 = mux(T_533, Jimm, Zimm) - node T_535 = eq(UInt<3>(2), sel) - node T_536 = mux(T_535, Uimm, T_534) - node T_537 = eq(UInt<3>(4), sel) - node T_538 = mux(T_537, Bimm, T_536) - node T_539 = eq(UInt<3>(1), sel) - node T_540 = mux(T_539, Simm, T_538) - node T_541 = eq(UInt<3>(0), sel) - node T_542 = mux(T_541, Iimm, T_540) - node T_543 = as-UInt(T_542) - out := T_543 - module CSR : - output host : {status : UInt<32>, tohost : UInt<32>, flip hid : UInt<1>} - input src : UInt<32> - input cmd : UInt<2> - output data : UInt<32> - input addr : UInt<12> - - reg reg_tohost : UInt<32> - on-reset reg_tohost := UInt<32>(0) - reg reg_status : UInt<32> - on-reset reg_status := UInt<32>(0) - host.tohost := reg_tohost - host.status := reg_status - node T_544 = eq(UInt<12>(1291), addr) - node T_545 = mux(T_544, host.hid, UInt<1>(0)) - node T_546 = eq(UInt<12>(1290), addr) - node T_547 = mux(T_546, reg_status, T_545) - node T_548 = eq(UInt<12>(1310), addr) - node T_549 = mux(T_548, reg_tohost, T_547) - data := T_549 - node T_550 = eq(cmd, UInt<2>(1)) - when T_550 : - node T_551 = eq(addr, UInt<12>(1310)) - when T_551 : reg_tohost := src - node T_552 = eq(addr, UInt<12>(1290)) - when T_552 : reg_status := src - node T_553 = eq(cmd, UInt<2>(2)) - node T_554 = neq(src, UInt<1>(0)) - node T_555 = bit-and(T_553, T_554) - when T_555 : - node T_556 = eq(addr, UInt<12>(1310)) - when T_556 : - node T_557 = dshl(UInt<1>(1), src) - node T_558 = bit-or(data, T_557) - reg_tohost := T_558 - node T_559 = eq(addr, UInt<12>(1290)) - when T_559 : - node T_560 = dshl(UInt<1>(1), src) - node T_561 = bit-or(data, T_560) - reg_status := T_561 - node T_562 = eq(cmd, UInt<2>(3)) - node T_563 = neq(src, UInt<1>(0)) - node T_564 = bit-and(T_562, T_563) - when T_564 : - node T_565 = eq(addr, UInt<12>(1310)) - when T_565 : - node T_566 = dshl(UInt<1>(0), src) - node T_567 = bit-and(data, T_566) - reg_tohost := T_567 - node T_568 = eq(addr, UInt<12>(1290)) - when T_568 : - node T_569 = dshl(UInt<1>(0), src) - node T_570 = bit-and(data, T_569) - reg_status := T_570 - module Datapath : - output host : {status : UInt<32>, tohost : UInt<32>, flip hid : UInt<1>} - output dcache : {re : UInt<1>, din : UInt<32>, we : UInt<4>, addr : UInt<32>, flip dout : UInt<32>} - input stall : UInt<1> - output icache : {re : UInt<1>, din : UInt<32>, we : UInt<4>, addr : UInt<32>, flip dout : UInt<32>} - input ctrl : {data_re : UInt<1>, ld_type : UInt<3>, flip inst : UInt<32>, br_type : UInt<3>, pc_sel : UInt<1>, wb_sel : UInt<2>, A_sel : UInt<1>, inst_re : UInt<1>, B_sel : UInt<1>, st_type : UInt<2>, alu_op : UInt<4>, csr_cmd : UInt<2>, flip stall : UInt<1>, wb_en : UInt<1>, imm_sel : UInt<3>, inst_type : UInt<1>} - - inst alu of ALU - inst brCond of BrCond - inst regFile of RegFile - inst immGen of ImmGenWire - reg fe_inst : UInt<32> - on-reset fe_inst := UInt<32>(0) - reg fe_pc : UInt - reg ew_inst : UInt<32> - on-reset ew_inst := UInt<32>(0) - reg ew_pc : UInt - reg ew_alu : UInt - node T_571 = sub-wrap(UInt<14>(8192), UInt<32>(4)) - reg pc : UInt<32> - on-reset pc := T_571 - node T_572 = eq(ctrl.pc_sel, UInt<1>(1)) - node T_573 = bit-or(T_572, brCond.taken) - node T_574 = add-wrap(pc, UInt<3>(4)) - node iaddr = mux(T_573, alu.sum, T_574) - node T_575 = eq(ctrl.inst_type, UInt<1>(1)) - node T_576 = bit-or(T_575, brCond.taken) - node inst = mux(T_576, UInt<32>(19), icache.dout) - icache.we := UInt<1>(0) - icache.din := UInt<1>(0) - icache.addr := iaddr - icache.re := ctrl.inst_re - node T_577 = eq(dcache.we, UInt<1>(0)) - node T_578 = bit-not(T_577) - node T_579 = bit-not(T_578) - node T_580 = bit-and(icache.re, T_579) - node T_581 = mux(T_580, iaddr, pc) - pc := T_581 - node T_582 = bit-not(stall) - when T_582 : - fe_pc := pc - fe_inst := inst - ctrl.inst := fe_inst - ctrl.stall := stall - node rd_addr = bits(fe_inst, 11, 7) - node rs1_addr = bits(fe_inst, 19, 15) - node rs2_addr = bits(fe_inst, 24, 20) - regFile.raddr1 := rs1_addr - regFile.raddr2 := rs2_addr - immGen.inst := fe_inst - immGen.sel := ctrl.imm_sel - node T_583 = eq(rs1_addr, UInt<1>(0)) - node rs1NotZero = bit-not(T_583) - node T_584 = eq(rs2_addr, UInt<1>(0)) - node rs2NotZero = bit-not(T_584) - node T_585 = eq(ctrl.wb_sel, UInt<2>(0)) - node alutype = bit-and(ctrl.wb_en, T_585) - node ex_rd_addr = bits(ew_inst, 11, 7) - node T_586 = bit-and(alutype, rs1NotZero) - node T_587 = eq(rs1_addr, ex_rd_addr) - node T_588 = bit-and(T_586, T_587) - node rs1 = mux(T_588, ew_alu, regFile.rdata1) - node T_589 = bit-and(alutype, rs2NotZero) - node T_590 = eq(rs2_addr, ex_rd_addr) - node T_591 = bit-and(T_589, T_590) - node rs2 = mux(T_591, ew_alu, regFile.rdata2) - node T_592 = eq(ctrl.A_sel, UInt<1>(0)) - node T_593 = mux(T_592, rs1, fe_pc) - alu.A := T_593 - node T_594 = eq(ctrl.B_sel, UInt<1>(0)) - node T_595 = mux(T_594, rs2, immGen.out) - alu.B := T_595 - alu.alu_op := ctrl.alu_op - brCond.rs1 := rs1 - brCond.rs2 := rs2 - brCond.br_type := ctrl.br_type - node T_596 = bit(alu.sum, 1) - node T_597 = dshl(T_596, UInt<3>(4)) - node T_598 = bit(alu.sum, 0) - node T_599 = dshl(T_598, UInt<2>(3)) - node woffset = bit-or(T_597, T_599) - dcache.re := ctrl.data_re - node T_600 = mux(stall, ew_alu, alu.sum) - dcache.addr := T_600 - node T_601 = bits(alu.sum, 1, 0) - node T_602 = dshl(UInt<2>(3), T_601) - node T_603 = bits(T_602, 3, 0) - node T_604 = bits(alu.sum, 1, 0) - node T_605 = dshl(UInt<1>(1), T_604) - node T_606 = bits(T_605, 3, 0) - node T_607 = eq(UInt<2>(2), ctrl.st_type) - node T_608 = mux(T_607, T_606, UInt<4>(0)) - node T_609 = eq(UInt<2>(1), ctrl.st_type) - node T_610 = mux(T_609, T_603, T_608) - node T_611 = eq(UInt<2>(0), ctrl.st_type) - node T_612 = mux(T_611, UInt<4>(15), T_610) - node T_613 = mux(stall, UInt<4>(0), T_612) - dcache.we := T_613 - node T_614 = dshl(rs2, woffset) - node T_615 = bits(T_614, 31, 0) - dcache.din := T_615 - node T_616 = bit-not(stall) - when T_616 : - ew_pc := fe_pc - ew_inst := fe_inst - ew_alu := alu.out - node T_617 = bit(ew_alu, 1) - node T_618 = dshl(T_617, UInt<3>(4)) - node T_619 = bit(ew_alu, 0) - node T_620 = dshl(T_619, UInt<2>(3)) - node loffset = bit-or(T_618, T_620) - node lshift = dshr(dcache.dout, loffset) - node T_621 = bits(lshift, 15, 0) - node T_622 = convert(T_621) - node T_623 = Pad(T_622, 32) - node T_624 = as-UInt(T_623) - node T_625 = bits(lshift, 7, 0) - node T_626 = convert(T_625) - node T_627 = Pad(T_626, 32) - node T_628 = as-UInt(T_627) - node T_629 = bits(lshift, 15, 0) - node T_630 = bits(lshift, 7, 0) - node T_631 = eq(UInt<3>(4), ctrl.ld_type) - node T_632 = mux(T_631, T_630, dcache.dout) - node T_633 = eq(UInt<3>(3), ctrl.ld_type) - node T_634 = mux(T_633, T_629, T_632) - node T_635 = eq(UInt<3>(2), ctrl.ld_type) - node T_636 = mux(T_635, T_628, T_634) - node T_637 = eq(UInt<3>(1), ctrl.ld_type) - node load = mux(T_637, T_624, T_636) - inst csr of CSR - host := csr.host - csr.src := ew_alu - node T_638 = bits(ew_inst, 31, 20) - csr.addr := T_638 - csr.cmd := ctrl.csr_cmd - node T_639 = add-wrap(ew_pc, UInt<3>(4)) - node T_640 = eq(UInt<2>(3), ctrl.wb_sel) - node T_641 = mux(T_640, csr.data, ew_alu) - node T_642 = eq(UInt<2>(2), ctrl.wb_sel) - node T_643 = mux(T_642, T_639, T_641) - node T_644 = eq(UInt<2>(1), ctrl.wb_sel) - node regWrite = mux(T_644, load, T_643) - regFile.wen := ctrl.wb_en - regFile.waddr := ex_rd_addr - regFile.wdata := regWrite diff --git a/test/passes/jacktest/Tile.fir b/test/passes/jacktest/Tile.fir deleted file mode 100644 index c3123dab..00000000 --- a/test/passes/jacktest/Tile.fir +++ /dev/null @@ -1,1272 +0,0 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p ct | tee %s.out | FileCheck %s -;CHECK: Done! -circuit Tile : - module ALU : - input A : UInt<32> - input B : UInt<32> - input alu_op : UInt<4> - output out : UInt<32> - output sum : UInt<32> - node tmp1 = bits(B, 4, 0) - node shamt2 = tmp1 - node tmp3 = add-wrap(A, B) - node tmp4 = sub-wrap(A, B) - node tmp5 = convert(A) - node tmp6 = dshr(tmp5, shamt2) - node tmp7 = as-UInt(tmp6) - node tmp8 = dshr(A, shamt2) - node tmp9 = dshl(A, shamt2) - node tmp10 = bits(tmp9, 31, 0) - node tmp11 = convert(A) - node tmp12 = convert(B) - node tmp13 = lt(tmp11, tmp12) - node tmp14 = lt(A, B) - node tmp15 = bit-and(A, B) - node tmp16 = bit-or(A, B) - node tmp17 = bit-xor(A, B) - node tmp18 = eq(UInt<4>(10), alu_op) - node tmp19 = mux(tmp18, A, B) - node tmp20 = eq(UInt<4>(4), alu_op) - node tmp21 = mux(tmp20, tmp17, tmp19) - node tmp22 = eq(UInt<4>(3), alu_op) - node tmp23 = mux(tmp22, tmp16, tmp21) - node tmp24 = eq(UInt<4>(2), alu_op) - node tmp25 = mux(tmp24, tmp15, tmp23) - node tmp26 = eq(UInt<4>(7), alu_op) - node tmp27 = mux(tmp26, tmp14, tmp25) - node tmp28 = eq(UInt<4>(5), alu_op) - node tmp29 = mux(tmp28, tmp13, tmp27) - node tmp30 = eq(UInt<4>(6), alu_op) - node tmp31 = mux(tmp30, tmp10, tmp29) - node tmp32 = eq(UInt<4>(8), alu_op) - node tmp33 = mux(tmp32, tmp8, tmp31) - node tmp34 = eq(UInt<4>(9), alu_op) - node tmp35 = mux(tmp34, tmp7, tmp33) - node tmp36 = eq(UInt<4>(1), alu_op) - node tmp37 = mux(tmp36, tmp4, tmp35) - node tmp38 = eq(UInt<4>(0), alu_op) - node tmp39 = mux(tmp38, tmp3, tmp37) - node tmp40 = bits(tmp39, 31, 0) - out := tmp40 - node tmp41 = bit(alu_op, 0) - node tmp42 = sub-wrap(UInt<1>(0), B) - node tmp43 = mux(tmp41, tmp42, B) - node tmp44 = add-wrap(A, tmp43) - sum := tmp44 - module BrCond : - input rs1 : UInt<32> - input rs2 : UInt<32> - input br_type : UInt<3> - output taken : UInt<1> - node tmp45 = eq(rs1, rs2) - node eq46 = tmp45 - node tmp47 = bit-not(eq46) - node neq48 = tmp47 - node tmp49 = convert(rs1) - node tmp50 = convert(rs2) - node tmp51 = lt(tmp49, tmp50) - node lt52 = tmp51 - node tmp53 = bit-not(lt52) - node ge54 = tmp53 - node tmp55 = lt(rs1, rs2) - node ltu56 = tmp55 - node tmp57 = bit-not(ltu56) - node geu58 = tmp57 - node tmp59 = eq(br_type, UInt<3>(2)) - node tmp60 = bit-and(tmp59, eq46) - node tmp61 = eq(br_type, UInt<3>(6)) - node tmp62 = bit-and(tmp61, neq48) - node tmp63 = eq(br_type, UInt<3>(1)) - node tmp64 = bit-and(tmp63, lt52) - node tmp65 = eq(br_type, UInt<3>(5)) - node tmp66 = bit-and(tmp65, ge54) - node tmp67 = eq(br_type, UInt<3>(0)) - node tmp68 = bit-and(tmp67, ltu56) - node tmp69 = eq(br_type, UInt<3>(4)) - node tmp70 = bit-and(tmp69, geu58) - node tmp71 = bit-or(tmp68, tmp70) - node tmp72 = bit-or(tmp66, tmp71) - node tmp73 = bit-or(tmp64, tmp72) - node tmp74 = bit-or(tmp62, tmp73) - node tmp75 = bit-or(tmp60, tmp74) - taken := tmp75 - module RegFile : - input raddr1 : UInt<5> - input raddr2 : UInt<5> - input wen : UInt<1> - input waddr : UInt<5> - input wdata : UInt<32> - output rdata1 : UInt<32> - output rdata2 : UInt<32> - mem regs : UInt<32>[32] - node tmp76 = eq(raddr1, UInt<1>(0)) - node tmp77 = bit-not(tmp76) - accessor a78 = regs[raddr1] - node tmp79 = mux(tmp77, a78, UInt<1>(0)) - rdata1 := tmp79 - node tmp80 = eq(raddr2, UInt<1>(0)) - node tmp81 = bit-not(tmp80) - accessor a82 = regs[raddr2] - node tmp83 = mux(tmp81, a82, UInt<1>(0)) - rdata2 := tmp83 - node tmp84 = eq(waddr, UInt<1>(0)) - node tmp85 = bit-not(tmp84) - node tmp86 = bit-and(wen, tmp85) - when tmp86 : - accessor a87 = regs[waddr] - a87 := wdata - module ImmGenWire : - input inst : UInt<32> - input sel : UInt<3> - output out : UInt<32> - node tmp88 = bits(inst, 31, 20) - node tmp89 = convert(tmp88) - node Iimm90 = tmp89 - node tmp91 = bits(inst, 31, 25) - node tmp92 = bits(inst, 11, 7) - node tmp93 = cat(tmp91, tmp92) - node tmp94 = convert(tmp93) - node Simm95 = tmp94 - node tmp96 = bit(inst, 31) - node tmp97 = bit(inst, 7) - node tmp98 = bits(inst, 30, 25) - node tmp99 = bits(inst, 11, 8) - node tmp100 = cat(tmp96, tmp97) - node tmp101 = cat(tmp100, tmp98) - node tmp102 = cat(tmp101, tmp99) - node tmp103 = cat(tmp102, UInt<1>(0)) - node tmp104 = convert(tmp103) - node Bimm105 = tmp104 - node tmp106 = bits(inst, 31, 12) - node tmp107 = cat(tmp106, UInt<12>(0)) - node tmp108 = convert(tmp107) - node Uimm109 = tmp108 - node tmp110 = bit(inst, 31) - node tmp111 = bits(inst, 19, 12) - node tmp112 = bit(inst, 20) - node tmp113 = bits(inst, 30, 25) - node tmp114 = bits(inst, 24, 21) - node tmp115 = cat(tmp110, tmp111) - node tmp116 = cat(tmp115, tmp112) - node tmp117 = cat(tmp116, tmp113) - node tmp118 = cat(tmp117, tmp114) - node tmp119 = cat(tmp118, UInt<1>(0)) - node tmp120 = convert(tmp119) - node Jimm121 = tmp120 - node tmp122 = bits(inst, 19, 15) - node tmp123 = pad(tmp122, 32) - node tmp124 = convert(tmp123) - node Zimm125 = tmp124 - node tmp126 = eq(UInt<3>(3), sel) - node tmp127 = mux(tmp126, Jimm121, Zimm125) - node tmp128 = eq(UInt<3>(2), sel) - node tmp129 = mux(tmp128, Uimm109, tmp127) - node tmp130 = eq(UInt<3>(4), sel) - node tmp131 = mux(tmp130, Bimm105, tmp129) - node tmp132 = eq(UInt<3>(1), sel) - node tmp133 = mux(tmp132, Simm95, tmp131) - node tmp134 = eq(UInt<3>(0), sel) - node tmp135 = mux(tmp134, Iimm90, tmp133) - node tmp136 = as-UInt(tmp135) - out := tmp136 - module CSR : - input cmd : UInt<2> - input addr : UInt<12> - input src : UInt<32> - output host : {flip hid : UInt<1>, tohost : UInt<32>, status : UInt<32>} - output data : UInt<32> - reg reg_tohost238 : UInt<32> - on-reset reg_tohost238 := UInt<1>(0) - reg reg_status239 : UInt<32> - on-reset reg_status239 := UInt<1>(0) - host.tohost := reg_tohost238 - host.status := reg_status239 - node tmp240 = eq(UInt<12>(1291), addr) - node tmp241 = mux(tmp240, host.hid, UInt<1>(0)) - node tmp242 = eq(UInt<12>(1290), addr) - node tmp243 = mux(tmp242, reg_status239, tmp241) - node tmp244 = eq(UInt<12>(1310), addr) - node tmp245 = mux(tmp244, reg_tohost238, tmp243) - data := tmp245 - node tmp246 = eq(cmd, UInt<2>(1)) - when tmp246 : - node tmp247 = eq(addr, UInt<12>(1310)) - when tmp247 : - reg_tohost238 := src - node tmp248 = eq(addr, UInt<12>(1290)) - when tmp248 : - reg_status239 := src - node tmp249 = eq(cmd, UInt<2>(2)) - node tmp250 = neq(src, UInt<1>(0)) - node tmp251 = bit-and(tmp249, tmp250) - when tmp251 : - node tmp252 = eq(addr, UInt<12>(1310)) - when tmp252 : - node tmp253 = dshl(UInt<1>(1), src) - node tmp254 = bit-or(data, tmp253) - reg_tohost238 := tmp254 - node tmp255 = eq(addr, UInt<12>(1290)) - when tmp255 : - node tmp256 = dshl(UInt<1>(1), src) - node tmp257 = bit-or(data, tmp256) - reg_status239 := tmp257 - node tmp258 = eq(cmd, UInt<2>(3)) - node tmp259 = neq(src, UInt<1>(0)) - node tmp260 = bit-and(tmp258, tmp259) - when tmp260 : - node tmp261 = eq(addr, UInt<12>(1310)) - when tmp261 : - node tmp262 = dshl(UInt<1>(0), src) - node tmp263 = bit-and(data, tmp262) - reg_tohost238 := tmp263 - node tmp264 = eq(addr, UInt<12>(1290)) - when tmp264 : - node tmp265 = dshl(UInt<1>(0), src) - node tmp266 = bit-and(data, tmp265) - reg_status239 := tmp266 - module Datapath : - input stall : UInt<1> - input ctrl : {pc_sel : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, flip ins : UInt<32>, flip stall : UInt<1>} - output host : {flip hid : UInt<1>, tohost : UInt<32>, status : UInt<32>} - output icache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} - output dcache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} - inst alu of ALU - inst brCond of BrCond - inst regFile of RegFile - inst immGen of ImmGenWire - reg fe_inst137 : UInt<32> - on-reset fe_inst137 := UInt<1>(0) - reg fe_pc138 : UInt<?> - reg ew_inst139 : UInt<32> - on-reset ew_inst139 := UInt<1>(0) - reg ew_pc140 : UInt<?> - reg ew_alu141 : UInt<?> - reg pc142 : UInt<32> - node tmp143 = sub-wrap(UInt<14>(8192), UInt<32>(4)) - on-reset pc142 := tmp143 - node tmp144 = eq(ctrl.pc_sel, UInt<1>(1)) - node tmp145 = bit-or(tmp144, brCond.taken) - node tmp146 = add-wrap(pc142, UInt<3>(4)) - node tmp147 = mux(tmp145, alu.sum, tmp146) - node tmp148 = eq(ctrl.inst_type, UInt<1>(1)) - node tmp149 = bit-or(tmp148, brCond.taken) - node tmp150 = mux(tmp149, UInt<5>(19), icache.dout) - icache.we := UInt<1>(0) - icache.din := UInt<1>(0) - icache.addr := tmp147 - icache.re := ctrl.inst_re - node tmp151 = eq(dcache.we, UInt<1>(0)) - node tmp152 = bit-not(tmp151) - node tmp153 = bit-not(tmp152) - node tmp154 = bit-and(icache.re, tmp153) - node tmp155 = mux(tmp154, tmp147, pc142) - pc142 := tmp155 - node tmp156 = bit-not(stall) - when tmp156 : - fe_pc138 := pc142 - fe_inst137 := tmp150 - ctrl.ins := fe_inst137 - ctrl.stall := stall - node tmp157 = bits(fe_inst137, 11, 7) - node rd_addr158 = tmp157 - node tmp159 = bits(fe_inst137, 19, 15) - node rs1_addr160 = tmp159 - node tmp161 = bits(fe_inst137, 24, 20) - node rs2_addr162 = tmp161 - regFile.raddr1 := rs1_addr160 - regFile.raddr2 := rs2_addr162 - immGen.inst := fe_inst137 - immGen.sel := ctrl.imm_sel - node tmp163 = eq(rs1_addr160, UInt<1>(0)) - node tmp164 = bit-not(tmp163) - node rs1NotZero165 = tmp164 - node tmp166 = eq(rs2_addr162, UInt<1>(0)) - node tmp167 = bit-not(tmp166) - node rs2NotZero168 = tmp167 - node tmp169 = eq(ctrl.wb_sel, UInt<2>(0)) - node tmp170 = bit-and(ctrl.wb_en, tmp169) - node alutype171 = tmp170 - node tmp172 = bits(ew_inst139, 11, 7) - node ex_rd_addr173 = tmp172 - node tmp174 = eq(rs1_addr160, ex_rd_addr173) - node tmp175 = bit-and(rs1NotZero165, tmp174) - node tmp176 = bit-and(alutype171, tmp175) - node tmp177 = mux(tmp176, ew_alu141, regFile.rdata1) - node rs1178 = tmp177 - node tmp179 = eq(rs2_addr162, ex_rd_addr173) - node tmp180 = bit-and(rs2NotZero168, tmp179) - node tmp181 = bit-and(alutype171, tmp180) - node tmp182 = mux(tmp181, ew_alu141, regFile.rdata2) - node rs2183 = tmp182 - node tmp184 = eq(ctrl.A_sel, UInt<1>(0)) - node tmp185 = mux(tmp184, rs1178, fe_pc138) - alu.A := tmp185 - node tmp186 = eq(ctrl.B_sel, UInt<1>(0)) - node tmp187 = mux(tmp186, rs2183, immGen.out) - alu.B := tmp187 - alu.alu_op := ctrl.alu_op - brCond.rs1 := rs1178 - brCond.rs2 := rs2183 - brCond.br_type := ctrl.br_type - node tmp188 = bit(alu.sum, 1) - node tmp189 = shl(tmp188, 4) - node tmp190 = bit(alu.sum, 0) - node tmp191 = shl(tmp190, 3) - node tmp192 = bit-or(tmp189, tmp191) - node woffset193 = tmp192 - dcache.re := ctrl.data_re - node tmp194 = mux(stall, ew_alu141, alu.sum) - dcache.addr := tmp194 - node tmp195 = bits(alu.sum, 1, 0) - node tmp196 = dshl(UInt<2>(3), tmp195) - node tmp197 = bits(tmp196, 3, 0) - node tmp198 = bits(alu.sum, 1, 0) - node tmp199 = dshl(UInt<1>(1), tmp198) - node tmp200 = bits(tmp199, 3, 0) - node tmp201 = eq(UInt<2>(2), ctrl.st_type) - node tmp202 = mux(tmp201, tmp200, UInt<1>(0)) - node tmp203 = eq(UInt<2>(1), ctrl.st_type) - node tmp204 = mux(tmp203, tmp197, tmp202) - node tmp205 = eq(UInt<2>(0), ctrl.st_type) - node tmp206 = mux(tmp205, UInt<4>(15), tmp204) - node tmp207 = mux(stall, UInt<1>(0), tmp206) - dcache.we := tmp207 - node tmp208 = dshl(rs2183, woffset193) - node tmp209 = bits(tmp208, 31, 0) - dcache.din := tmp209 - node tmp210 = bit-not(stall) - when tmp210 : - ew_pc140 := fe_pc138 - ew_inst139 := fe_inst137 - ew_alu141 := alu.out - node tmp211 = bit(ew_alu141, 1) - node tmp212 = shl(tmp211, 4) - node tmp213 = bit(ew_alu141, 0) - node tmp214 = shl(tmp213, 3) - node tmp215 = bit-or(tmp212, tmp214) - node loffset216 = tmp215 - node tmp217 = dshr(dcache.dout, loffset216) - node lshift218 = tmp217 - node tmp219 = bits(lshift218, 15, 0) - node tmp220 = convert(tmp219) - node tmp221 = pad(tmp220, 32) - node tmp222 = as-UInt(tmp221) - node tmp223 = bits(lshift218, 7, 0) - node tmp224 = convert(tmp223) - node tmp225 = pad(tmp224, 32) - node tmp226 = as-UInt(tmp225) - node tmp227 = bits(lshift218, 15, 0) - node tmp228 = bits(lshift218, 7, 0) - node tmp229 = eq(UInt<3>(4), ctrl.ld_type) - node tmp230 = mux(tmp229, tmp228, dcache.dout) - node tmp231 = eq(UInt<3>(3), ctrl.ld_type) - node tmp232 = mux(tmp231, tmp227, tmp230) - node tmp233 = eq(UInt<3>(2), ctrl.ld_type) - node tmp234 = mux(tmp233, tmp226, tmp232) - node tmp235 = eq(UInt<3>(1), ctrl.ld_type) - node tmp236 = mux(tmp235, tmp222, tmp234) - node load237 = tmp236 - inst csr of CSR - host := csr.host - csr.src := ew_alu141 - node tmp267 = bits(ew_inst139, 31, 20) - csr.addr := tmp267 - csr.cmd := ctrl.csr_cmd - node tmp268 = add-wrap(ew_pc140, UInt<3>(4)) - node tmp269 = eq(UInt<2>(3), ctrl.wb_sel) - node tmp270 = mux(tmp269, csr.data, ew_alu141) - node tmp271 = eq(UInt<2>(2), ctrl.wb_sel) - node tmp272 = mux(tmp271, tmp268, tmp270) - node tmp273 = eq(UInt<2>(1), ctrl.wb_sel) - node tmp274 = mux(tmp273, load237, tmp272) - node regWrite275 = tmp274 - regFile.wen := ctrl.wb_en - regFile.waddr := ex_rd_addr173 - regFile.wdata := regWrite275 - module Control : - output ctrl : {pc_sel : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, flip ins : UInt<32>, flip stall : UInt<1>} - node tmp276 = bit-and(UInt<32>(127), ctrl.ins) - node tmp277 = eq(tmp276, UInt<32>(55)) - node tmp278 = bit-and(UInt<32>(127), ctrl.ins) - node tmp279 = eq(tmp278, UInt<32>(23)) - node tmp280 = bit-and(UInt<32>(127), ctrl.ins) - node tmp281 = eq(tmp280, UInt<32>(111)) - node tmp282 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp283 = eq(tmp282, UInt<32>(103)) - node tmp284 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp285 = eq(tmp284, UInt<32>(99)) - node tmp286 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp287 = eq(tmp286, UInt<32>(4195)) - node tmp288 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp289 = eq(tmp288, UInt<32>(16483)) - node tmp290 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp291 = eq(tmp290, UInt<32>(20579)) - node tmp292 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp293 = eq(tmp292, UInt<32>(24675)) - node tmp294 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp295 = eq(tmp294, UInt<32>(28771)) - node tmp296 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp297 = eq(tmp296, UInt<32>(3)) - node tmp298 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp299 = eq(tmp298, UInt<32>(4099)) - node tmp300 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp301 = eq(tmp300, UInt<32>(8195)) - node tmp302 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp303 = eq(tmp302, UInt<32>(16387)) - node tmp304 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp305 = eq(tmp304, UInt<32>(20483)) - node tmp306 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp307 = eq(tmp306, UInt<32>(35)) - node tmp308 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp309 = eq(tmp308, UInt<32>(4131)) - node tmp310 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp311 = eq(tmp310, UInt<32>(8227)) - node tmp312 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp313 = eq(tmp312, UInt<32>(19)) - node tmp314 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp315 = eq(tmp314, UInt<32>(8211)) - node tmp316 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp317 = eq(tmp316, UInt<32>(12307)) - node tmp318 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp319 = eq(tmp318, UInt<32>(16403)) - node tmp320 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp321 = eq(tmp320, UInt<32>(24595)) - node tmp322 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp323 = eq(tmp322, UInt<32>(28691)) - node tmp324 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp325 = eq(tmp324, UInt<32>(4115)) - node tmp326 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp327 = eq(tmp326, UInt<32>(20499)) - node tmp328 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp329 = eq(tmp328, UInt<32>(1073762323)) - node tmp330 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp331 = eq(tmp330, UInt<32>(51)) - node tmp332 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp333 = eq(tmp332, UInt<32>(1073741875)) - node tmp334 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp335 = eq(tmp334, UInt<32>(4147)) - node tmp336 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp337 = eq(tmp336, UInt<32>(8243)) - node tmp338 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp339 = eq(tmp338, UInt<32>(12339)) - node tmp340 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp341 = eq(tmp340, UInt<32>(16435)) - node tmp342 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp343 = eq(tmp342, UInt<32>(20531)) - node tmp344 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp345 = eq(tmp344, UInt<32>(1073762355)) - node tmp346 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp347 = eq(tmp346, UInt<32>(24627)) - node tmp348 = bit-and(UInt<32>(-33525633), ctrl.ins) - node tmp349 = eq(tmp348, UInt<32>(28723)) - node tmp350 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp351 = eq(tmp350, UInt<32>(4211)) - node tmp352 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp353 = eq(tmp352, UInt<32>(8307)) - node tmp354 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp355 = eq(tmp354, UInt<32>(12403)) - node tmp356 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp357 = eq(tmp356, UInt<32>(20595)) - node tmp358 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp359 = eq(tmp358, UInt<32>(24691)) - node tmp360 = bit-and(UInt<32>(28799), ctrl.ins) - node tmp361 = eq(tmp360, UInt<32>(28787)) - node tmp362 = mux(tmp361, UInt<1>(0), UInt<1>(0)) - node tmp363 = mux(tmp359, UInt<1>(0), tmp362) - node tmp364 = mux(tmp357, UInt<1>(0), tmp363) - node tmp365 = mux(tmp355, UInt<1>(0), tmp364) - node tmp366 = mux(tmp353, UInt<1>(0), tmp365) - node tmp367 = mux(tmp351, UInt<1>(0), tmp366) - node tmp368 = mux(tmp349, UInt<1>(0), tmp367) - node tmp369 = mux(tmp347, UInt<1>(0), tmp368) - node tmp370 = mux(tmp345, UInt<1>(0), tmp369) - node tmp371 = mux(tmp343, UInt<1>(0), tmp370) - node tmp372 = mux(tmp341, UInt<1>(0), tmp371) - node tmp373 = mux(tmp339, UInt<1>(0), tmp372) - node tmp374 = mux(tmp337, UInt<1>(0), tmp373) - node tmp375 = mux(tmp335, UInt<1>(0), tmp374) - node tmp376 = mux(tmp333, UInt<1>(0), tmp375) - node tmp377 = mux(tmp331, UInt<1>(0), tmp376) - node tmp378 = mux(tmp329, UInt<1>(0), tmp377) - node tmp379 = mux(tmp327, UInt<1>(0), tmp378) - node tmp380 = mux(tmp325, UInt<1>(0), tmp379) - node tmp381 = mux(tmp323, UInt<1>(0), tmp380) - node tmp382 = mux(tmp321, UInt<1>(0), tmp381) - node tmp383 = mux(tmp319, UInt<1>(0), tmp382) - node tmp384 = mux(tmp317, UInt<1>(0), tmp383) - node tmp385 = mux(tmp315, UInt<1>(0), tmp384) - node tmp386 = mux(tmp313, UInt<1>(0), tmp385) - node tmp387 = mux(tmp311, UInt<1>(0), tmp386) - node tmp388 = mux(tmp309, UInt<1>(0), tmp387) - node tmp389 = mux(tmp307, UInt<1>(0), tmp388) - node tmp390 = mux(tmp305, UInt<1>(0), tmp389) - node tmp391 = mux(tmp303, UInt<1>(0), tmp390) - node tmp392 = mux(tmp301, UInt<1>(0), tmp391) - node tmp393 = mux(tmp299, UInt<1>(0), tmp392) - node tmp394 = mux(tmp297, UInt<1>(0), tmp393) - node tmp395 = mux(tmp295, UInt<1>(0), tmp394) - node tmp396 = mux(tmp293, UInt<1>(0), tmp395) - node tmp397 = mux(tmp291, UInt<1>(0), tmp396) - node tmp398 = mux(tmp289, UInt<1>(0), tmp397) - node tmp399 = mux(tmp287, UInt<1>(0), tmp398) - node tmp400 = mux(tmp285, UInt<1>(0), tmp399) - node tmp401 = mux(tmp283, UInt<1>(1), tmp400) - node tmp402 = mux(tmp281, UInt<1>(1), tmp401) - node tmp403 = mux(tmp279, UInt<1>(0), tmp402) - node tmp404 = mux(tmp277, UInt<1>(0), tmp403) - node tmp405 = mux(tmp361, UInt<1>(1), UInt<1>(1)) - node tmp406 = mux(tmp359, UInt<1>(1), tmp405) - node tmp407 = mux(tmp357, UInt<1>(1), tmp406) - node tmp408 = mux(tmp355, UInt<1>(0), tmp407) - node tmp409 = mux(tmp353, UInt<1>(0), tmp408) - node tmp410 = mux(tmp351, UInt<1>(0), tmp409) - node tmp411 = mux(tmp349, UInt<1>(0), tmp410) - node tmp412 = mux(tmp347, UInt<1>(0), tmp411) - node tmp413 = mux(tmp345, UInt<1>(0), tmp412) - node tmp414 = mux(tmp343, UInt<1>(0), tmp413) - node tmp415 = mux(tmp341, UInt<1>(0), tmp414) - node tmp416 = mux(tmp339, UInt<1>(0), tmp415) - node tmp417 = mux(tmp337, UInt<1>(0), tmp416) - node tmp418 = mux(tmp335, UInt<1>(0), tmp417) - node tmp419 = mux(tmp333, UInt<1>(0), tmp418) - node tmp420 = mux(tmp331, UInt<1>(0), tmp419) - node tmp421 = mux(tmp329, UInt<1>(0), tmp420) - node tmp422 = mux(tmp327, UInt<1>(0), tmp421) - node tmp423 = mux(tmp325, UInt<1>(0), tmp422) - node tmp424 = mux(tmp323, UInt<1>(0), tmp423) - node tmp425 = mux(tmp321, UInt<1>(0), tmp424) - node tmp426 = mux(tmp319, UInt<1>(0), tmp425) - node tmp427 = mux(tmp317, UInt<1>(0), tmp426) - node tmp428 = mux(tmp315, UInt<1>(0), tmp427) - node tmp429 = mux(tmp313, UInt<1>(0), tmp428) - node tmp430 = mux(tmp311, UInt<1>(0), tmp429) - node tmp431 = mux(tmp309, UInt<1>(0), tmp430) - node tmp432 = mux(tmp307, UInt<1>(0), tmp431) - node tmp433 = mux(tmp305, UInt<1>(0), tmp432) - node tmp434 = mux(tmp303, UInt<1>(0), tmp433) - node tmp435 = mux(tmp301, UInt<1>(0), tmp434) - node tmp436 = mux(tmp299, UInt<1>(0), tmp435) - node tmp437 = mux(tmp297, UInt<1>(0), tmp436) - node tmp438 = mux(tmp295, UInt<1>(1), tmp437) - node tmp439 = mux(tmp293, UInt<1>(1), tmp438) - node tmp440 = mux(tmp291, UInt<1>(1), tmp439) - node tmp441 = mux(tmp289, UInt<1>(1), tmp440) - node tmp442 = mux(tmp287, UInt<1>(1), tmp441) - node tmp443 = mux(tmp285, UInt<1>(1), tmp442) - node tmp444 = mux(tmp283, UInt<1>(0), tmp443) - node tmp445 = mux(tmp281, UInt<1>(1), tmp444) - node tmp446 = mux(tmp279, UInt<1>(1), tmp445) - node tmp447 = mux(tmp277, UInt<1>(1), tmp446) - node tmp448 = mux(tmp361, UInt<1>(1), UInt<1>(0)) - node tmp449 = mux(tmp359, UInt<1>(1), tmp448) - node tmp450 = mux(tmp357, UInt<1>(1), tmp449) - node tmp451 = mux(tmp355, UInt<1>(0), tmp450) - node tmp452 = mux(tmp353, UInt<1>(0), tmp451) - node tmp453 = mux(tmp351, UInt<1>(0), tmp452) - node tmp454 = mux(tmp349, UInt<1>(0), tmp453) - node tmp455 = mux(tmp347, UInt<1>(0), tmp454) - node tmp456 = mux(tmp345, UInt<1>(0), tmp455) - node tmp457 = mux(tmp343, UInt<1>(0), tmp456) - node tmp458 = mux(tmp341, UInt<1>(0), tmp457) - node tmp459 = mux(tmp339, UInt<1>(0), tmp458) - node tmp460 = mux(tmp337, UInt<1>(0), tmp459) - node tmp461 = mux(tmp335, UInt<1>(0), tmp460) - node tmp462 = mux(tmp333, UInt<1>(0), tmp461) - node tmp463 = mux(tmp331, UInt<1>(0), tmp462) - node tmp464 = mux(tmp329, UInt<1>(1), tmp463) - node tmp465 = mux(tmp327, UInt<1>(1), tmp464) - node tmp466 = mux(tmp325, UInt<1>(1), tmp465) - node tmp467 = mux(tmp323, UInt<1>(1), tmp466) - node tmp468 = mux(tmp321, UInt<1>(1), tmp467) - node tmp469 = mux(tmp319, UInt<1>(1), tmp468) - node tmp470 = mux(tmp317, UInt<1>(1), tmp469) - node tmp471 = mux(tmp315, UInt<1>(1), tmp470) - node tmp472 = mux(tmp313, UInt<1>(1), tmp471) - node tmp473 = mux(tmp311, UInt<1>(1), tmp472) - node tmp474 = mux(tmp309, UInt<1>(1), tmp473) - node tmp475 = mux(tmp307, UInt<1>(1), tmp474) - node tmp476 = mux(tmp305, UInt<1>(1), tmp475) - node tmp477 = mux(tmp303, UInt<1>(1), tmp476) - node tmp478 = mux(tmp301, UInt<1>(1), tmp477) - node tmp479 = mux(tmp299, UInt<1>(1), tmp478) - node tmp480 = mux(tmp297, UInt<1>(1), tmp479) - node tmp481 = mux(tmp295, UInt<1>(1), tmp480) - node tmp482 = mux(tmp293, UInt<1>(1), tmp481) - node tmp483 = mux(tmp291, UInt<1>(1), tmp482) - node tmp484 = mux(tmp289, UInt<1>(1), tmp483) - node tmp485 = mux(tmp287, UInt<1>(1), tmp484) - node tmp486 = mux(tmp285, UInt<1>(1), tmp485) - node tmp487 = mux(tmp283, UInt<1>(1), tmp486) - node tmp488 = mux(tmp281, UInt<1>(1), tmp487) - node tmp489 = mux(tmp279, UInt<1>(1), tmp488) - node tmp490 = mux(tmp277, UInt<1>(1), tmp489) - node tmp491 = mux(tmp361, UInt<3>(5), UInt<3>(7)) - node tmp492 = mux(tmp359, UInt<3>(5), tmp491) - node tmp493 = mux(tmp357, UInt<3>(5), tmp492) - node tmp494 = mux(tmp355, UInt<3>(5), tmp493) - node tmp495 = mux(tmp353, UInt<3>(5), tmp494) - node tmp496 = mux(tmp351, UInt<3>(5), tmp495) - node tmp497 = mux(tmp349, UInt<3>(7), tmp496) - node tmp498 = mux(tmp347, UInt<3>(7), tmp497) - node tmp499 = mux(tmp345, UInt<3>(7), tmp498) - node tmp500 = mux(tmp343, UInt<3>(7), tmp499) - node tmp501 = mux(tmp341, UInt<3>(7), tmp500) - node tmp502 = mux(tmp339, UInt<3>(7), tmp501) - node tmp503 = mux(tmp337, UInt<3>(7), tmp502) - node tmp504 = mux(tmp335, UInt<3>(7), tmp503) - node tmp505 = mux(tmp333, UInt<3>(7), tmp504) - node tmp506 = mux(tmp331, UInt<3>(7), tmp505) - node tmp507 = mux(tmp329, UInt<3>(0), tmp506) - node tmp508 = mux(tmp327, UInt<3>(0), tmp507) - node tmp509 = mux(tmp325, UInt<3>(0), tmp508) - node tmp510 = mux(tmp323, UInt<3>(0), tmp509) - node tmp511 = mux(tmp321, UInt<3>(0), tmp510) - node tmp512 = mux(tmp319, UInt<3>(0), tmp511) - node tmp513 = mux(tmp317, UInt<3>(0), tmp512) - node tmp514 = mux(tmp315, UInt<3>(0), tmp513) - node tmp515 = mux(tmp313, UInt<3>(0), tmp514) - node tmp516 = mux(tmp311, UInt<3>(1), tmp515) - node tmp517 = mux(tmp309, UInt<3>(1), tmp516) - node tmp518 = mux(tmp307, UInt<3>(1), tmp517) - node tmp519 = mux(tmp305, UInt<3>(0), tmp518) - node tmp520 = mux(tmp303, UInt<3>(0), tmp519) - node tmp521 = mux(tmp301, UInt<3>(0), tmp520) - node tmp522 = mux(tmp299, UInt<3>(0), tmp521) - node tmp523 = mux(tmp297, UInt<3>(0), tmp522) - node tmp524 = mux(tmp295, UInt<3>(4), tmp523) - node tmp525 = mux(tmp293, UInt<3>(4), tmp524) - node tmp526 = mux(tmp291, UInt<3>(4), tmp525) - node tmp527 = mux(tmp289, UInt<3>(4), tmp526) - node tmp528 = mux(tmp287, UInt<3>(4), tmp527) - node tmp529 = mux(tmp285, UInt<3>(4), tmp528) - node tmp530 = mux(tmp283, UInt<3>(0), tmp529) - node tmp531 = mux(tmp281, UInt<3>(3), tmp530) - node tmp532 = mux(tmp279, UInt<3>(2), tmp531) - node tmp533 = mux(tmp277, UInt<3>(2), tmp532) - node tmp534 = mux(tmp361, UInt<4>(11), UInt<4>(15)) - node tmp535 = mux(tmp359, UInt<4>(11), tmp534) - node tmp536 = mux(tmp357, UInt<4>(11), tmp535) - node tmp537 = mux(tmp355, UInt<4>(10), tmp536) - node tmp538 = mux(tmp353, UInt<4>(10), tmp537) - node tmp539 = mux(tmp351, UInt<4>(10), tmp538) - node tmp540 = mux(tmp349, UInt<4>(2), tmp539) - node tmp541 = mux(tmp347, UInt<4>(3), tmp540) - node tmp542 = mux(tmp345, UInt<4>(9), tmp541) - node tmp543 = mux(tmp343, UInt<4>(8), tmp542) - node tmp544 = mux(tmp341, UInt<4>(4), tmp543) - node tmp545 = mux(tmp339, UInt<4>(7), tmp544) - node tmp546 = mux(tmp337, UInt<4>(5), tmp545) - node tmp547 = mux(tmp335, UInt<4>(6), tmp546) - node tmp548 = mux(tmp333, UInt<4>(1), tmp547) - node tmp549 = mux(tmp331, UInt<4>(0), tmp548) - node tmp550 = mux(tmp329, UInt<4>(9), tmp549) - node tmp551 = mux(tmp327, UInt<4>(8), tmp550) - node tmp552 = mux(tmp325, UInt<4>(6), tmp551) - node tmp553 = mux(tmp323, UInt<4>(2), tmp552) - node tmp554 = mux(tmp321, UInt<4>(3), tmp553) - node tmp555 = mux(tmp319, UInt<4>(4), tmp554) - node tmp556 = mux(tmp317, UInt<4>(7), tmp555) - node tmp557 = mux(tmp315, UInt<4>(5), tmp556) - node tmp558 = mux(tmp313, UInt<4>(0), tmp557) - node tmp559 = mux(tmp311, UInt<4>(0), tmp558) - node tmp560 = mux(tmp309, UInt<4>(0), tmp559) - node tmp561 = mux(tmp307, UInt<4>(0), tmp560) - node tmp562 = mux(tmp305, UInt<4>(0), tmp561) - node tmp563 = mux(tmp303, UInt<4>(0), tmp562) - node tmp564 = mux(tmp301, UInt<4>(0), tmp563) - node tmp565 = mux(tmp299, UInt<4>(0), tmp564) - node tmp566 = mux(tmp297, UInt<4>(0), tmp565) - node tmp567 = mux(tmp295, UInt<4>(0), tmp566) - node tmp568 = mux(tmp293, UInt<4>(0), tmp567) - node tmp569 = mux(tmp291, UInt<4>(0), tmp568) - node tmp570 = mux(tmp289, UInt<4>(0), tmp569) - node tmp571 = mux(tmp287, UInt<4>(0), tmp570) - node tmp572 = mux(tmp285, UInt<4>(0), tmp571) - node tmp573 = mux(tmp283, UInt<4>(0), tmp572) - node tmp574 = mux(tmp281, UInt<4>(0), tmp573) - node tmp575 = mux(tmp279, UInt<4>(0), tmp574) - node tmp576 = mux(tmp277, UInt<4>(11), tmp575) - node tmp577 = mux(tmp361, UInt<3>(7), UInt<3>(7)) - node tmp578 = mux(tmp359, UInt<3>(7), tmp577) - node tmp579 = mux(tmp357, UInt<3>(7), tmp578) - node tmp580 = mux(tmp355, UInt<3>(7), tmp579) - node tmp581 = mux(tmp353, UInt<3>(7), tmp580) - node tmp582 = mux(tmp351, UInt<3>(7), tmp581) - node tmp583 = mux(tmp349, UInt<3>(7), tmp582) - node tmp584 = mux(tmp347, UInt<3>(7), tmp583) - node tmp585 = mux(tmp345, UInt<3>(7), tmp584) - node tmp586 = mux(tmp343, UInt<3>(7), tmp585) - node tmp587 = mux(tmp341, UInt<3>(7), tmp586) - node tmp588 = mux(tmp339, UInt<3>(7), tmp587) - node tmp589 = mux(tmp337, UInt<3>(7), tmp588) - node tmp590 = mux(tmp335, UInt<3>(7), tmp589) - node tmp591 = mux(tmp333, UInt<3>(7), tmp590) - node tmp592 = mux(tmp331, UInt<3>(7), tmp591) - node tmp593 = mux(tmp329, UInt<3>(7), tmp592) - node tmp594 = mux(tmp327, UInt<3>(7), tmp593) - node tmp595 = mux(tmp325, UInt<3>(7), tmp594) - node tmp596 = mux(tmp323, UInt<3>(7), tmp595) - node tmp597 = mux(tmp321, UInt<3>(7), tmp596) - node tmp598 = mux(tmp319, UInt<3>(7), tmp597) - node tmp599 = mux(tmp317, UInt<3>(7), tmp598) - node tmp600 = mux(tmp315, UInt<3>(7), tmp599) - node tmp601 = mux(tmp313, UInt<3>(7), tmp600) - node tmp602 = mux(tmp311, UInt<3>(7), tmp601) - node tmp603 = mux(tmp309, UInt<3>(7), tmp602) - node tmp604 = mux(tmp307, UInt<3>(7), tmp603) - node tmp605 = mux(tmp305, UInt<3>(7), tmp604) - node tmp606 = mux(tmp303, UInt<3>(7), tmp605) - node tmp607 = mux(tmp301, UInt<3>(7), tmp606) - node tmp608 = mux(tmp299, UInt<3>(7), tmp607) - node tmp609 = mux(tmp297, UInt<3>(7), tmp608) - node tmp610 = mux(tmp295, UInt<3>(4), tmp609) - node tmp611 = mux(tmp293, UInt<3>(0), tmp610) - node tmp612 = mux(tmp291, UInt<3>(5), tmp611) - node tmp613 = mux(tmp289, UInt<3>(1), tmp612) - node tmp614 = mux(tmp287, UInt<3>(6), tmp613) - node tmp615 = mux(tmp285, UInt<3>(2), tmp614) - node tmp616 = mux(tmp283, UInt<3>(7), tmp615) - node tmp617 = mux(tmp281, UInt<3>(7), tmp616) - node tmp618 = mux(tmp279, UInt<3>(7), tmp617) - node tmp619 = mux(tmp277, UInt<3>(7), tmp618) - node tmp620 = mux(tmp361, UInt<1>(0), UInt<1>(0)) - node tmp621 = mux(tmp359, UInt<1>(0), tmp620) - node tmp622 = mux(tmp357, UInt<1>(0), tmp621) - node tmp623 = mux(tmp355, UInt<1>(0), tmp622) - node tmp624 = mux(tmp353, UInt<1>(0), tmp623) - node tmp625 = mux(tmp351, UInt<1>(0), tmp624) - node tmp626 = mux(tmp349, UInt<1>(0), tmp625) - node tmp627 = mux(tmp347, UInt<1>(0), tmp626) - node tmp628 = mux(tmp345, UInt<1>(0), tmp627) - node tmp629 = mux(tmp343, UInt<1>(0), tmp628) - node tmp630 = mux(tmp341, UInt<1>(0), tmp629) - node tmp631 = mux(tmp339, UInt<1>(0), tmp630) - node tmp632 = mux(tmp337, UInt<1>(0), tmp631) - node tmp633 = mux(tmp335, UInt<1>(0), tmp632) - node tmp634 = mux(tmp333, UInt<1>(0), tmp633) - node tmp635 = mux(tmp331, UInt<1>(0), tmp634) - node tmp636 = mux(tmp329, UInt<1>(0), tmp635) - node tmp637 = mux(tmp327, UInt<1>(0), tmp636) - node tmp638 = mux(tmp325, UInt<1>(0), tmp637) - node tmp639 = mux(tmp323, UInt<1>(0), tmp638) - node tmp640 = mux(tmp321, UInt<1>(0), tmp639) - node tmp641 = mux(tmp319, UInt<1>(0), tmp640) - node tmp642 = mux(tmp317, UInt<1>(0), tmp641) - node tmp643 = mux(tmp315, UInt<1>(0), tmp642) - node tmp644 = mux(tmp313, UInt<1>(0), tmp643) - node tmp645 = mux(tmp311, UInt<1>(0), tmp644) - node tmp646 = mux(tmp309, UInt<1>(0), tmp645) - node tmp647 = mux(tmp307, UInt<1>(0), tmp646) - node tmp648 = mux(tmp305, UInt<1>(0), tmp647) - node tmp649 = mux(tmp303, UInt<1>(0), tmp648) - node tmp650 = mux(tmp301, UInt<1>(0), tmp649) - node tmp651 = mux(tmp299, UInt<1>(0), tmp650) - node tmp652 = mux(tmp297, UInt<1>(0), tmp651) - node tmp653 = mux(tmp295, UInt<1>(0), tmp652) - node tmp654 = mux(tmp293, UInt<1>(0), tmp653) - node tmp655 = mux(tmp291, UInt<1>(0), tmp654) - node tmp656 = mux(tmp289, UInt<1>(0), tmp655) - node tmp657 = mux(tmp287, UInt<1>(0), tmp656) - node tmp658 = mux(tmp285, UInt<1>(0), tmp657) - node tmp659 = mux(tmp283, UInt<1>(1), tmp658) - node tmp660 = mux(tmp281, UInt<1>(1), tmp659) - node tmp661 = mux(tmp279, UInt<1>(0), tmp660) - node tmp662 = mux(tmp277, UInt<1>(0), tmp661) - node tmp663 = mux(tmp361, UInt<2>(3), UInt<2>(3)) - node tmp664 = mux(tmp359, UInt<2>(3), tmp663) - node tmp665 = mux(tmp357, UInt<2>(3), tmp664) - node tmp666 = mux(tmp355, UInt<2>(3), tmp665) - node tmp667 = mux(tmp353, UInt<2>(3), tmp666) - node tmp668 = mux(tmp351, UInt<2>(3), tmp667) - node tmp669 = mux(tmp349, UInt<2>(3), tmp668) - node tmp670 = mux(tmp347, UInt<2>(3), tmp669) - node tmp671 = mux(tmp345, UInt<2>(3), tmp670) - node tmp672 = mux(tmp343, UInt<2>(3), tmp671) - node tmp673 = mux(tmp341, UInt<2>(3), tmp672) - node tmp674 = mux(tmp339, UInt<2>(3), tmp673) - node tmp675 = mux(tmp337, UInt<2>(3), tmp674) - node tmp676 = mux(tmp335, UInt<2>(3), tmp675) - node tmp677 = mux(tmp333, UInt<2>(3), tmp676) - node tmp678 = mux(tmp331, UInt<2>(3), tmp677) - node tmp679 = mux(tmp329, UInt<2>(3), tmp678) - node tmp680 = mux(tmp327, UInt<2>(3), tmp679) - node tmp681 = mux(tmp325, UInt<2>(3), tmp680) - node tmp682 = mux(tmp323, UInt<2>(3), tmp681) - node tmp683 = mux(tmp321, UInt<2>(3), tmp682) - node tmp684 = mux(tmp319, UInt<2>(3), tmp683) - node tmp685 = mux(tmp317, UInt<2>(3), tmp684) - node tmp686 = mux(tmp315, UInt<2>(3), tmp685) - node tmp687 = mux(tmp313, UInt<2>(3), tmp686) - node tmp688 = mux(tmp311, UInt<2>(0), tmp687) - node tmp689 = mux(tmp309, UInt<2>(1), tmp688) - node tmp690 = mux(tmp307, UInt<2>(2), tmp689) - node tmp691 = mux(tmp305, UInt<2>(3), tmp690) - node tmp692 = mux(tmp303, UInt<2>(3), tmp691) - node tmp693 = mux(tmp301, UInt<2>(3), tmp692) - node tmp694 = mux(tmp299, UInt<2>(3), tmp693) - node tmp695 = mux(tmp297, UInt<2>(3), tmp694) - node tmp696 = mux(tmp295, UInt<2>(3), tmp695) - node tmp697 = mux(tmp293, UInt<2>(3), tmp696) - node tmp698 = mux(tmp291, UInt<2>(3), tmp697) - node tmp699 = mux(tmp289, UInt<2>(3), tmp698) - node tmp700 = mux(tmp287, UInt<2>(3), tmp699) - node tmp701 = mux(tmp285, UInt<2>(3), tmp700) - node tmp702 = mux(tmp283, UInt<2>(3), tmp701) - node tmp703 = mux(tmp281, UInt<2>(3), tmp702) - node tmp704 = mux(tmp279, UInt<2>(3), tmp703) - node tmp705 = mux(tmp277, UInt<2>(3), tmp704) - node tmp706 = mux(tmp361, UInt<3>(7), UInt<3>(7)) - node tmp707 = mux(tmp359, UInt<3>(7), tmp706) - node tmp708 = mux(tmp357, UInt<3>(7), tmp707) - node tmp709 = mux(tmp355, UInt<3>(7), tmp708) - node tmp710 = mux(tmp353, UInt<3>(7), tmp709) - node tmp711 = mux(tmp351, UInt<3>(7), tmp710) - node tmp712 = mux(tmp349, UInt<3>(7), tmp711) - node tmp713 = mux(tmp347, UInt<3>(7), tmp712) - node tmp714 = mux(tmp345, UInt<3>(7), tmp713) - node tmp715 = mux(tmp343, UInt<3>(7), tmp714) - node tmp716 = mux(tmp341, UInt<3>(7), tmp715) - node tmp717 = mux(tmp339, UInt<3>(7), tmp716) - node tmp718 = mux(tmp337, UInt<3>(7), tmp717) - node tmp719 = mux(tmp335, UInt<3>(7), tmp718) - node tmp720 = mux(tmp333, UInt<3>(7), tmp719) - node tmp721 = mux(tmp331, UInt<3>(7), tmp720) - node tmp722 = mux(tmp329, UInt<3>(7), tmp721) - node tmp723 = mux(tmp327, UInt<3>(7), tmp722) - node tmp724 = mux(tmp325, UInt<3>(7), tmp723) - node tmp725 = mux(tmp323, UInt<3>(7), tmp724) - node tmp726 = mux(tmp321, UInt<3>(7), tmp725) - node tmp727 = mux(tmp319, UInt<3>(7), tmp726) - node tmp728 = mux(tmp317, UInt<3>(7), tmp727) - node tmp729 = mux(tmp315, UInt<3>(7), tmp728) - node tmp730 = mux(tmp313, UInt<3>(7), tmp729) - node tmp731 = mux(tmp311, UInt<3>(7), tmp730) - node tmp732 = mux(tmp309, UInt<3>(7), tmp731) - node tmp733 = mux(tmp307, UInt<3>(7), tmp732) - node tmp734 = mux(tmp305, UInt<3>(3), tmp733) - node tmp735 = mux(tmp303, UInt<3>(4), tmp734) - node tmp736 = mux(tmp301, UInt<3>(0), tmp735) - node tmp737 = mux(tmp299, UInt<3>(1), tmp736) - node tmp738 = mux(tmp297, UInt<3>(2), tmp737) - node tmp739 = mux(tmp295, UInt<3>(7), tmp738) - node tmp740 = mux(tmp293, UInt<3>(7), tmp739) - node tmp741 = mux(tmp291, UInt<3>(7), tmp740) - node tmp742 = mux(tmp289, UInt<3>(7), tmp741) - node tmp743 = mux(tmp287, UInt<3>(7), tmp742) - node tmp744 = mux(tmp285, UInt<3>(7), tmp743) - node tmp745 = mux(tmp283, UInt<3>(7), tmp744) - node tmp746 = mux(tmp281, UInt<3>(7), tmp745) - node tmp747 = mux(tmp279, UInt<3>(7), tmp746) - node tmp748 = mux(tmp277, UInt<3>(7), tmp747) - node tmp749 = mux(tmp361, UInt<2>(3), UInt<2>(0)) - node tmp750 = mux(tmp359, UInt<2>(3), tmp749) - node tmp751 = mux(tmp357, UInt<2>(3), tmp750) - node tmp752 = mux(tmp355, UInt<2>(3), tmp751) - node tmp753 = mux(tmp353, UInt<2>(3), tmp752) - node tmp754 = mux(tmp351, UInt<2>(3), tmp753) - node tmp755 = mux(tmp349, UInt<2>(0), tmp754) - node tmp756 = mux(tmp347, UInt<2>(0), tmp755) - node tmp757 = mux(tmp345, UInt<2>(0), tmp756) - node tmp758 = mux(tmp343, UInt<2>(0), tmp757) - node tmp759 = mux(tmp341, UInt<2>(0), tmp758) - node tmp760 = mux(tmp339, UInt<2>(0), tmp759) - node tmp761 = mux(tmp337, UInt<2>(0), tmp760) - node tmp762 = mux(tmp335, UInt<2>(0), tmp761) - node tmp763 = mux(tmp333, UInt<2>(0), tmp762) - node tmp764 = mux(tmp331, UInt<2>(0), tmp763) - node tmp765 = mux(tmp329, UInt<2>(0), tmp764) - node tmp766 = mux(tmp327, UInt<2>(0), tmp765) - node tmp767 = mux(tmp325, UInt<2>(0), tmp766) - node tmp768 = mux(tmp323, UInt<2>(0), tmp767) - node tmp769 = mux(tmp321, UInt<2>(0), tmp768) - node tmp770 = mux(tmp319, UInt<2>(0), tmp769) - node tmp771 = mux(tmp317, UInt<2>(0), tmp770) - node tmp772 = mux(tmp315, UInt<2>(0), tmp771) - node tmp773 = mux(tmp313, UInt<2>(0), tmp772) - node tmp774 = mux(tmp311, UInt<2>(0), tmp773) - node tmp775 = mux(tmp309, UInt<2>(0), tmp774) - node tmp776 = mux(tmp307, UInt<2>(0), tmp775) - node tmp777 = mux(tmp305, UInt<2>(1), tmp776) - node tmp778 = mux(tmp303, UInt<2>(1), tmp777) - node tmp779 = mux(tmp301, UInt<2>(1), tmp778) - node tmp780 = mux(tmp299, UInt<2>(1), tmp779) - node tmp781 = mux(tmp297, UInt<2>(1), tmp780) - node tmp782 = mux(tmp295, UInt<2>(0), tmp781) - node tmp783 = mux(tmp293, UInt<2>(0), tmp782) - node tmp784 = mux(tmp291, UInt<2>(0), tmp783) - node tmp785 = mux(tmp289, UInt<2>(0), tmp784) - node tmp786 = mux(tmp287, UInt<2>(0), tmp785) - node tmp787 = mux(tmp285, UInt<2>(0), tmp786) - node tmp788 = mux(tmp283, UInt<2>(2), tmp787) - node tmp789 = mux(tmp281, UInt<2>(2), tmp788) - node tmp790 = mux(tmp279, UInt<2>(0), tmp789) - node tmp791 = mux(tmp277, UInt<2>(0), tmp790) - node tmp792 = mux(tmp361, UInt<1>(0), UInt<1>(0)) - node tmp793 = mux(tmp359, UInt<1>(0), tmp792) - node tmp794 = mux(tmp357, UInt<1>(0), tmp793) - node tmp795 = mux(tmp355, UInt<1>(0), tmp794) - node tmp796 = mux(tmp353, UInt<1>(0), tmp795) - node tmp797 = mux(tmp351, UInt<1>(0), tmp796) - node tmp798 = mux(tmp349, UInt<1>(1), tmp797) - node tmp799 = mux(tmp347, UInt<1>(1), tmp798) - node tmp800 = mux(tmp345, UInt<1>(1), tmp799) - node tmp801 = mux(tmp343, UInt<1>(1), tmp800) - node tmp802 = mux(tmp341, UInt<1>(1), tmp801) - node tmp803 = mux(tmp339, UInt<1>(1), tmp802) - node tmp804 = mux(tmp337, UInt<1>(1), tmp803) - node tmp805 = mux(tmp335, UInt<1>(1), tmp804) - node tmp806 = mux(tmp333, UInt<1>(1), tmp805) - node tmp807 = mux(tmp331, UInt<1>(1), tmp806) - node tmp808 = mux(tmp329, UInt<1>(1), tmp807) - node tmp809 = mux(tmp327, UInt<1>(1), tmp808) - node tmp810 = mux(tmp325, UInt<1>(1), tmp809) - node tmp811 = mux(tmp323, UInt<1>(1), tmp810) - node tmp812 = mux(tmp321, UInt<1>(1), tmp811) - node tmp813 = mux(tmp319, UInt<1>(1), tmp812) - node tmp814 = mux(tmp317, UInt<1>(1), tmp813) - node tmp815 = mux(tmp315, UInt<1>(1), tmp814) - node tmp816 = mux(tmp313, UInt<1>(1), tmp815) - node tmp817 = mux(tmp311, UInt<1>(0), tmp816) - node tmp818 = mux(tmp309, UInt<1>(0), tmp817) - node tmp819 = mux(tmp307, UInt<1>(0), tmp818) - node tmp820 = mux(tmp305, UInt<1>(1), tmp819) - node tmp821 = mux(tmp303, UInt<1>(1), tmp820) - node tmp822 = mux(tmp301, UInt<1>(1), tmp821) - node tmp823 = mux(tmp299, UInt<1>(1), tmp822) - node tmp824 = mux(tmp297, UInt<1>(1), tmp823) - node tmp825 = mux(tmp295, UInt<1>(0), tmp824) - node tmp826 = mux(tmp293, UInt<1>(0), tmp825) - node tmp827 = mux(tmp291, UInt<1>(0), tmp826) - node tmp828 = mux(tmp289, UInt<1>(0), tmp827) - node tmp829 = mux(tmp287, UInt<1>(0), tmp828) - node tmp830 = mux(tmp285, UInt<1>(0), tmp829) - node tmp831 = mux(tmp283, UInt<1>(1), tmp830) - node tmp832 = mux(tmp281, UInt<1>(1), tmp831) - node tmp833 = mux(tmp279, UInt<1>(1), tmp832) - node tmp834 = mux(tmp277, UInt<1>(1), tmp833) - node tmp835 = mux(tmp361, UInt<2>(3), UInt<2>(0)) - node tmp836 = mux(tmp359, UInt<2>(2), tmp835) - node tmp837 = mux(tmp357, UInt<2>(1), tmp836) - node tmp838 = mux(tmp355, UInt<2>(3), tmp837) - node tmp839 = mux(tmp353, UInt<2>(2), tmp838) - node tmp840 = mux(tmp351, UInt<2>(1), tmp839) - node tmp841 = mux(tmp349, UInt<2>(0), tmp840) - node tmp842 = mux(tmp347, UInt<2>(0), tmp841) - node tmp843 = mux(tmp345, UInt<2>(0), tmp842) - node tmp844 = mux(tmp343, UInt<2>(0), tmp843) - node tmp845 = mux(tmp341, UInt<2>(0), tmp844) - node tmp846 = mux(tmp339, UInt<2>(0), tmp845) - node tmp847 = mux(tmp337, UInt<2>(0), tmp846) - node tmp848 = mux(tmp335, UInt<2>(0), tmp847) - node tmp849 = mux(tmp333, UInt<2>(0), tmp848) - node tmp850 = mux(tmp331, UInt<2>(0), tmp849) - node tmp851 = mux(tmp329, UInt<2>(0), tmp850) - node tmp852 = mux(tmp327, UInt<2>(0), tmp851) - node tmp853 = mux(tmp325, UInt<2>(0), tmp852) - node tmp854 = mux(tmp323, UInt<2>(0), tmp853) - node tmp855 = mux(tmp321, UInt<2>(0), tmp854) - node tmp856 = mux(tmp319, UInt<2>(0), tmp855) - node tmp857 = mux(tmp317, UInt<2>(0), tmp856) - node tmp858 = mux(tmp315, UInt<2>(0), tmp857) - node tmp859 = mux(tmp313, UInt<2>(0), tmp858) - node tmp860 = mux(tmp311, UInt<2>(0), tmp859) - node tmp861 = mux(tmp309, UInt<2>(0), tmp860) - node tmp862 = mux(tmp307, UInt<2>(0), tmp861) - node tmp863 = mux(tmp305, UInt<2>(0), tmp862) - node tmp864 = mux(tmp303, UInt<2>(0), tmp863) - node tmp865 = mux(tmp301, UInt<2>(0), tmp864) - node tmp866 = mux(tmp299, UInt<2>(0), tmp865) - node tmp867 = mux(tmp297, UInt<2>(0), tmp866) - node tmp868 = mux(tmp295, UInt<2>(0), tmp867) - node tmp869 = mux(tmp293, UInt<2>(0), tmp868) - node tmp870 = mux(tmp291, UInt<2>(0), tmp869) - node tmp871 = mux(tmp289, UInt<2>(0), tmp870) - node tmp872 = mux(tmp287, UInt<2>(0), tmp871) - node tmp873 = mux(tmp285, UInt<2>(0), tmp872) - node tmp874 = mux(tmp283, UInt<2>(0), tmp873) - node tmp875 = mux(tmp281, UInt<2>(0), tmp874) - node tmp876 = mux(tmp279, UInt<2>(0), tmp875) - node tmp877 = mux(tmp277, UInt<2>(0), tmp876) - node tmp878 = bits(ctrl.ins, 19, 15) - node rs1_addr879 = tmp878 - node tmp880 = bits(ctrl.ins, 24, 20) - node rs2_addr881 = tmp880 - reg st_type882 : UInt<1> - st_type882 := ctrl.st_type - reg ld_type883 : UInt<1> - ld_type883 := tmp748 - reg wb_sel884 : UInt<1> - wb_sel884 := tmp791 - reg wb_en885 : UInt<1> - wb_en885 := tmp834 - reg csr_cmd886 : UInt<1> - csr_cmd886 := tmp877 - ctrl.pc_sel := tmp404 - node tmp887 = bit-not(ctrl.data_re) - node tmp888 = bit-and(ctrl.stall, tmp887) - node tmp889 = bit-not(tmp888) - ctrl.inst_re := tmp889 - node tmp890 = neq(tmp748, UInt<3>(7)) - wire tmp891 : UInt<1> - tmp891 := tmp662 - node tmp892 = bit-or(tmp890, tmp891) - node tmp893 = mux(tmp892, UInt<1>(1), UInt<1>(0)) - ctrl.inst_type := tmp893 - ctrl.A_sel := tmp447 - ctrl.B_sel := tmp490 - ctrl.imm_sel := tmp533 - ctrl.alu_op := tmp576 - ctrl.br_type := tmp619 - ctrl.st_type := tmp705 - node tmp894 = bit-not(ctrl.stall) - when tmp894 : - st_type882 := ctrl.st_type - ld_type883 := tmp748 - wb_sel884 := tmp791 - wb_en885 := tmp834 - csr_cmd886 := tmp877 - node tmp895 = neq(ctrl.ld_type, UInt<3>(7)) - node tmp896 = neq(tmp748, UInt<3>(7)) - node tmp897 = mux(ctrl.stall, tmp895, tmp896) - ctrl.data_re := tmp897 - ctrl.ld_type := ld_type883 - ctrl.wb_en := wb_en885 - ctrl.wb_sel := wb_sel884 - ctrl.csr_cmd := csr_cmd886 - module Core : - input stall : UInt<1> - output host : {flip hid : UInt<1>, tohost : UInt<32>, status : UInt<32>} - output icache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} - output dcache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} - inst dpath of Datapath - inst ctrl of Control - host := dpath.host - icache := dpath.icache - dcache := dpath.dcache - dpath.ctrl := ctrl.ctrl - dpath.stall := stall - module Fifo : - input enq : {valid : UInt<1>, bits : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}, flip ready : UInt<1>} - output deq : {valid : UInt<1>, bits : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}, flip ready : UInt<1>} - output count : UInt<3> - mem ram : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}[4] - reg cnt898 : UInt<2> - on-reset cnt898 := UInt<1>(0) - reg cnt899 : UInt<2> - on-reset cnt899 := UInt<1>(0) - reg maybe-full900 : UInt<1> - on-reset maybe-full900 := UInt<1>(0) - node tmp901 = eq(cnt898, cnt899) - node ptr-match902 = tmp901 - node tmp903 = bit-not(maybe-full900) - node tmp904 = bit-and(ptr-match902, tmp903) - node empty905 = tmp904 - node tmp906 = bit-and(ptr-match902, maybe-full900) - node full907 = tmp906 - node tmp908 = bit-and(UInt<1>(0), empty905) - node maybe-flow909 = tmp908 - node tmp910 = bit-and(maybe-flow909, deq.ready) - node do-flow911 = tmp910 - node tmp912 = bit-not(do-flow911) - node tmp913 = bit-and(enq.valid, tmp912) - node tmp914 = bit-and(enq.ready, tmp913) - node do-enq915 = tmp914 - node tmp916 = bit-not(do-flow911) - node tmp917 = bit-and(deq.valid, tmp916) - node tmp918 = bit-and(deq.ready, tmp917) - node do-deq919 = tmp918 - when do-enq915 : - accessor a920 = ram[cnt898] - a920 := enq.bits - node tmp921 = eq(cnt898, UInt<2>(3)) - node wrap922 = tmp921 - node tmp923 = bit-and(UInt<1>(0), wrap922) - node tmp924 = add-wrap(cnt898, UInt<1>(1)) - node tmp925 = mux(tmp923, UInt<1>(0), tmp924) - cnt898 := tmp925 - when do-deq919 : - node tmp926 = eq(cnt899, UInt<2>(3)) - node wrap927 = tmp926 - node tmp928 = bit-and(UInt<1>(0), wrap927) - node tmp929 = add-wrap(cnt899, UInt<1>(1)) - node tmp930 = mux(tmp928, UInt<1>(0), tmp929) - cnt899 := tmp930 - node tmp931 = neq(do-enq915, do-deq919) - when tmp931 : - maybe-full900 := do-enq915 - node tmp932 = bit-and(UInt<1>(0), enq.valid) - node tmp933 = bit-or(empty905, tmp932) - node tmp934 = bit-not(tmp933) - deq.valid := tmp934 - node tmp935 = bit-and(UInt<1>(0), deq.ready) - node tmp936 = bit-or(full907, tmp935) - node tmp937 = bit-not(tmp936) - enq.ready := tmp937 - accessor a938 = ram[cnt899] - node tmp939 = mux(maybe-flow909, enq.bits, a938) - deq.bits := tmp939 - node tmp940 = sub-wrap(cnt898, cnt899) - node ptr-diff941 = tmp940 - node tmp942 = bit-and(maybe-full900, ptr-match902) - node tmp943 = cat(tmp942, ptr-diff941) - count := tmp943 - module Fifo944 : - input enq : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>} - output deq : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>} - output count : UInt<3> - mem ram : {data : UInt<32>}[4] - reg cnt945 : UInt<2> - on-reset cnt945 := UInt<1>(0) - reg cnt946 : UInt<2> - on-reset cnt946 := UInt<1>(0) - reg maybe-full947 : UInt<1> - on-reset maybe-full947 := UInt<1>(0) - node tmp948 = eq(cnt945, cnt946) - node ptr-match949 = tmp948 - node tmp950 = bit-not(maybe-full947) - node tmp951 = bit-and(ptr-match949, tmp950) - node empty952 = tmp951 - node tmp953 = bit-and(ptr-match949, maybe-full947) - node full954 = tmp953 - node tmp955 = bit-and(UInt<1>(0), empty952) - node maybe-flow956 = tmp955 - node tmp957 = bit-and(maybe-flow956, deq.ready) - node do-flow958 = tmp957 - node tmp959 = bit-not(do-flow958) - node tmp960 = bit-and(enq.valid, tmp959) - node tmp961 = bit-and(enq.ready, tmp960) - node do-enq962 = tmp961 - node tmp963 = bit-not(do-flow958) - node tmp964 = bit-and(deq.valid, tmp963) - node tmp965 = bit-and(deq.ready, tmp964) - node do-deq966 = tmp965 - when do-enq962 : - accessor a967 = ram[cnt945] - a967 := enq.bits - node tmp968 = eq(cnt945, UInt<2>(3)) - node wrap969 = tmp968 - node tmp970 = bit-and(UInt<1>(0), wrap969) - node tmp971 = add-wrap(cnt945, UInt<1>(1)) - node tmp972 = mux(tmp970, UInt<1>(0), tmp971) - cnt945 := tmp972 - when do-deq966 : - node tmp973 = eq(cnt946, UInt<2>(3)) - node wrap974 = tmp973 - node tmp975 = bit-and(UInt<1>(0), wrap974) - node tmp976 = add-wrap(cnt946, UInt<1>(1)) - node tmp977 = mux(tmp975, UInt<1>(0), tmp976) - cnt946 := tmp977 - node tmp978 = neq(do-enq962, do-deq966) - when tmp978 : - maybe-full947 := do-enq962 - node tmp979 = bit-and(UInt<1>(0), enq.valid) - node tmp980 = bit-or(empty952, tmp979) - node tmp981 = bit-not(tmp980) - deq.valid := tmp981 - node tmp982 = bit-and(UInt<1>(0), deq.ready) - node tmp983 = bit-or(full954, tmp982) - node tmp984 = bit-not(tmp983) - enq.ready := tmp984 - accessor a985 = ram[cnt946] - node tmp986 = mux(maybe-flow956, enq.bits, a985) - deq.bits := tmp986 - node tmp987 = sub-wrap(cnt945, cnt946) - node ptr-diff988 = tmp987 - node tmp989 = bit-and(maybe-full947, ptr-match949) - node tmp990 = cat(tmp989, ptr-diff988) - count := tmp990 - module Memory : - output stall : UInt<1> - output memory : {req_cmd : {valid : UInt<1>, bits : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}, flip ready : UInt<1>}, req_data : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>}, flip resp : {valid : UInt<1>, bits : {data : UInt<32>, tag : UInt<5>}, flip ready : UInt<1>}} - input icache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} - input dcache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} - inst memReqCmdQueue of Fifo - inst memReqDataQueue of Fifo944 - reg state991 : UInt<?> - on-reset state991 := UInt<1>(0) - reg tag992 : UInt<5> - on-reset tag992 := UInt<1>(0) - node tmp993 = eq(state991, UInt<1>(0)) - node tmp994 = eq(dcache.we, UInt<1>(0)) - node tmp995 = bit-not(tmp994) - node tmp996 = bit-or(dcache.re, tmp995) - node tmp997 = bit-or(icache.re, tmp996) - node tmp998 = bit-and(tmp993, tmp997) - node cpuReq999 = tmp998 - node tmp1000 = bits(icache.addr, 31, 2) - node tmp1001 = cat(tmp1000, UInt<2>(0)) - node iaddr1002 = tmp1001 - node tmp1003 = bits(dcache.addr, 31, 2) - node tmp1004 = cat(tmp1003, UInt<2>(0)) - node daddr1005 = tmp1004 - reg idata1006 : UInt<?> - reg ddata1007 : UInt<?> - reg ire1008 : UInt<1> - reg dre1009 : UInt<1> - icache.dout := idata1006 - dcache.dout := ddata1007 - memory.req_cmd := memReqCmdQueue.deq - memory.req_data := memReqDataQueue.deq - memory.resp.ready := UInt<1>(0) - node tmp1010 = eq(state991, UInt<1>(1)) - node tmp1011 = bit-not(memReqDataQueue.enq.ready) - node tmp1012 = bit-or(memReqCmdQueue.enq.ready, tmp1011) - node tmp1013 = bit-not(tmp1012) - node tmp1014 = bit-or(tmp1010, tmp1013) - stall := tmp1014 - node tmp1015 = eq(dcache.we, UInt<1>(0)) - node tmp1016 = bit-not(tmp1015) - memReqCmdQueue.enq.bits.rw := tmp1016 - memReqCmdQueue.enq.bits.tag := tag992 - node tmp1017 = eq(dcache.we, UInt<1>(0)) - node tmp1018 = bit-not(tmp1017) - node tmp1019 = bit-not(icache.re) - node tmp1020 = bit-or(tmp1018, tmp1019) - node tmp1021 = mux(tmp1020, daddr1005, iaddr1002) - memReqCmdQueue.enq.bits.addr := tmp1021 - memReqCmdQueue.enq.bits.mask := dcache.we - node tmp1022 = bit-and(memReqDataQueue.enq.ready, cpuReq999) - memReqCmdQueue.enq.valid := tmp1022 - memReqDataQueue.enq.bits.data := dcache.din - node tmp1023 = eq(dcache.we, UInt<1>(0)) - node tmp1024 = bit-not(tmp1023) - node tmp1025 = bit-and(cpuReq999, tmp1024) - node tmp1026 = bit-and(memReqCmdQueue.enq.ready, tmp1025) - memReqDataQueue.enq.valid := tmp1026 - node tmp1027 = eq(state991, UInt<1>(0)) - when tmp1027 : - node tmp1028 = bit-or(icache.re, dcache.re) - node tmp1029 = eq(dcache.we, UInt<1>(0)) - node tmp1030 = bit-not(tmp1029) - node tmp1031 = bit-and(tmp1030, memReqCmdQueue.enq.ready) - node tmp1032 = bit-not(tmp1031) - node tmp1033 = bit-and(tmp1028, tmp1032) - when tmp1033 : - ire1008 := icache.re - dre1009 := dcache.re - state991 := UInt<1>(1) - node tmp1034 = eq(state991, UInt<1>(1)) - when tmp1034 : - memory.resp.ready := UInt<1>(1) - node tmp1035 = eq(memory.resp.bits.tag, tag992) - node tmp1036 = bit-and(memory.resp.valid, tmp1035) - when tmp1036 : - state991 := UInt<1>(0) - node tmp1037 = add-wrap(tag992, UInt<1>(1)) - tag992 := tmp1037 - memory.resp.ready := UInt<1>(0) - when ire1008 : - idata1006 := memory.resp.bits.data - when dre1009 : - ddata1007 := memory.resp.bits.data - module Tile : - output htif : {host : {flip hid : UInt<1>, tohost : UInt<32>, status : UInt<32>}} - output memory : {req_cmd : {valid : UInt<1>, bits : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}, flip ready : UInt<1>}, req_data : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>}, flip resp : {valid : UInt<1>, bits : {data : UInt<32>, tag : UInt<5>}, flip ready : UInt<1>}} - inst core of Core - inst memmod of Memory - htif.host := core.host - memory := memmod.memory - core.stall := memmod.stall - memmod.icache := core.icache - memmod.dcache := core.dcache - diff --git a/test/passes/lower-to-ground/accessor.fir b/test/passes/lower-to-ground/accessor.fir index 14b55c63..29663234 100644 --- a/test/passes/lower-to-ground/accessor.fir +++ b/test/passes/lower-to-ground/accessor.fir @@ -7,19 +7,19 @@ circuit top : wire j : UInt<32> wire a : UInt<32>[4] - ; CHECK: wire a_0 : UInt<32> - ; CHECK: wire a_1 : UInt<32> - ; CHECK: wire a_2 : UInt<32> - ; CHECK: wire a_3 : UInt<32> + ; CHECK: wire a$0 : UInt<32> + ; CHECK: wire a$1 : UInt<32> + ; CHECK: wire a$2 : UInt<32> + ; CHECK: wire a$3 : UInt<32> accessor b = a[i] ; CHECK: wire b : UInt<32> - ; CHECK: b := (a_0 a_1 a_2 a_3)[i] + ; CHECK: b := (a$0 a$1 a$2 a$3)[i] j := b accessor c = a[i] ; CHECK: wire c : UInt<32> - ; CHECK: (a_0 a_1 a_2 a_3)[i] := c + ; CHECK: (a$0 a$1 a$2 a$3)[i] := c c := j mem p : UInt<32>[4] diff --git a/test/passes/lower-to-ground/bundle-vecs.fir b/test/passes/lower-to-ground/bundle-vecs.fir index 069314a3..0b9d9799 100644 --- a/test/passes/lower-to-ground/bundle-vecs.fir +++ b/test/passes/lower-to-ground/bundle-vecs.fir @@ -7,23 +7,23 @@ circuit top : wire j : { x : UInt<32>, flip y : UInt<32> } wire a : { x : UInt<32>, flip y : UInt<32> }[2] - ; CHECK: wire a_0_x : UInt<32> - ; CHECK: wire a_0_y : UInt<32> - ; CHECK: wire a_1_x : UInt<32> - ; CHECK: wire a_1_y : UInt<32> + ; CHECK: wire a$0$x : UInt<32> + ; CHECK: wire a$0$y : UInt<32> + ; CHECK: wire a$1$x : UInt<32> + ; CHECK: wire a$1$y : UInt<32> accessor b = a[i] - ; CHECK: wire b_x : UInt<32> - ; CHECK: wire b_y : UInt<32> - ; CHECK: b_x := (a_0_x a_1_x)[i] - ; CHECK: (a_0_y a_1_y)[i] := b_y + ; CHECK: wire b$x : UInt<32> + ; CHECK: wire b$y : UInt<32> + ; CHECK: b$x := (a$0$x a$1$x)[i] + ; CHECK: (a$0$y a$1$y)[i] := b$y j := b accessor c = a[i] - ; CHECK: wire c_x : UInt<32> - ; CHECK: wire c_y : UInt<32> - ; CHECK: (a_0_x a_1_x)[i] := c_x - ; CHECK: c_y := (a_0_y a_1_y)[i] + ; CHECK: wire c$x : UInt<32> + ; CHECK: wire c$y : UInt<32> + ; CHECK: (a$0$x a$1$x)[i] := c$x + ; CHECK: c$y := (a$0$y a$1$y)[i] c := j diff --git a/test/passes/lower-to-ground/bundle.fir b/test/passes/lower-to-ground/bundle.fir index e758acaf..c0acfecd 100644 --- a/test/passes/lower-to-ground/bundle.fir +++ b/test/passes/lower-to-ground/bundle.fir @@ -17,37 +17,37 @@ circuit top : ;CHECK: Lower To Ground ;CHECK: circuit top : ;CHECK: module m : -;CHECK: input a_x : UInt<5> -;CHECK: output a_y : SInt<5> -;CHECK: output b_x : UInt<5> -;CHECK: input b_y : SInt<5> +;CHECK: input a$x : UInt<5> +;CHECK: output a$y : SInt<5> +;CHECK: output b$x : UInt<5> +;CHECK: input b$y : SInt<5> ;CHECK: input reset : UInt<1> ;CHECK: module top : -;CHECK: input c_x_0 : UInt<5> -;CHECK: input c_x_1 : UInt<5> -;CHECK: input c_x_2 : UInt<5> -;CHECK: input c_x_3 : UInt<5> -;CHECK: input c_x_4 : UInt<5> -;CHECK: output c_y_x_0 : UInt<5> -;CHECK: output c_y_x_1 : UInt<5> -;CHECK: output c_y_x_2 : UInt<5> -;CHECK: input c_y_y : SInt<5> +;CHECK: input c$x$0 : UInt<5> +;CHECK: input c$x$1 : UInt<5> +;CHECK: input c$x$2 : UInt<5> +;CHECK: input c$x$3 : UInt<5> +;CHECK: input c$x$4 : UInt<5> +;CHECK: output c$y$x$0 : UInt<5> +;CHECK: output c$y$x$1 : UInt<5> +;CHECK: output c$y$x$2 : UInt<5> +;CHECK: input c$y$y : SInt<5> ;CHECK: input reset : UInt<1> -;CHECK: wire a_x : UInt<5> -;CHECK: wire a_y : SInt<5> -;CHECK: wire b_x : UInt<5> -;CHECK: wire b_y : SInt<5> -;CHECK: a_x := b_x -;CHECK: b_y := a_y +;CHECK: wire a$x : UInt<5> +;CHECK: wire a$y : SInt<5> +;CHECK: wire b$x : UInt<5> +;CHECK: wire b$y : SInt<5> +;CHECK: a$x := b$x +;CHECK: b$y := a$y ;CHECK: inst i of m ;CHECK: i.reset := reset -;CHECK: i.a_x := a_x -;CHECK: a_y := i.a_y -;CHECK: b_x := i.b_x -;CHECK: i.b_y := b_y -;CHECK: wire d_0 : UInt<5> -;CHECK: wire d_1 : UInt<5> -;CHECK: wire d_2 : UInt<5> -;CHECK: wire d_3 : UInt<5> -;CHECK: wire d_4 : UInt<5> +;CHECK: i.a$x := a$x +;CHECK: a$y := i.a$y +;CHECK: b$x := i.b$x +;CHECK: i.b$y := b$y +;CHECK: wire d$0 : UInt<5> +;CHECK: wire d$1 : UInt<5> +;CHECK: wire d$2 : UInt<5> +;CHECK: wire d$3 : UInt<5> +;CHECK: wire d$4 : UInt<5> ;CHECK: Finished Lower To Ground diff --git a/test/passes/lower-to-ground/instance.fir b/test/passes/lower-to-ground/instance.fir index 57c68398..420c3c7c 100644 --- a/test/passes/lower-to-ground/instance.fir +++ b/test/passes/lower-to-ground/instance.fir @@ -27,9 +27,9 @@ circuit top : ; CHECK: Lower To Ground -; CHECK: connect_data@<g:f> := src@<g:m>.data@<g:m> -; CHECK: src@<g:m>.ready@<g:f> := connect_ready@<g:m> -; CHECK: snk@<g:m>.data@<g:f> := connect2_data@<g:m> -; CHECK: connect2_ready@<g:f> := snk@<g:m>.ready@<g:m> +; CHECK: connect$data@<g:f> := src@<g:m>.data@<g:m> +; CHECK: src@<g:m>.ready@<g:f> := connect$ready@<g:m> +; CHECK: snk@<g:m>.data@<g:f> := connect2$data@<g:m> +; CHECK: connect2$ready@<g:f> := snk@<g:m>.ready@<g:m> ; CHECK: Finished Lower To Ground diff --git a/test/passes/lower-to-ground/nested-vec.fir b/test/passes/lower-to-ground/nested-vec.fir index 1a6ba2e8..b7915c5d 100644 --- a/test/passes/lower-to-ground/nested-vec.fir +++ b/test/passes/lower-to-ground/nested-vec.fir @@ -8,29 +8,29 @@ circuit top : wire k : { x : UInt<32>, y : UInt<32> } wire a : { x : UInt<32>, flip y : UInt<32> }[2] - ; CHECK: wire a_0_x : UInt<32> - ; CHECK: wire a_0_y : UInt<32> - ; CHECK: wire a_1_x : UInt<32> - ; CHECK: wire a_1_y : UInt<32> + ; CHECK: wire a$0$x : UInt<32> + ; CHECK: wire a$0$y : UInt<32> + ; CHECK: wire a$1$x : UInt<32> + ; CHECK: wire a$1$y : UInt<32> accessor b = a[i] - ; CHECK: wire b_x : UInt<32> - ; CHECK: wire b_y : UInt<32> - ; CHECK: b_x := (a_0_x a_1_x)[i] - ; CHECK: (a_0_y a_1_y)[i] := b_y + ; CHECK: wire b$x : UInt<32> + ; CHECK: wire b$y : UInt<32> + ; CHECK: b$x := (a$0$x a$1$x)[i] + ; CHECK: (a$0$y a$1$y)[i] := b$y j := b mem m : { x : UInt<32>, y : UInt<32> }[2] - ; CHECK: mem m_x : UInt<32>[2] - ; CHECK: mem m_y : UInt<32>[2] + ; CHECK: mem m$x : UInt<32>[2] + ; CHECK: mem m$y : UInt<32>[2] accessor c = m[i] ; MALE - ; CHECK: accessor c_x = m_x[i] - ; CHECK: accessor c_y = m_y[i] + ; CHECK: accessor c$x = m$x[i] + ; CHECK: accessor c$y = m$y[i] c := k - ; CHECK: c_x := k_x - ; CHECK: c_y := k_y + ; CHECK: c$x := k$x + ; CHECK: c$y := k$y ; CHECK: Finished Lower To Ground diff --git a/test/passes/lower-to-ground/register.fir b/test/passes/lower-to-ground/register.fir index 449204a3..a3c4f0ae 100644 --- a/test/passes/lower-to-ground/register.fir +++ b/test/passes/lower-to-ground/register.fir @@ -11,11 +11,11 @@ wire q : { x : UInt, flip y : SInt } on-reset r1 := q - ; CHECK: reg r1_x : UInt - ; CHECK: reg r1_y : SInt - ; CHECK: wire q_x : UInt - ; CHECK: wire q_y : SInt - ; CHECK: on-reset r1_x := q_x - ; CHECK: on-reset q_y := r1_y + ; CHECK: reg r1$x : UInt + ; CHECK: reg r1$y : SInt + ; CHECK: wire q$x : UInt + ; CHECK: wire q$y : SInt + ; CHECK: on-reset r1$x := q$x + ; CHECK: on-reset q$y := r1$y ; CHECK: Finished Lower To Ground |