diff options
| author | azidar | 2015-05-26 17:33:40 -0700 |
|---|---|---|
| committer | azidar | 2015-05-26 17:33:40 -0700 |
| commit | cf80ff9c83c2fedd42ec186a3e342520c89f91ab (patch) | |
| tree | ebbf3455b91e8840d49057754585d567dacea384 | |
| parent | eb125225cb96875f31a9af0db187406782b75223 (diff) | |
Added <>. Added additional checks for primops. Added new chisel3 files.
30 files changed, 4252 insertions, 1291 deletions
@@ -32,6 +32,9 @@ errors: chisel3: cd $(test_dir)/chisel3 && lit -v . --path=$(root_dir)/utils/bin/ +features: + cd $(test_dir)/features && lit -v . --path=$(root_dir)/utils/bin/ + clean: rm -f $(test_dir)/*/*/*.out rm -f $(test_dir)/*/*.out @@ -3,23 +3,18 @@ ================================================ ======== Current Tasks ======== +SeqMem +BlackBoxes +Scaling +move width inference earlier Temp elimination needs to count # uses Declared references needs to understand scope <= check in high form check -Size of vector type must be non-negative Check for recursively defined instances -<> +Names in bundles must be unique +Fix reset scope Add Unit Tests for each pass - Separate passes into discrete chunks - Push all tests entirely through Check after each pass write test that checks instance types are correctly lowered -move width inference earlier -Remove Pad -Fix all primops and width inference -Verilog -SeqMem -BlackBoxes -Scaling ======== Verilog Backend Notes ======== * 1) Emit module. No Parameters. Include clk and reset signals @@ -35,7 +30,6 @@ o 6) Emit all register updates: Notes: For now, emit mems as reg with nothing else. WritePorts? - ======== Update Core ========== Add exmodule @@ -43,24 +37,8 @@ Add vptype Add readwriteport ======== Check Passes ========== -Well-formed high firrtl - Unique names per module - No name can be a prefix of any other name. - No nested modules - Only modules in circuit (no statements or expressions) - Cannot connect directly to a mem ever - Subfields are only on bundles, before type inference - Can only connect to a Ref or Subfield or Index - UInt only has positive ints +High-Firrtl No combinational loops - cannot connect to a pad, or a register. only connct to a reference - onreset can only handle a register - all references are declared - expression in pad must be a ground type - node's value cannot be a bundle with a flip in it - mems cannot be a bundle with flips - 2nd arg in dshr/l must be UInt - pred in conditionally must be of type UInt After adding dynamic assertions, insert bounds check with accessor expansion Well-formed low firrtl All things only assigned to once @@ -71,7 +49,6 @@ Width inference Pad's width is greater than value's width pad's width is greater than value's width connect can connect from big to small?? -Check Gender ======== Other Passes ======== ; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s @@ -82,7 +59,6 @@ constant folding (partial eval) pass push pad into literal common subexpression elimination pass deadcode elimination -Verilog backend Eliminate skips ======== Consultations ======== diff --git a/spec/spec.pdf b/spec/spec.pdf Binary files differindex 504a511b..48719e1c 100644 --- a/spec/spec.pdf +++ b/spec/spec.pdf diff --git a/src/main/stanza/errors.stanza b/src/main/stanza/errors.stanza index 8c5532b0..e8b00087 100644 --- a/src/main/stanza/errors.stanza +++ b/src/main/stanza/errors.stanza @@ -19,7 +19,6 @@ defpackage firrtl/errors : ; o No names ; o No Unknowns ; o All widths are positive -; o Pad's width is greater than value's width ; o pad's width is greater than value's width ; o widths are large enough to contain value @@ -43,6 +42,9 @@ defpackage firrtl/errors : ; * No name can be a prefix of any other name. ; * all references are declared ; * UInt only has positive ints +; * Vector types has positive size +; * Width sizes are positive +; * Primops have the correct number of arguments public defstruct CheckHighForm <: Pass public defmethod pass (b:CheckHighForm) -> (Circuit -> Circuit) : check-high-form @@ -94,6 +96,22 @@ defn WrongReset (info:FileInfo, name:Symbol) : PassException $ string-join $ [info ": Module " name " has a reset that is not of type UInt<1>."] +defn IncorrectNumArgs (info:FileInfo, op:Symbol, n:Int) : + PassException $ string-join $ + [info ": Primop " op " requires " n " expression arguments."] + +defn IncorrectNumConsts (info:FileInfo, op:Symbol, n:Int) : + PassException $ string-join $ + [info ": Primop " op " requires " n " integer arguments."] + +defn NegWidth (info:FileInfo) : + PassException $ string-join $ + [info ": Width cannot be negative."] + +defn NegVecSize (info:FileInfo) : + PassException $ string-join $ + [info ": Vector type size cannot be negative."] + ;---------------- Helper Functions -------------- defn has-flip? (t:Type) -> True|False : var has? = false @@ -134,6 +152,49 @@ defn is-prefix? (s1:Symbol,s2:Symbol) -> True|False : is? = false is? +defn check-high-form-primop (e:DoPrim, errors:Vector<PassException>,info:FileInfo) -> False : + defn correct-num (ne:Int|False,nc:Int) -> False : + if not (ne typeof False) : + if length(args(e)) != ne as Int : add(errors,IncorrectNumArgs(info,to-symbol(op(e)),ne as Int)) + if length(consts(e)) != nc : add(errors,IncorrectNumConsts(info,to-symbol $ op(e),nc)) + + switch {op(e) == _} : + ADD-OP : correct-num(2,0) + SUB-OP : correct-num(2,0) + MUL-OP : correct-num(2,0) + DIV-OP : correct-num(2,0) + MOD-OP : correct-num(2,0) + QUO-OP : correct-num(2,0) + REM-OP : correct-num(2,0) + ADD-WRAP-OP : correct-num(2,0) + SUB-WRAP-OP : correct-num(2,0) + LESS-OP : correct-num(2,0) + LESS-EQ-OP : correct-num(2,0) + GREATER-OP : correct-num(2,0) + GREATER-EQ-OP : correct-num(2,0) + EQUAL-OP : correct-num(2,0) + NEQUAL-OP : correct-num(2,0) + MUX-OP : correct-num(3,0) + PAD-OP : correct-num(1,1) + AS-UINT-OP : correct-num(1,0) + AS-SINT-OP : correct-num(1,0) + DYN-SHIFT-LEFT-OP : correct-num(2,0) + DYN-SHIFT-RIGHT-OP : correct-num(2,0) + SHIFT-LEFT-OP : correct-num(1,1) + SHIFT-RIGHT-OP : correct-num(1,1) + CONVERT-OP : correct-num(1,0) + NEG-OP : correct-num(1,0) + BIT-NOT-OP : correct-num(1,0) + BIT-AND-OP : correct-num(2,0) + BIT-OR-OP : correct-num(2,0) + BIT-XOR-OP : correct-num(2,0) + BIT-AND-REDUCE-OP : correct-num(false,0) + BIT-OR-REDUCE-OP : correct-num(false,0) + BIT-XOR-REDUCE-OP : correct-num(false,0) + CONCAT-OP : correct-num(2,0) + BIT-SELECT-OP : correct-num(1,1) + BITS-SELECT-OP : correct-num(1,2) + ;--------------- Check High Form Pass ------------------- public defn check-high-form (c:Circuit) -> Circuit : val errors = Vector<PassException>() @@ -144,6 +205,20 @@ public defn check-high-form (c:Circuit) -> Circuit : add(errors,InvalidLOC(info)) (e) : false + defn check-high-form-w (info:FileInfo,w:Width) -> Width : + match(w) : + (w:IntWidth) : + if width(w) < 0 : add(errors,NegWidth(info)) + w + (w) : w + + defn check-high-form-t (info:FileInfo,t:Type) -> Type : + match(map(check-high-form-t{info,_},t)) : + (t:VectorType) : + if size(t) < 0 : add(errors,NegVecSize(info)) + (t) : false + map(check-high-form-w{info,_:Width},t) + defn check-high-form-e (info:FileInfo,e:Expression,names:Vector<Symbol>) -> Expression : match(map(check-high-form-e{info,_,names},e)) : (e:Ref) : @@ -157,10 +232,13 @@ public defn check-high-form (c:Circuit) -> Circuit : match(exp(e)) : (e:Ref|Subfield|Index) : false (e) : add(errors,InvalidIndex(info)) + (e:DoPrim) : check-high-form-primop(e,errors,info) ;; (e:UIntValue) : ;; if value(e) < 0 : ;; add(errors,NegUInt(info)) (e) : false + map(check-high-form-w{info,_:Width},e) + map(check-high-form-t{info,_:Type},e) e defn check-high-form-s (s:Stmt,names:Vector<Symbol>) -> Stmt : @@ -169,6 +247,8 @@ public defn check-high-form (c:Circuit) -> Circuit : val prefix = is-prefix?(name,names) if prefix typeof Symbol : add(errors,IsPrefix(info,name,prefix as Symbol)) + map(check-high-form-t{info(s),_:Type},s) + map{check-high-form-s{_,names},_} $ { match(map(check-high-form-e{info(s),_,names},s)) : (s:DefWire|DefRegister) : @@ -191,6 +271,8 @@ public defn check-high-form (c:Circuit) -> Circuit : add(names,name(s)) (s:Connect) : check-valid-loc(info(s),loc(s)) + (s:BulkConnect) : + check-valid-loc(info(s),loc(s)) (s) : false s }() @@ -209,6 +291,9 @@ public defn check-high-form (c:Circuit) -> Circuit : add(errors,WrongReset(info!(m),name(m))) else : add(errors,WrongReset(info!(m),name(m))) + map(check-high-form-t{info(p),_},type(p)) + map(check-high-form-w{info(p),_},type(p)) + add(names,`reset) @@ -284,8 +369,6 @@ public defn check-kinds (c:Circuit) -> Circuit : check-is-mem(info,mem(e)) check-not-mem(info,index(e)) check-not-mem(info,enable(e)) - ;(e:Pad) : - ;check-not-mem(info,value(e)) (e) : do(check-not-mem{info,_},e) defn check-kinds-s (s:Stmt) -> False : do(check-kinds-e{info(s),_:Expression},s) @@ -296,6 +379,9 @@ public defn check-kinds (c:Circuit) -> Circuit : (s:Connect) : check-not-mem(info(s),loc(s)) check-not-mem(info(s),exp(s)) + (s:BulkConnect) : + check-not-mem(info(s),loc(s)) + check-not-mem(info(s),exp(s)) (s:OnReset) : check-is-reg(info(s),loc(s)) check-not-mem(info(s),exp(s)) @@ -309,7 +395,6 @@ public defn check-kinds (c:Circuit) -> Circuit : ;==================== CHECK TYPES ===================== -; o expression in pad must be a ground type ; o Subfields are only on bundles, before type inference <- need to not error, just do unknown-type ; o Indexes are only on vectors ; o pred in conditionally must be of type UInt @@ -348,10 +433,6 @@ defn EnableNotUInt (info:FileInfo) : PassException $ string-join $ [info ": Enable is not of UIntType."] -;defn PadNotGround (info:FileInfo) : - ;PassException $ string-join $ - ;[info ": Illegal Pad on non-ground type."] - defn InvalidConnect (info:FileInfo) : PassException $ string-join $ [info ": Type mismatch."] @@ -360,6 +441,27 @@ defn PredNotUInt (info:FileInfo) : PassException $ string-join $ [info ": Predicate not a UIntType."] +defn OpNotGround (info:FileInfo, op:Symbol) : + PassException $ string-join $ + [info ": Primop " op " cannot operate on non-ground types."] + +defn OpNotUInt (info:FileInfo, op:Symbol,e:Symbol) : + PassException $ string-join $ + [info ": Primop " op " requires argument " e " to be a UInt type."] + +defn OpNotAllUInt (info:FileInfo, op:Symbol) : + PassException $ string-join $ + [info ": Primop " op " requires all arguments to be UInt type."] + +defn OpNotAllSameType (info:FileInfo, op:Symbol) : + PassException $ string-join $ + [info ": Primop " op " requires all operands to have the same type."] + +defn NodeWithFlips (info:FileInfo) : + PassException $ string-join $ + [info ": Node cannot be a bundle type with flips."] + + ;---------------- Helper Functions -------------- defmethod equal? (t1:Type,t2:Type) -> True|False : match(t1,t2) : @@ -380,6 +482,64 @@ defmethod equal? (t1:Type,t2:Type) -> True|False : defn u () -> UIntType : UIntType(UnknownWidth()) defn s () -> SIntType : SIntType(UnknownWidth()) +defn check-types-primop (e:DoPrim, errors:Vector<PassException>,info:FileInfo) -> False : + defn all-same-type (ls:List<Expression>) -> False : + for x in ls do : + if type(head(ls)) != type(x) : + add(errors,OpNotAllSameType(info,to-symbol $ op(e))) + defn all-ground (ls:List<Expression>) -> False : + for x in ls do : + if not (type(x) typeof UIntType or type(x) typeof SIntType) : + add(errors,OpNotGround(info,to-symbol $ op(e))) + defn all-uint (ls:List<Expression>) -> False : + for x in ls do : + if not (type(x) typeof UIntType) : + add(errors,OpNotAllUInt(info,to-symbol $ op(e))) + defn is-uint (x:Expression) -> False : + if not (type(x) typeof UIntType) : + add(errors,OpNotUInt(info,to-symbol $ op(e),to-symbol(x))) + + all-ground(args(e)) + + switch {op(e) == _} : + ADD-OP : false + SUB-OP : false + MUL-OP : false + DIV-OP : false + MOD-OP : false + QUO-OP : false + REM-OP : false + ADD-WRAP-OP : false + SUB-WRAP-OP : false + LESS-OP : false + LESS-EQ-OP : false + GREATER-OP : false + GREATER-EQ-OP : false + EQUAL-OP : all-same-type(args(e)) + NEQUAL-OP : all-same-type(args(e)) + MUX-OP : + all-same-type(tail(args(e))) + is-uint(head(args(e))) + PAD-OP : false + AS-UINT-OP : false + AS-SINT-OP : false + DYN-SHIFT-LEFT-OP : is-uint(args(e)[1]) + DYN-SHIFT-RIGHT-OP : is-uint(args(e)[1]) + SHIFT-LEFT-OP : false + SHIFT-RIGHT-OP : false + CONVERT-OP : false + NEG-OP : false + BIT-NOT-OP : all-uint(args(e)) + BIT-AND-OP : all-uint(args(e)) + BIT-OR-OP : all-uint(args(e)) + BIT-XOR-OP : all-uint(args(e)) + BIT-AND-REDUCE-OP : all-uint(args(e)) + BIT-OR-REDUCE-OP : all-uint(args(e)) + BIT-XOR-REDUCE-OP : all-uint(args(e)) + CONCAT-OP : all-uint(args(e)) + BIT-SELECT-OP : all-uint(args(e)) + BITS-SELECT-OP : all-uint(args(e)) + ;----------------- Check Types Pass --------------------- public defn check-types (c:Circuit) -> Circuit : val errors = Vector<PassException>() @@ -397,30 +557,27 @@ public defn check-types (c:Circuit) -> Circuit : (t:VectorType) : if value(e) >= size(t) : add(errors,IndexTooLarge(info,value(e))) (t) : add(errors,IndexOnNonVector(info)) - (e:DoPrim) : false ;check-types-primop(e) + (e:DoPrim) : check-types-primop(e,errors,info) (e:ReadPort|WritePort) : if type(index(e)) != u() : add(errors,IndexNotUInt(info)) if type(enable(e)) != u() : add(errors,EnableNotUInt(info)) (e:Register) : if type(enable(e)) != u() : add(errors,EnableNotUInt(info)) - ;(e:Pad) : - ;val t = type(value(e)) - ;if not (t == u() or t == s()) : add(errors,PadNotGround(info)) (e:UIntValue|SIntValue) : false e defn check-types-s (s:Stmt) -> Stmt : - map{check-types-s,_} $ - match(map(check-types-e{info(s),_},s)) : - (s:Connect) : - if type(loc(s)) != type(exp(s)) : add(errors,InvalidConnect(info(s))) - s - (s:OnReset) : - if type(loc(s)) != type(exp(s)) : add(errors,InvalidConnect(info(s))) - s - (s:Conditionally) : - if type(pred(s)) != u() : add(errors,PredNotUInt(info(s))) - s - (s) : s + map{check-types-s,_} $ { + match(map(check-types-e{info(s),_},s)) : + (s:Connect) : + if type(loc(s)) != type(exp(s)) : add(errors,InvalidConnect(info(s))) + (s:OnReset) : + if type(loc(s)) != type(exp(s)) : add(errors,InvalidConnect(info(s))) + (s:Conditionally) : + if type(pred(s)) != u() : add(errors,PredNotUInt(info(s))) + (s:DefNode) : + if has-flip?(type(value(s))) : add(errors,NodeWithFlips(info(s))) + (s) : false + s }() for m in modules(c) do : check-types-s(body(m)) @@ -469,7 +626,6 @@ public defn check-genders (c:Circuit) -> Circuit : val f = {_ as Field} $ for f in fields(type(exp(e)) as BundleType) find : name(f) == name(e) get-gender(exp(e),genders) * flip(f) (e:WIndex) : get-gender(exp(e),genders) - ;(e:Pad) : MALE (e:DoPrim) : MALE (e:UIntValue) : MALE (e:SIntValue) : MALE @@ -483,7 +639,6 @@ public defn check-genders (c:Circuit) -> Circuit : (e:WRef) : false (e:WSubfield) : false (e:WIndex) : false - ;(e:Pad) : check-gender(info,genders,value(e),MALE) (e:DoPrim) : for e in args(e) do : check-gender(info,genders,e,MALE) @@ -511,6 +666,9 @@ public defn check-genders (c:Circuit) -> Circuit : (s:Connect) : check-gender(info(s),genders,loc(s),FEMALE) check-gender(info(s),genders,exp(s),MALE) + (s:BulkConnect) : + check-gender(info(s),genders,loc(s),FEMALE) + check-gender(info(s),genders,exp(s),MALE) (s:OnReset) : check-gender(info(s),genders,loc(s),FEMALE) check-gender(info(s),genders,exp(s),MALE) diff --git a/src/main/stanza/firrtl-ir.stanza b/src/main/stanza/firrtl-ir.stanza index 39538498..e13e7655 100644 --- a/src/main/stanza/firrtl-ir.stanza +++ b/src/main/stanza/firrtl-ir.stanza @@ -134,6 +134,10 @@ public defstruct OnReset <: Stmt : ;LOW info: FileInfo with: (as-method => true) loc: Expression exp: Expression +public defstruct BulkConnect <: Stmt : ;LOW + info: FileInfo with: (as-method => true) + loc: Expression + exp: Expression public defstruct Connect <: Stmt : ;LOW info: FileInfo with: (as-method => true) loc: Expression diff --git a/src/main/stanza/ir-parser.stanza b/src/main/stanza/ir-parser.stanza index 0833543f..2f7b3771 100644 --- a/src/main/stanza/ir-parser.stanza +++ b/src/main/stanza/ir-parser.stanza @@ -194,6 +194,7 @@ defsyntax firrtl : stmt = (?s:#stmt/when) : s stmt = (?x:#exp := ?y:#exp!) : Connect(first-info(form),x, y) + stmt = (?x:#exp <> ?y:#exp!) : BulkConnect(first-info(form),x, y) stmt = (on-reset ?x:#exp := ?y:#exp!) : OnReset(first-info(form),x, y) stmt = ((?s:#stmt ?ss:#stmt ... ?rest ...)) : diff --git a/src/main/stanza/ir-utils.stanza b/src/main/stanza/ir-utils.stanza index d2afca05..28cdd136 100644 --- a/src/main/stanza/ir-utils.stanza +++ b/src/main/stanza/ir-utils.stanza @@ -147,6 +147,8 @@ defmethod print (o:OutputStream, c:Stmt) : do(print{o,_}, join(body(c), "\n")) (c:Connect) : print-all(o, [loc(c) " := " exp(c)]) + (c:BulkConnect) : + print-all(o, [loc(c) " <> " exp(c)]) (c:OnReset) : print-all(o, ["on-reset " loc(c) " := " exp(c)]) (c:EmptyStmt) : @@ -231,6 +233,7 @@ defmethod map (f: Expression -> Expression, c:Stmt) -> Stmt : (c:DefInstance) : DefInstance(info(c),name(c), f(module(c))) (c:Conditionally) : Conditionally(info(c),f(pred(c)), conseq(c), alt(c)) (c:Connect) : Connect(info(c),f(loc(c)), f(exp(c))) + (c:BulkConnect) : BulkConnect(info(c),f(loc(c)), f(exp(c))) (c:OnReset) : OnReset(info(c),f(loc(c)),f(exp(c))) (c) : c diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza index b6926a7b..96225064 100644 --- a/src/main/stanza/passes.stanza +++ b/src/main/stanza/passes.stanza @@ -85,6 +85,11 @@ defstruct ConnectFromIndexed <: Stmt : ;================ WORKING IR UTILS ========================= +;defmethod equal? (f1:Flip, f2:Flip) -> True|False : +; switch fn ([x,y]) : f1 == x and f2 == y : +; [DEFAULT,DEFAULT] : true +; [REVERSE,REVERSE] : true +; else : false defn plus (g1:Gender,g2:Gender) -> Gender : switch fn ([x,y]) : g1 == x and g2 == y : @@ -504,7 +509,7 @@ defn infer-types (s:Stmt, l:List<KeyValue<Symbol,Type>>) -> [Stmt List<KeyValue< val [s*,l*] = infer-types(conseq(s),l) val [s**,l**] = infer-types(alt(s),l) [Conditionally(info(s),pred(s),s*,s**),l] - (s:Connect|OnReset|EmptyStmt) : [s,l] + (s:Connect|BulkConnect|OnReset|EmptyStmt) : [s,l] defn infer-types (m:Module, l:List<KeyValue<Symbol,Type>>) -> Module : val ptypes = @@ -607,6 +612,8 @@ defn resolve-genders (c:Circuit) : WDefAccessor(info(s),name(s),source*,index*,gender*) (s:Connect) : Connect(info(s),resolve-expr(loc(s),FEMALE),resolve-expr(exp(s),MALE)) + (s:BulkConnect) : + BulkConnect(info(s),resolve-expr(loc(s),FEMALE),resolve-expr(exp(s),MALE)) (s:OnReset) : OnReset(info(s),resolve-expr(loc(s),FEMALE),resolve-expr(exp(s),MALE)) (s:Conditionally) : @@ -742,7 +749,6 @@ defn index-of-elem (t:BundleType, s:Symbol) -> Int : else : sum = sum + num-elems(type(f)) error("Shouldn't be here") - defn generate-entry (n:Symbol,t:Type) -> List<NTF> : defn uniquify (n*:Symbol) -> Symbol : symbol-join([n "_" n*]) match(t) : @@ -863,6 +869,28 @@ defn lower (body:Stmt) -> Stmt : [MALE,FEMALE] : if s typeof Connect : Connect(info(s),r*,l*) else : OnReset(info(s),r*,l*) + (s:BulkConnect) : + val ls-fake = generate-entry(`null,type(loc(s))) + val rs-fake = generate-entry(`null,type(exp(s))) + val ls = expand-expr(loc(s)) + val rs = expand-expr(exp(s)) + val ls* = Vector<EF>() + val rs* = Vector<EF>() + for (l-fake in ls-fake,l in ls) do : + for (r-fake in rs-fake, r in rs) do : + if name(l-fake) == name(r-fake) and flip(l-fake) == flip(r-fake) and type(l-fake) == type(r-fake) : + add(ls*,l) + add(rs*,r) + Begin $ for (l in to-list(ls*), r in to-list(rs*)) map : + val lgender = FEMALE * flip(l) + val rgender = MALE * flip(r) + val l* = set-gender(exp(l),lgender,flip(l)) + val r* = set-gender(exp(r),rgender,flip(r)) + println-all-debug(["Left: " l " with Gender: " lgender]) + println-all-debug(["Right: " r " with Gender: " rgender]) + switch fn ([x,y]) : lgender == x and rgender == y : + [FEMALE,MALE] : Connect(info(s),l*,r*) + [MALE,FEMALE] : Connect(info(s),r*,l*) (s:ConnectFromIndexed) : Begin(ls) where : val ctable = HashTable<Symbol,Vector<EF>>(symbol-hash) for e in exps(s) do : diff --git a/src/main/stanza/primop.stanza b/src/main/stanza/primop.stanza index 023723b8..7abfa94e 100644 --- a/src/main/stanza/primop.stanza +++ b/src/main/stanza/primop.stanza @@ -5,6 +5,7 @@ defpackage firrtl/primops : import firrtl/ir-utils import firrtl/passes + public defn lower-and-type-primop (e:DoPrim) -> DoPrim : defn u () : UIntType(UnknownWidth()) defn s () : SIntType(UnknownWidth()) diff --git a/test/chisel3/ALUTop.fir b/test/chisel3/ALUTop.fir new file mode 100644 index 00000000..b9386349 --- /dev/null +++ b/test/chisel3/ALUTop.fir @@ -0,0 +1,118 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit ALUTop : + module ALU : + input B : UInt<32> + output out : UInt<32> + output sum : UInt<32> + input A : UInt<32> + input alu_op : UInt<4> + + node shamt = bits(B, 4, 0) + node T_157 = add-wrap(A, B) + node T_158 = sub-wrap(A, B) + node T_159 = convert(A) + node T_160 = dshr(T_159, shamt) + node T_161 = as-UInt(T_160) + node T_162 = dshr(A, shamt) + node T_163 = dshl(A, shamt) + node T_164 = bits(T_163, 31, 0) + node T_165 = convert(A) + node T_166 = convert(B) + node T_167 = lt(T_165, T_166) + node T_168 = as-UInt(T_167) + node T_169 = lt(A, B) + node T_170 = as-UInt(T_169) + node T_171 = bit-and(A, B) + node T_172 = bit-or(A, B) + node T_173 = bit-xor(A, B) + node T_174 = eq(UInt<4>(10), alu_op) + node T_175 = mux(T_174, A, B) + node T_176 = eq(UInt<4>(4), alu_op) + node T_177 = mux(T_176, T_173, T_175) + node T_178 = eq(UInt<4>(3), alu_op) + node T_179 = mux(T_178, T_172, T_177) + node T_180 = eq(UInt<4>(2), alu_op) + node T_181 = mux(T_180, T_171, T_179) + node T_182 = eq(UInt<4>(7), alu_op) + node T_183 = mux(T_182, T_170, T_181) + node T_184 = eq(UInt<4>(5), alu_op) + node T_185 = mux(T_184, T_168, T_183) + node T_186 = eq(UInt<4>(6), alu_op) + node T_187 = mux(T_186, T_164, T_185) + node T_188 = eq(UInt<4>(8), alu_op) + node T_189 = mux(T_188, T_162, T_187) + node T_190 = eq(UInt<4>(9), alu_op) + node T_191 = mux(T_190, T_161, T_189) + node T_192 = eq(UInt<4>(1), alu_op) + node T_193 = mux(T_192, T_158, T_191) + node T_194 = eq(UInt<4>(0), alu_op) + node oot = mux(T_194, T_157, T_193) + node T_195 = bits(oot, 31, 0) + out := T_195 + node T_196 = bit(alu_op, 0) + node T_197 = sub-wrap(UInt<1>(0), B) + node T_198 = mux(T_196, T_197, B) + node T_199 = add-wrap(A, T_198) + sum := T_199 + module ALUdec : + input opcode : UInt<7> + input funct : UInt<3> + input add_rshift_type : UInt<1> + output alu_op : UInt<4> + + node T_200 = mux(add_rshift_type, UInt<4>(1), UInt<4>(0)) + node T_201 = mux(add_rshift_type, UInt<4>(9), UInt<4>(8)) + node T_202 = eq(UInt<3>(5), funct) + node T_203 = mux(T_202, T_201, UInt<4>(15)) + node T_204 = eq(UInt<3>(7), funct) + node T_205 = mux(T_204, UInt<4>(2), T_203) + node T_206 = eq(UInt<3>(6), funct) + node T_207 = mux(T_206, UInt<4>(3), T_205) + node T_208 = eq(UInt<3>(4), funct) + node T_209 = mux(T_208, UInt<4>(4), T_207) + node T_210 = eq(UInt<3>(3), funct) + node T_211 = mux(T_210, UInt<4>(7), T_209) + node T_212 = eq(UInt<3>(2), funct) + node T_213 = mux(T_212, UInt<4>(5), T_211) + node T_214 = eq(UInt<3>(1), funct) + node T_215 = mux(T_214, UInt<4>(6), T_213) + node T_216 = eq(UInt<3>(0), funct) + node alu_op1 = mux(T_216, T_200, T_215) + node T_217 = eq(UInt<7>(19), opcode) + node T_218 = mux(T_217, alu_op1, UInt<4>(15)) + node T_219 = eq(UInt<7>(51), opcode) + node T_220 = mux(T_219, alu_op1, T_218) + node T_221 = eq(UInt<7>(3), opcode) + node T_222 = mux(T_221, UInt<4>(0), T_220) + node T_223 = eq(UInt<7>(35), opcode) + node T_224 = mux(T_223, UInt<4>(0), T_222) + node T_225 = eq(UInt<7>(99), opcode) + node T_226 = mux(T_225, UInt<4>(0), T_224) + node T_227 = eq(UInt<7>(103), opcode) + node T_228 = mux(T_227, UInt<4>(0), T_226) + node T_229 = eq(UInt<7>(111), opcode) + node T_230 = mux(T_229, UInt<4>(0), T_228) + node T_231 = eq(UInt<7>(23), opcode) + node T_232 = mux(T_231, UInt<4>(0), T_230) + node T_233 = eq(UInt<7>(55), opcode) + node alu_op2 = mux(T_233, UInt<4>(11), T_232) + alu_op := alu_op2 + module ALUTop : + input B : UInt<32> + output out : UInt<32> + input A : UInt<32> + input opcode : UInt<7> + input funct : UInt<3> + input add_rshift_type : UInt<1> + + inst alu of ALU + inst alu_dec of ALUdec + alu_dec.opcode := opcode + alu_dec.funct := funct + alu_dec.add_rshift_type := add_rshift_type + alu.A := A + alu.B := B + out := alu.out + alu.alu_op := alu_dec.alu_op diff --git a/test/chisel3/BundleWire.fir b/test/chisel3/BundleWire.fir new file mode 100644 index 00000000..2c2ad772 --- /dev/null +++ b/test/chisel3/BundleWire.fir @@ -0,0 +1,17 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit BundleWire : + module BundleWire : + input in : {x : UInt<32>, y : UInt<32>} + output outs : {x : UInt<32>, y : UInt<32>}[4] + + wire coords : {x : UInt<32>, y : UInt<32>}[4] + coords[0] := in + outs[0] := coords[0] + coords[1] := in + outs[1] := coords[1] + coords[2] := in + outs[2] := coords[2] + coords[3] := in + outs[3] := coords[3] diff --git a/test/chisel3/ComplexAssign.fir b/test/chisel3/ComplexAssign.fir new file mode 100644 index 00000000..c1dc41cd --- /dev/null +++ b/test/chisel3/ComplexAssign.fir @@ -0,0 +1,16 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit ComplexAssign : + module ComplexAssign : + input in : {re : UInt<10>, im : UInt<10>} + output out : {re : UInt<10>, im : UInt<10>} + input e : UInt<1> + when e : + wire T_18 : {re : UInt<10>, im : UInt<10>} + T_18 := in + out.re := T_18.re + out.im := T_18.im + else : + out.re := UInt<1>(0) + out.im := UInt<1>(0) diff --git a/test/chisel3/Core.fir b/test/chisel3/Core.fir new file mode 100644 index 00000000..b81eb7e9 --- /dev/null +++ b/test/chisel3/Core.fir @@ -0,0 +1,1023 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit Core : + module ALU : + input B : UInt<32> + output out : UInt<32> + output sum : UInt<32> + input A : UInt<32> + input alu_op : UInt<4> + + node shamt = bits(B, 4, 0) + node T_1224 = add-wrap(A, B) + node T_1225 = sub-wrap(A, B) + node T_1226 = convert(A) + node T_1227 = dshr(T_1226, shamt) + node T_1228 = as-UInt(T_1227) + node T_1229 = dshr(A, shamt) + node T_1230 = dshl(A, shamt) + node T_1231 = bits(T_1230, 31, 0) + node T_1232 = convert(A) + node T_1233 = convert(B) + node T_1234 = lt(T_1232, T_1233) + node T_1235 = as-UInt(T_1234) + node T_1236 = lt(A, B) + node T_1237 = as-UInt(T_1236) + node T_1238 = bit-and(A, B) + node T_1239 = bit-or(A, B) + node T_1240 = bit-xor(A, B) + node T_1241 = eq(UInt<4>(10), alu_op) + node T_1242 = mux(T_1241, A, B) + node T_1243 = eq(UInt<4>(4), alu_op) + node T_1244 = mux(T_1243, T_1240, T_1242) + node T_1245 = eq(UInt<4>(3), alu_op) + node T_1246 = mux(T_1245, T_1239, T_1244) + node T_1247 = eq(UInt<4>(2), alu_op) + node T_1248 = mux(T_1247, T_1238, T_1246) + node T_1249 = eq(UInt<4>(7), alu_op) + node T_1250 = mux(T_1249, T_1237, T_1248) + node T_1251 = eq(UInt<4>(5), alu_op) + node T_1252 = mux(T_1251, T_1235, T_1250) + node T_1253 = eq(UInt<4>(6), alu_op) + node T_1254 = mux(T_1253, T_1231, T_1252) + node T_1255 = eq(UInt<4>(8), alu_op) + node T_1256 = mux(T_1255, T_1229, T_1254) + node T_1257 = eq(UInt<4>(9), alu_op) + node T_1258 = mux(T_1257, T_1228, T_1256) + node T_1259 = eq(UInt<4>(1), alu_op) + node T_1260 = mux(T_1259, T_1225, T_1258) + node T_1261 = eq(UInt<4>(0), alu_op) + node oot = mux(T_1261, T_1224, T_1260) + node T_1262 = bits(oot, 31, 0) + out := T_1262 + node T_1263 = bit(alu_op, 0) + node T_1264 = sub-wrap(UInt<1>(0), B) + node T_1265 = mux(T_1263, T_1264, B) + node T_1266 = add-wrap(A, T_1265) + sum := T_1266 + module BrCond : + input br_type : UInt<3> + input rs1 : UInt<32> + input rs2 : UInt<32> + output taken : UInt<1> + + node eq = eq(rs1, rs2) + node neq = bit-not(eq) + node T_1267 = convert(rs1) + node T_1268 = convert(rs2) + node lt = lt(T_1267, T_1268) + node ge = bit-not(lt) + node ltu = lt(rs1, rs2) + node geu = bit-not(ltu) + node T_1269 = eq(br_type, UInt<3>(2)) + node T_1270 = bit-and(T_1269, eq) + node T_1271 = eq(br_type, UInt<3>(6)) + node T_1272 = bit-and(T_1271, neq) + node T_1273 = bit-or(T_1270, T_1272) + node T_1274 = eq(br_type, UInt<3>(1)) + node T_1275 = bit-and(T_1274, lt) + node T_1276 = bit-or(T_1273, T_1275) + node T_1277 = eq(br_type, UInt<3>(5)) + node T_1278 = bit-and(T_1277, ge) + node T_1279 = bit-or(T_1276, T_1278) + node T_1280 = eq(br_type, UInt<3>(0)) + node T_1281 = bit-and(T_1280, ltu) + node T_1282 = bit-or(T_1279, T_1281) + node T_1283 = eq(br_type, UInt<3>(4)) + node T_1284 = bit-and(T_1283, geu) + node T_1285 = bit-or(T_1282, T_1284) + taken := T_1285 + module RegFile : + input raddr1 : UInt<5> + input raddr2 : UInt<5> + output rdata1 : UInt<32> + output rdata2 : UInt<32> + input wen : UInt<1> + input waddr : UInt<5> + input wdata : UInt<32> + + mem regs : UInt<32>[32] + node T_1286 = eq(raddr1, UInt<1>(0)) + node T_1287 = bit-not(T_1286) + accessor T_1288 = regs[raddr1] + node T_1289 = mux(T_1287, T_1288, UInt<1>(0)) + rdata1 := T_1289 + node T_1290 = eq(raddr2, UInt<1>(0)) + node T_1291 = bit-not(T_1290) + accessor T_1292 = regs[raddr2] + node T_1293 = mux(T_1291, T_1292, UInt<1>(0)) + rdata2 := T_1293 + node T_1294 = eq(waddr, UInt<1>(0)) + node T_1295 = bit-not(T_1294) + node T_1296 = bit-and(wen, T_1295) + when T_1296 : + accessor T_1297 = regs[waddr] + T_1297 := wdata + module ImmGenWire : + output out : UInt<32> + input sel : UInt<3> + input inst : UInt<32> + + node T_1298 = bits(inst, 31, 20) + node Iimm = convert(T_1298) + node T_1299 = bits(inst, 31, 25) + node T_1300 = bits(inst, 11, 7) + node T_1301 = cat(T_1299, T_1300) + node Simm = convert(T_1301) + node T_1302 = bit(inst, 31) + node T_1303 = bit(inst, 7) + node T_1304 = bits(inst, 30, 25) + node T_1305 = bits(inst, 11, 8) + node T_1306 = cat(T_1302, T_1303) + node T_1307 = cat(T_1305, UInt<1>(0)) + node T_1308 = cat(T_1304, T_1307) + node T_1309 = cat(T_1306, T_1308) + node Bimm = convert(T_1309) + node T_1310 = bits(inst, 31, 12) + node T_1311 = cat(T_1310, UInt<12>(0)) + node Uimm = convert(T_1311) + node T_1312 = bit(inst, 31) + node T_1313 = bits(inst, 19, 12) + node T_1314 = bit(inst, 20) + node T_1315 = bits(inst, 30, 25) + node T_1316 = bits(inst, 24, 21) + node T_1317 = cat(T_1313, T_1314) + node T_1318 = cat(T_1312, T_1317) + node T_1319 = cat(T_1316, UInt<1>(0)) + node T_1320 = cat(T_1315, T_1319) + node T_1321 = cat(T_1318, T_1320) + node Jimm = convert(T_1321) + node T_1322 = bits(inst, 19, 15) + node T_1323 = pad(T_1322, 32) + node Zimm = convert(T_1323) + node T_1324 = eq(UInt<3>(3), sel) + node T_1325 = mux(T_1324, Jimm, Zimm) + node T_1326 = eq(UInt<3>(2), sel) + node T_1327 = mux(T_1326, Uimm, T_1325) + node T_1328 = eq(UInt<3>(4), sel) + node T_1329 = mux(T_1328, Bimm, T_1327) + node T_1330 = eq(UInt<3>(1), sel) + node T_1331 = mux(T_1330, Simm, T_1329) + node T_1332 = eq(UInt<3>(0), sel) + node T_1333 = mux(T_1332, Iimm, T_1331) + node T_1334 = as-UInt(T_1333) + out := T_1334 + module CSR : + output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} + input src : UInt<32> + input cmd : UInt<2> + output data : UInt<32> + input addr : UInt<12> + + reg reg_tohost : UInt<32> + on-reset reg_tohost := UInt<32>(0) + reg reg_status : UInt<32> + on-reset reg_status := UInt<32>(0) + host.tohost := reg_tohost + host.status := reg_status + node T_1335 = eq(UInt<12>(1291), addr) + node T_1336 = mux(T_1335, host.hid, UInt<1>(0)) + node T_1337 = eq(UInt<12>(1290), addr) + node T_1338 = mux(T_1337, reg_status, T_1336) + node T_1339 = eq(UInt<12>(1310), addr) + node T_1340 = mux(T_1339, reg_tohost, T_1338) + data := T_1340 + node T_1341 = eq(cmd, UInt<2>(1)) + when T_1341 : + node T_1342 = eq(addr, UInt<12>(1310)) + when T_1342 : reg_tohost := src + node T_1343 = eq(addr, UInt<12>(1290)) + when T_1343 : reg_status := src + node T_1344 = eq(cmd, UInt<2>(2)) + node T_1345 = neq(src, UInt<1>(0)) + node T_1346 = bit-and(T_1344, T_1345) + when T_1346 : + node T_1347 = eq(addr, UInt<12>(1310)) + when T_1347 : + node T_1348 = dshl(UInt<1>(1), src) + node T_1349 = bit-or(data, T_1348) + reg_tohost := T_1349 + node T_1350 = eq(addr, UInt<12>(1290)) + when T_1350 : + node T_1351 = dshl(UInt<1>(1), src) + node T_1352 = bit-or(data, T_1351) + reg_status := T_1352 + node T_1353 = eq(cmd, UInt<2>(3)) + node T_1354 = neq(src, UInt<1>(0)) + node T_1355 = bit-and(T_1353, T_1354) + when T_1355 : + node T_1356 = eq(addr, UInt<12>(1310)) + when T_1356 : + node T_1357 = dshl(UInt<1>(0), src) + node T_1358 = bit-and(data, T_1357) + reg_tohost := T_1358 + node T_1359 = eq(addr, UInt<12>(1290)) + when T_1359 : + node T_1360 = dshl(UInt<1>(0), src) + node T_1361 = bit-and(data, T_1360) + reg_status := T_1361 + module Datapath : + output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} + input ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, pc_sel : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} + output icache : {re : UInt<1>, addr : UInt<32>, flip dout : UInt<32>, we : UInt<4>, din : UInt<32>} + output dcache : {re : UInt<1>, addr : UInt<32>, flip dout : UInt<32>, we : UInt<4>, din : UInt<32>} + input stall : UInt<1> + + inst alu of ALU + inst brCond of BrCond + inst regFile of RegFile + inst immGen of ImmGenWire + reg fe_inst : UInt<32> + on-reset fe_inst := UInt<32>(0) + reg fe_pc : UInt + reg ew_inst : UInt<32> + on-reset ew_inst := UInt<32>(0) + reg ew_pc : UInt + reg ew_alu : UInt + node T_1362 = sub-wrap(UInt<14>(8192), UInt<32>(4)) + reg pc : UInt<32> + on-reset pc := T_1362 + node T_1363 = eq(ctrl.pc_sel, UInt<1>(1)) + node T_1364 = bit-or(T_1363, brCond.taken) + node T_1365 = add-wrap(pc, UInt<3>(4)) + node iaddr = mux(T_1364, alu.sum, T_1365) + node T_1366 = eq(ctrl.inst_type, UInt<1>(1)) + node T_1367 = bit-or(T_1366, brCond.taken) + node inst = mux(T_1367, UInt<32>(19), icache.dout) + icache.we := UInt<1>(0) + icache.din := UInt<1>(0) + icache.addr := iaddr + icache.re := ctrl.inst_re + node T_1368 = eq(dcache.we, UInt<1>(0)) + node T_1369 = bit-not(T_1368) + node T_1370 = bit-not(T_1369) + node T_1371 = bit-and(icache.re, T_1370) + node T_1372 = mux(T_1371, iaddr, pc) + pc := T_1372 + node T_1373 = bit-not(stall) + when T_1373 : + fe_pc := pc + fe_inst := inst + ctrl.inst := fe_inst + ctrl.stall := stall + node rd_addr = bits(fe_inst, 11, 7) + node rs1_addr = bits(fe_inst, 19, 15) + node rs2_addr = bits(fe_inst, 24, 20) + regFile.raddr1 := rs1_addr + regFile.raddr2 := rs2_addr + immGen.inst := fe_inst + immGen.sel := ctrl.imm_sel + node T_1374 = eq(rs1_addr, UInt<1>(0)) + node rs1NotZero = bit-not(T_1374) + node T_1375 = eq(rs2_addr, UInt<1>(0)) + node rs2NotZero = bit-not(T_1375) + node T_1376 = eq(ctrl.wb_sel, UInt<2>(0)) + node alutype = bit-and(ctrl.wb_en, T_1376) + node ex_rd_addr = bits(ew_inst, 11, 7) + node T_1377 = bit-and(alutype, rs1NotZero) + node T_1378 = eq(rs1_addr, ex_rd_addr) + node T_1379 = bit-and(T_1377, T_1378) + node rs1 = mux(T_1379, ew_alu, regFile.rdata1) + node T_1380 = bit-and(alutype, rs2NotZero) + node T_1381 = eq(rs2_addr, ex_rd_addr) + node T_1382 = bit-and(T_1380, T_1381) + node rs2 = mux(T_1382, ew_alu, regFile.rdata2) + node T_1383 = eq(ctrl.A_sel, UInt<1>(0)) + node T_1384 = mux(T_1383, rs1, fe_pc) + alu.A := T_1384 + node T_1385 = eq(ctrl.B_sel, UInt<1>(0)) + node T_1386 = mux(T_1385, rs2, immGen.out) + alu.B := T_1386 + alu.alu_op := ctrl.alu_op + brCond.rs1 := rs1 + brCond.rs2 := rs2 + brCond.br_type := ctrl.br_type + node T_1387 = bit(alu.sum, 1) + node T_1388 = dshl(T_1387, UInt<3>(4)) + node T_1389 = bit(alu.sum, 0) + node T_1390 = dshl(T_1389, UInt<2>(3)) + node woffset = bit-or(T_1388, T_1390) + dcache.re := ctrl.data_re + node T_1391 = mux(stall, ew_alu, alu.sum) + dcache.addr := T_1391 + node T_1392 = bits(alu.sum, 1, 0) + node T_1393 = dshl(UInt<2>(3), T_1392) + node T_1394 = bits(T_1393, 3, 0) + node T_1395 = bits(alu.sum, 1, 0) + node T_1396 = dshl(UInt<1>(1), T_1395) + node T_1397 = bits(T_1396, 3, 0) + node T_1398 = eq(UInt<2>(2), ctrl.st_type) + node T_1399 = mux(T_1398, T_1397, UInt<4>(0)) + node T_1400 = eq(UInt<2>(1), ctrl.st_type) + node T_1401 = mux(T_1400, T_1394, T_1399) + node T_1402 = eq(UInt<2>(0), ctrl.st_type) + node T_1403 = mux(T_1402, UInt<4>(15), T_1401) + node T_1404 = mux(stall, UInt<4>(0), T_1403) + dcache.we := T_1404 + node T_1405 = dshl(rs2, woffset) + node T_1406 = bits(T_1405, 31, 0) + dcache.din := T_1406 + node T_1407 = bit-not(stall) + when T_1407 : + ew_pc := fe_pc + ew_inst := fe_inst + ew_alu := alu.out + node T_1408 = bit(ew_alu, 1) + node T_1409 = dshl(T_1408, UInt<3>(4)) + node T_1410 = bit(ew_alu, 0) + node T_1411 = dshl(T_1410, UInt<2>(3)) + node loffset = bit-or(T_1409, T_1411) + node lshift = dshr(dcache.dout, loffset) + node T_1412 = bits(lshift, 15, 0) + node T_1413 = convert(T_1412) + node T_1414 = pad(T_1413, 32) + node T_1415 = as-UInt(T_1414) + node T_1416 = bits(lshift, 7, 0) + node T_1417 = convert(T_1416) + node T_1418 = pad(T_1417, 32) + node T_1419 = as-UInt(T_1418) + node T_1420 = bits(lshift, 15, 0) + node T_1421 = bits(lshift, 7, 0) + node T_1422 = eq(UInt<3>(4), ctrl.ld_type) + node T_1423 = mux(T_1422, T_1421, dcache.dout) + node T_1424 = eq(UInt<3>(3), ctrl.ld_type) + node T_1425 = mux(T_1424, T_1420, T_1423) + node T_1426 = eq(UInt<3>(2), ctrl.ld_type) + node T_1427 = mux(T_1426, T_1419, T_1425) + node T_1428 = eq(UInt<3>(1), ctrl.ld_type) + node load = mux(T_1428, T_1415, T_1427) + inst csr of CSR + host := csr.host + csr.src := ew_alu + node T_1429 = bits(ew_inst, 31, 20) + csr.addr := T_1429 + csr.cmd := ctrl.csr_cmd + node T_1430 = add-wrap(ew_pc, UInt<3>(4)) + node T_1431 = eq(UInt<2>(3), ctrl.wb_sel) + node T_1432 = mux(T_1431, csr.data, ew_alu) + node T_1433 = eq(UInt<2>(2), ctrl.wb_sel) + node T_1434 = mux(T_1433, T_1430, T_1432) + node T_1435 = eq(UInt<2>(1), ctrl.wb_sel) + node regWrite = mux(T_1435, load, T_1434) + regFile.wen := ctrl.wb_en + regFile.waddr := ex_rd_addr + regFile.wdata := regWrite + module Control : + output ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, pc_sel : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} + + node T_1436 = bit-and(UInt<7>(127), ctrl.inst) + node T_1437 = eq(T_1436, UInt<6>(55)) + node T_1438 = bit-and(UInt<7>(127), ctrl.inst) + node T_1439 = eq(T_1438, UInt<5>(23)) + node T_1440 = bit-and(UInt<7>(127), ctrl.inst) + node T_1441 = eq(T_1440, UInt<7>(111)) + node T_1442 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1443 = eq(T_1442, UInt<7>(103)) + node T_1444 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1445 = eq(T_1444, UInt<7>(99)) + node T_1446 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1447 = eq(T_1446, UInt<13>(4195)) + node T_1448 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1449 = eq(T_1448, UInt<15>(16483)) + node T_1450 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1451 = eq(T_1450, UInt<15>(20579)) + node T_1452 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1453 = eq(T_1452, UInt<15>(24675)) + node T_1454 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1455 = eq(T_1454, UInt<15>(28771)) + node T_1456 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1457 = eq(T_1456, UInt<2>(3)) + node T_1458 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1459 = eq(T_1458, UInt<13>(4099)) + node T_1460 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1461 = eq(T_1460, UInt<14>(8195)) + node T_1462 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1463 = eq(T_1462, UInt<15>(16387)) + node T_1464 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1465 = eq(T_1464, UInt<15>(20483)) + node T_1466 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1467 = eq(T_1466, UInt<6>(35)) + node T_1468 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1469 = eq(T_1468, UInt<13>(4131)) + node T_1470 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1471 = eq(T_1470, UInt<14>(8227)) + node T_1472 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1473 = eq(T_1472, UInt<5>(19)) + node T_1474 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1475 = eq(T_1474, UInt<14>(8211)) + node T_1476 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1477 = eq(T_1476, UInt<14>(12307)) + node T_1478 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1479 = eq(T_1478, UInt<15>(16403)) + node T_1480 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1481 = eq(T_1480, UInt<15>(24595)) + node T_1482 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1483 = eq(T_1482, UInt<15>(28691)) + node T_1484 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1485 = eq(T_1484, UInt<13>(4115)) + node T_1486 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1487 = eq(T_1486, UInt<15>(20499)) + node T_1488 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1489 = eq(T_1488, UInt<31>(1073762323)) + node T_1490 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1491 = eq(T_1490, UInt<6>(51)) + node T_1492 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1493 = eq(T_1492, UInt<31>(1073741875)) + node T_1494 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1495 = eq(T_1494, UInt<13>(4147)) + node T_1496 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1497 = eq(T_1496, UInt<14>(8243)) + node T_1498 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1499 = eq(T_1498, UInt<14>(12339)) + node T_1500 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1501 = eq(T_1500, UInt<15>(16435)) + node T_1502 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1503 = eq(T_1502, UInt<15>(20531)) + node T_1504 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1505 = eq(T_1504, UInt<31>(1073762355)) + node T_1506 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1507 = eq(T_1506, UInt<15>(24627)) + node T_1508 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1509 = eq(T_1508, UInt<15>(28723)) + node T_1510 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1511 = eq(T_1510, UInt<13>(4211)) + node T_1512 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1513 = eq(T_1512, UInt<14>(8307)) + node T_1514 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1515 = eq(T_1514, UInt<14>(12403)) + node T_1516 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1517 = eq(T_1516, UInt<15>(20595)) + node T_1518 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1519 = eq(T_1518, UInt<15>(24691)) + node T_1520 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1521 = eq(T_1520, UInt<15>(28787)) + node T_1522 = mux(T_1521, UInt<1>(0), UInt<1>(0)) + node T_1523 = mux(T_1519, UInt<1>(0), T_1522) + node T_1524 = mux(T_1517, UInt<1>(0), T_1523) + node T_1525 = mux(T_1515, UInt<1>(0), T_1524) + node T_1526 = mux(T_1513, UInt<1>(0), T_1525) + node T_1527 = mux(T_1511, UInt<1>(0), T_1526) + node T_1528 = mux(T_1509, UInt<1>(0), T_1527) + node T_1529 = mux(T_1507, UInt<1>(0), T_1528) + node T_1530 = mux(T_1505, UInt<1>(0), T_1529) + node T_1531 = mux(T_1503, UInt<1>(0), T_1530) + node T_1532 = mux(T_1501, UInt<1>(0), T_1531) + node T_1533 = mux(T_1499, UInt<1>(0), T_1532) + node T_1534 = mux(T_1497, UInt<1>(0), T_1533) + node T_1535 = mux(T_1495, UInt<1>(0), T_1534) + node T_1536 = mux(T_1493, UInt<1>(0), T_1535) + node T_1537 = mux(T_1491, UInt<1>(0), T_1536) + node T_1538 = mux(T_1489, UInt<1>(0), T_1537) + node T_1539 = mux(T_1487, UInt<1>(0), T_1538) + node T_1540 = mux(T_1485, UInt<1>(0), T_1539) + node T_1541 = mux(T_1483, UInt<1>(0), T_1540) + node T_1542 = mux(T_1481, UInt<1>(0), T_1541) + node T_1543 = mux(T_1479, UInt<1>(0), T_1542) + node T_1544 = mux(T_1477, UInt<1>(0), T_1543) + node T_1545 = mux(T_1475, UInt<1>(0), T_1544) + node T_1546 = mux(T_1473, UInt<1>(0), T_1545) + node T_1547 = mux(T_1471, UInt<1>(0), T_1546) + node T_1548 = mux(T_1469, UInt<1>(0), T_1547) + node T_1549 = mux(T_1467, UInt<1>(0), T_1548) + node T_1550 = mux(T_1465, UInt<1>(0), T_1549) + node T_1551 = mux(T_1463, UInt<1>(0), T_1550) + node T_1552 = mux(T_1461, UInt<1>(0), T_1551) + node T_1553 = mux(T_1459, UInt<1>(0), T_1552) + node T_1554 = mux(T_1457, UInt<1>(0), T_1553) + node T_1555 = mux(T_1455, UInt<1>(0), T_1554) + node T_1556 = mux(T_1453, UInt<1>(0), T_1555) + node T_1557 = mux(T_1451, UInt<1>(0), T_1556) + node T_1558 = mux(T_1449, UInt<1>(0), T_1557) + node T_1559 = mux(T_1447, UInt<1>(0), T_1558) + node T_1560 = mux(T_1445, UInt<1>(0), T_1559) + node T_1561 = mux(T_1443, UInt<1>(1), T_1560) + node T_1562 = mux(T_1441, UInt<1>(1), T_1561) + node T_1563 = mux(T_1439, UInt<1>(0), T_1562) + node T_1564 = mux(T_1437, UInt<1>(0), T_1563) + node T_1565 = mux(T_1521, UInt<1>(1), UInt<1>(1)) + node T_1566 = mux(T_1519, UInt<1>(1), T_1565) + node T_1567 = mux(T_1517, UInt<1>(1), T_1566) + node T_1568 = mux(T_1515, UInt<1>(0), T_1567) + node T_1569 = mux(T_1513, UInt<1>(0), T_1568) + node T_1570 = mux(T_1511, UInt<1>(0), T_1569) + node T_1571 = mux(T_1509, UInt<1>(0), T_1570) + node T_1572 = mux(T_1507, UInt<1>(0), T_1571) + node T_1573 = mux(T_1505, UInt<1>(0), T_1572) + node T_1574 = mux(T_1503, UInt<1>(0), T_1573) + node T_1575 = mux(T_1501, UInt<1>(0), T_1574) + node T_1576 = mux(T_1499, UInt<1>(0), T_1575) + node T_1577 = mux(T_1497, UInt<1>(0), T_1576) + node T_1578 = mux(T_1495, UInt<1>(0), T_1577) + node T_1579 = mux(T_1493, UInt<1>(0), T_1578) + node T_1580 = mux(T_1491, UInt<1>(0), T_1579) + node T_1581 = mux(T_1489, UInt<1>(0), T_1580) + node T_1582 = mux(T_1487, UInt<1>(0), T_1581) + node T_1583 = mux(T_1485, UInt<1>(0), T_1582) + node T_1584 = mux(T_1483, UInt<1>(0), T_1583) + node T_1585 = mux(T_1481, UInt<1>(0), T_1584) + node T_1586 = mux(T_1479, UInt<1>(0), T_1585) + node T_1587 = mux(T_1477, UInt<1>(0), T_1586) + node T_1588 = mux(T_1475, UInt<1>(0), T_1587) + node T_1589 = mux(T_1473, UInt<1>(0), T_1588) + node T_1590 = mux(T_1471, UInt<1>(0), T_1589) + node T_1591 = mux(T_1469, UInt<1>(0), T_1590) + node T_1592 = mux(T_1467, UInt<1>(0), T_1591) + node T_1593 = mux(T_1465, UInt<1>(0), T_1592) + node T_1594 = mux(T_1463, UInt<1>(0), T_1593) + node T_1595 = mux(T_1461, UInt<1>(0), T_1594) + node T_1596 = mux(T_1459, UInt<1>(0), T_1595) + node T_1597 = mux(T_1457, UInt<1>(0), T_1596) + node T_1598 = mux(T_1455, UInt<1>(1), T_1597) + node T_1599 = mux(T_1453, UInt<1>(1), T_1598) + node T_1600 = mux(T_1451, UInt<1>(1), T_1599) + node T_1601 = mux(T_1449, UInt<1>(1), T_1600) + node T_1602 = mux(T_1447, UInt<1>(1), T_1601) + node T_1603 = mux(T_1445, UInt<1>(1), T_1602) + node T_1604 = mux(T_1443, UInt<1>(0), T_1603) + node T_1605 = mux(T_1441, UInt<1>(1), T_1604) + node T_1606 = mux(T_1439, UInt<1>(1), T_1605) + node T_1607 = mux(T_1437, UInt<1>(1), T_1606) + node T_1608 = mux(T_1521, UInt<1>(1), UInt<1>(0)) + node T_1609 = mux(T_1519, UInt<1>(1), T_1608) + node T_1610 = mux(T_1517, UInt<1>(1), T_1609) + node T_1611 = mux(T_1515, UInt<1>(0), T_1610) + node T_1612 = mux(T_1513, UInt<1>(0), T_1611) + node T_1613 = mux(T_1511, UInt<1>(0), T_1612) + node T_1614 = mux(T_1509, UInt<1>(0), T_1613) + node T_1615 = mux(T_1507, UInt<1>(0), T_1614) + node T_1616 = mux(T_1505, UInt<1>(0), T_1615) + node T_1617 = mux(T_1503, UInt<1>(0), T_1616) + node T_1618 = mux(T_1501, UInt<1>(0), T_1617) + node T_1619 = mux(T_1499, UInt<1>(0), T_1618) + node T_1620 = mux(T_1497, UInt<1>(0), T_1619) + node T_1621 = mux(T_1495, UInt<1>(0), T_1620) + node T_1622 = mux(T_1493, UInt<1>(0), T_1621) + node T_1623 = mux(T_1491, UInt<1>(0), T_1622) + node T_1624 = mux(T_1489, UInt<1>(1), T_1623) + node T_1625 = mux(T_1487, UInt<1>(1), T_1624) + node T_1626 = mux(T_1485, UInt<1>(1), T_1625) + node T_1627 = mux(T_1483, UInt<1>(1), T_1626) + node T_1628 = mux(T_1481, UInt<1>(1), T_1627) + node T_1629 = mux(T_1479, UInt<1>(1), T_1628) + node T_1630 = mux(T_1477, UInt<1>(1), T_1629) + node T_1631 = mux(T_1475, UInt<1>(1), T_1630) + node T_1632 = mux(T_1473, UInt<1>(1), T_1631) + node T_1633 = mux(T_1471, UInt<1>(1), T_1632) + node T_1634 = mux(T_1469, UInt<1>(1), T_1633) + node T_1635 = mux(T_1467, UInt<1>(1), T_1634) + node T_1636 = mux(T_1465, UInt<1>(1), T_1635) + node T_1637 = mux(T_1463, UInt<1>(1), T_1636) + node T_1638 = mux(T_1461, UInt<1>(1), T_1637) + node T_1639 = mux(T_1459, UInt<1>(1), T_1638) + node T_1640 = mux(T_1457, UInt<1>(1), T_1639) + node T_1641 = mux(T_1455, UInt<1>(1), T_1640) + node T_1642 = mux(T_1453, UInt<1>(1), T_1641) + node T_1643 = mux(T_1451, UInt<1>(1), T_1642) + node T_1644 = mux(T_1449, UInt<1>(1), T_1643) + node T_1645 = mux(T_1447, UInt<1>(1), T_1644) + node T_1646 = mux(T_1445, UInt<1>(1), T_1645) + node T_1647 = mux(T_1443, UInt<1>(1), T_1646) + node T_1648 = mux(T_1441, UInt<1>(1), T_1647) + node T_1649 = mux(T_1439, UInt<1>(1), T_1648) + node T_1650 = mux(T_1437, UInt<1>(1), T_1649) + node T_1651 = mux(T_1521, UInt<3>(5), UInt<3>(7)) + node T_1652 = mux(T_1519, UInt<3>(5), T_1651) + node T_1653 = mux(T_1517, UInt<3>(5), T_1652) + node T_1654 = mux(T_1515, UInt<3>(5), T_1653) + node T_1655 = mux(T_1513, UInt<3>(5), T_1654) + node T_1656 = mux(T_1511, UInt<3>(5), T_1655) + node T_1657 = mux(T_1509, UInt<3>(7), T_1656) + node T_1658 = mux(T_1507, UInt<3>(7), T_1657) + node T_1659 = mux(T_1505, UInt<3>(7), T_1658) + node T_1660 = mux(T_1503, UInt<3>(7), T_1659) + node T_1661 = mux(T_1501, UInt<3>(7), T_1660) + node T_1662 = mux(T_1499, UInt<3>(7), T_1661) + node T_1663 = mux(T_1497, UInt<3>(7), T_1662) + node T_1664 = mux(T_1495, UInt<3>(7), T_1663) + node T_1665 = mux(T_1493, UInt<3>(7), T_1664) + node T_1666 = mux(T_1491, UInt<3>(7), T_1665) + node T_1667 = mux(T_1489, UInt<3>(0), T_1666) + node T_1668 = mux(T_1487, UInt<3>(0), T_1667) + node T_1669 = mux(T_1485, UInt<3>(0), T_1668) + node T_1670 = mux(T_1483, UInt<3>(0), T_1669) + node T_1671 = mux(T_1481, UInt<3>(0), T_1670) + node T_1672 = mux(T_1479, UInt<3>(0), T_1671) + node T_1673 = mux(T_1477, UInt<3>(0), T_1672) + node T_1674 = mux(T_1475, UInt<3>(0), T_1673) + node T_1675 = mux(T_1473, UInt<3>(0), T_1674) + node T_1676 = mux(T_1471, UInt<3>(1), T_1675) + node T_1677 = mux(T_1469, UInt<3>(1), T_1676) + node T_1678 = mux(T_1467, UInt<3>(1), T_1677) + node T_1679 = mux(T_1465, UInt<3>(0), T_1678) + node T_1680 = mux(T_1463, UInt<3>(0), T_1679) + node T_1681 = mux(T_1461, UInt<3>(0), T_1680) + node T_1682 = mux(T_1459, UInt<3>(0), T_1681) + node T_1683 = mux(T_1457, UInt<3>(0), T_1682) + node T_1684 = mux(T_1455, UInt<3>(4), T_1683) + node T_1685 = mux(T_1453, UInt<3>(4), T_1684) + node T_1686 = mux(T_1451, UInt<3>(4), T_1685) + node T_1687 = mux(T_1449, UInt<3>(4), T_1686) + node T_1688 = mux(T_1447, UInt<3>(4), T_1687) + node T_1689 = mux(T_1445, UInt<3>(4), T_1688) + node T_1690 = mux(T_1443, UInt<3>(0), T_1689) + node T_1691 = mux(T_1441, UInt<3>(3), T_1690) + node T_1692 = mux(T_1439, UInt<3>(2), T_1691) + node T_1693 = mux(T_1437, UInt<3>(2), T_1692) + node T_1694 = mux(T_1521, UInt<4>(11), UInt<4>(15)) + node T_1695 = mux(T_1519, UInt<4>(11), T_1694) + node T_1696 = mux(T_1517, UInt<4>(11), T_1695) + node T_1697 = mux(T_1515, UInt<4>(10), T_1696) + node T_1698 = mux(T_1513, UInt<4>(10), T_1697) + node T_1699 = mux(T_1511, UInt<4>(10), T_1698) + node T_1700 = mux(T_1509, UInt<4>(2), T_1699) + node T_1701 = mux(T_1507, UInt<4>(3), T_1700) + node T_1702 = mux(T_1505, UInt<4>(9), T_1701) + node T_1703 = mux(T_1503, UInt<4>(8), T_1702) + node T_1704 = mux(T_1501, UInt<4>(4), T_1703) + node T_1705 = mux(T_1499, UInt<4>(7), T_1704) + node T_1706 = mux(T_1497, UInt<4>(5), T_1705) + node T_1707 = mux(T_1495, UInt<4>(6), T_1706) + node T_1708 = mux(T_1493, UInt<4>(1), T_1707) + node T_1709 = mux(T_1491, UInt<4>(0), T_1708) + node T_1710 = mux(T_1489, UInt<4>(9), T_1709) + node T_1711 = mux(T_1487, UInt<4>(8), T_1710) + node T_1712 = mux(T_1485, UInt<4>(6), T_1711) + node T_1713 = mux(T_1483, UInt<4>(2), T_1712) + node T_1714 = mux(T_1481, UInt<4>(3), T_1713) + node T_1715 = mux(T_1479, UInt<4>(4), T_1714) + node T_1716 = mux(T_1477, UInt<4>(7), T_1715) + node T_1717 = mux(T_1475, UInt<4>(5), T_1716) + node T_1718 = mux(T_1473, UInt<4>(0), T_1717) + node T_1719 = mux(T_1471, UInt<4>(0), T_1718) + node T_1720 = mux(T_1469, UInt<4>(0), T_1719) + node T_1721 = mux(T_1467, UInt<4>(0), T_1720) + node T_1722 = mux(T_1465, UInt<4>(0), T_1721) + node T_1723 = mux(T_1463, UInt<4>(0), T_1722) + node T_1724 = mux(T_1461, UInt<4>(0), T_1723) + node T_1725 = mux(T_1459, UInt<4>(0), T_1724) + node T_1726 = mux(T_1457, UInt<4>(0), T_1725) + node T_1727 = mux(T_1455, UInt<4>(0), T_1726) + node T_1728 = mux(T_1453, UInt<4>(0), T_1727) + node T_1729 = mux(T_1451, UInt<4>(0), T_1728) + node T_1730 = mux(T_1449, UInt<4>(0), T_1729) + node T_1731 = mux(T_1447, UInt<4>(0), T_1730) + node T_1732 = mux(T_1445, UInt<4>(0), T_1731) + node T_1733 = mux(T_1443, UInt<4>(0), T_1732) + node T_1734 = mux(T_1441, UInt<4>(0), T_1733) + node T_1735 = mux(T_1439, UInt<4>(0), T_1734) + node T_1736 = mux(T_1437, UInt<4>(11), T_1735) + node T_1737 = mux(T_1521, UInt<3>(7), UInt<3>(7)) + node T_1738 = mux(T_1519, UInt<3>(7), T_1737) + node T_1739 = mux(T_1517, UInt<3>(7), T_1738) + node T_1740 = mux(T_1515, UInt<3>(7), T_1739) + node T_1741 = mux(T_1513, UInt<3>(7), T_1740) + node T_1742 = mux(T_1511, UInt<3>(7), T_1741) + node T_1743 = mux(T_1509, UInt<3>(7), T_1742) + node T_1744 = mux(T_1507, UInt<3>(7), T_1743) + node T_1745 = mux(T_1505, UInt<3>(7), T_1744) + node T_1746 = mux(T_1503, UInt<3>(7), T_1745) + node T_1747 = mux(T_1501, UInt<3>(7), T_1746) + node T_1748 = mux(T_1499, UInt<3>(7), T_1747) + node T_1749 = mux(T_1497, UInt<3>(7), T_1748) + node T_1750 = mux(T_1495, UInt<3>(7), T_1749) + node T_1751 = mux(T_1493, UInt<3>(7), T_1750) + node T_1752 = mux(T_1491, UInt<3>(7), T_1751) + node T_1753 = mux(T_1489, UInt<3>(7), T_1752) + node T_1754 = mux(T_1487, UInt<3>(7), T_1753) + node T_1755 = mux(T_1485, UInt<3>(7), T_1754) + node T_1756 = mux(T_1483, UInt<3>(7), T_1755) + node T_1757 = mux(T_1481, UInt<3>(7), T_1756) + node T_1758 = mux(T_1479, UInt<3>(7), T_1757) + node T_1759 = mux(T_1477, UInt<3>(7), T_1758) + node T_1760 = mux(T_1475, UInt<3>(7), T_1759) + node T_1761 = mux(T_1473, UInt<3>(7), T_1760) + node T_1762 = mux(T_1471, UInt<3>(7), T_1761) + node T_1763 = mux(T_1469, UInt<3>(7), T_1762) + node T_1764 = mux(T_1467, UInt<3>(7), T_1763) + node T_1765 = mux(T_1465, UInt<3>(7), T_1764) + node T_1766 = mux(T_1463, UInt<3>(7), T_1765) + node T_1767 = mux(T_1461, UInt<3>(7), T_1766) + node T_1768 = mux(T_1459, UInt<3>(7), T_1767) + node T_1769 = mux(T_1457, UInt<3>(7), T_1768) + node T_1770 = mux(T_1455, UInt<3>(4), T_1769) + node T_1771 = mux(T_1453, UInt<3>(0), T_1770) + node T_1772 = mux(T_1451, UInt<3>(5), T_1771) + node T_1773 = mux(T_1449, UInt<3>(1), T_1772) + node T_1774 = mux(T_1447, UInt<3>(6), T_1773) + node T_1775 = mux(T_1445, UInt<3>(2), T_1774) + node T_1776 = mux(T_1443, UInt<3>(7), T_1775) + node T_1777 = mux(T_1441, UInt<3>(7), T_1776) + node T_1778 = mux(T_1439, UInt<3>(7), T_1777) + node T_1779 = mux(T_1437, UInt<3>(7), T_1778) + node T_1780 = mux(T_1521, UInt<1>(0), UInt<1>(0)) + node T_1781 = mux(T_1519, UInt<1>(0), T_1780) + node T_1782 = mux(T_1517, UInt<1>(0), T_1781) + node T_1783 = mux(T_1515, UInt<1>(0), T_1782) + node T_1784 = mux(T_1513, UInt<1>(0), T_1783) + node T_1785 = mux(T_1511, UInt<1>(0), T_1784) + node T_1786 = mux(T_1509, UInt<1>(0), T_1785) + node T_1787 = mux(T_1507, UInt<1>(0), T_1786) + node T_1788 = mux(T_1505, UInt<1>(0), T_1787) + node T_1789 = mux(T_1503, UInt<1>(0), T_1788) + node T_1790 = mux(T_1501, UInt<1>(0), T_1789) + node T_1791 = mux(T_1499, UInt<1>(0), T_1790) + node T_1792 = mux(T_1497, UInt<1>(0), T_1791) + node T_1793 = mux(T_1495, UInt<1>(0), T_1792) + node T_1794 = mux(T_1493, UInt<1>(0), T_1793) + node T_1795 = mux(T_1491, UInt<1>(0), T_1794) + node T_1796 = mux(T_1489, UInt<1>(0), T_1795) + node T_1797 = mux(T_1487, UInt<1>(0), T_1796) + node T_1798 = mux(T_1485, UInt<1>(0), T_1797) + node T_1799 = mux(T_1483, UInt<1>(0), T_1798) + node T_1800 = mux(T_1481, UInt<1>(0), T_1799) + node T_1801 = mux(T_1479, UInt<1>(0), T_1800) + node T_1802 = mux(T_1477, UInt<1>(0), T_1801) + node T_1803 = mux(T_1475, UInt<1>(0), T_1802) + node T_1804 = mux(T_1473, UInt<1>(0), T_1803) + node T_1805 = mux(T_1471, UInt<1>(0), T_1804) + node T_1806 = mux(T_1469, UInt<1>(0), T_1805) + node T_1807 = mux(T_1467, UInt<1>(0), T_1806) + node T_1808 = mux(T_1465, UInt<1>(0), T_1807) + node T_1809 = mux(T_1463, UInt<1>(0), T_1808) + node T_1810 = mux(T_1461, UInt<1>(0), T_1809) + node T_1811 = mux(T_1459, UInt<1>(0), T_1810) + node T_1812 = mux(T_1457, UInt<1>(0), T_1811) + node T_1813 = mux(T_1455, UInt<1>(0), T_1812) + node T_1814 = mux(T_1453, UInt<1>(0), T_1813) + node T_1815 = mux(T_1451, UInt<1>(0), T_1814) + node T_1816 = mux(T_1449, UInt<1>(0), T_1815) + node T_1817 = mux(T_1447, UInt<1>(0), T_1816) + node T_1818 = mux(T_1445, UInt<1>(0), T_1817) + node T_1819 = mux(T_1443, UInt<1>(1), T_1818) + node T_1820 = mux(T_1441, UInt<1>(1), T_1819) + node T_1821 = mux(T_1439, UInt<1>(0), T_1820) + node T_1822 = mux(T_1437, UInt<1>(0), T_1821) + node T_1823 = mux(T_1521, UInt<2>(3), UInt<2>(3)) + node T_1824 = mux(T_1519, UInt<2>(3), T_1823) + node T_1825 = mux(T_1517, UInt<2>(3), T_1824) + node T_1826 = mux(T_1515, UInt<2>(3), T_1825) + node T_1827 = mux(T_1513, UInt<2>(3), T_1826) + node T_1828 = mux(T_1511, UInt<2>(3), T_1827) + node T_1829 = mux(T_1509, UInt<2>(3), T_1828) + node T_1830 = mux(T_1507, UInt<2>(3), T_1829) + node T_1831 = mux(T_1505, UInt<2>(3), T_1830) + node T_1832 = mux(T_1503, UInt<2>(3), T_1831) + node T_1833 = mux(T_1501, UInt<2>(3), T_1832) + node T_1834 = mux(T_1499, UInt<2>(3), T_1833) + node T_1835 = mux(T_1497, UInt<2>(3), T_1834) + node T_1836 = mux(T_1495, UInt<2>(3), T_1835) + node T_1837 = mux(T_1493, UInt<2>(3), T_1836) + node T_1838 = mux(T_1491, UInt<2>(3), T_1837) + node T_1839 = mux(T_1489, UInt<2>(3), T_1838) + node T_1840 = mux(T_1487, UInt<2>(3), T_1839) + node T_1841 = mux(T_1485, UInt<2>(3), T_1840) + node T_1842 = mux(T_1483, UInt<2>(3), T_1841) + node T_1843 = mux(T_1481, UInt<2>(3), T_1842) + node T_1844 = mux(T_1479, UInt<2>(3), T_1843) + node T_1845 = mux(T_1477, UInt<2>(3), T_1844) + node T_1846 = mux(T_1475, UInt<2>(3), T_1845) + node T_1847 = mux(T_1473, UInt<2>(3), T_1846) + node T_1848 = mux(T_1471, UInt<2>(0), T_1847) + node T_1849 = mux(T_1469, UInt<2>(1), T_1848) + node T_1850 = mux(T_1467, UInt<2>(2), T_1849) + node T_1851 = mux(T_1465, UInt<2>(3), T_1850) + node T_1852 = mux(T_1463, UInt<2>(3), T_1851) + node T_1853 = mux(T_1461, UInt<2>(3), T_1852) + node T_1854 = mux(T_1459, UInt<2>(3), T_1853) + node T_1855 = mux(T_1457, UInt<2>(3), T_1854) + node T_1856 = mux(T_1455, UInt<2>(3), T_1855) + node T_1857 = mux(T_1453, UInt<2>(3), T_1856) + node T_1858 = mux(T_1451, UInt<2>(3), T_1857) + node T_1859 = mux(T_1449, UInt<2>(3), T_1858) + node T_1860 = mux(T_1447, UInt<2>(3), T_1859) + node T_1861 = mux(T_1445, UInt<2>(3), T_1860) + node T_1862 = mux(T_1443, UInt<2>(3), T_1861) + node T_1863 = mux(T_1441, UInt<2>(3), T_1862) + node T_1864 = mux(T_1439, UInt<2>(3), T_1863) + node T_1865 = mux(T_1437, UInt<2>(3), T_1864) + node T_1866 = mux(T_1521, UInt<3>(7), UInt<3>(7)) + node T_1867 = mux(T_1519, UInt<3>(7), T_1866) + node T_1868 = mux(T_1517, UInt<3>(7), T_1867) + node T_1869 = mux(T_1515, UInt<3>(7), T_1868) + node T_1870 = mux(T_1513, UInt<3>(7), T_1869) + node T_1871 = mux(T_1511, UInt<3>(7), T_1870) + node T_1872 = mux(T_1509, UInt<3>(7), T_1871) + node T_1873 = mux(T_1507, UInt<3>(7), T_1872) + node T_1874 = mux(T_1505, UInt<3>(7), T_1873) + node T_1875 = mux(T_1503, UInt<3>(7), T_1874) + node T_1876 = mux(T_1501, UInt<3>(7), T_1875) + node T_1877 = mux(T_1499, UInt<3>(7), T_1876) + node T_1878 = mux(T_1497, UInt<3>(7), T_1877) + node T_1879 = mux(T_1495, UInt<3>(7), T_1878) + node T_1880 = mux(T_1493, UInt<3>(7), T_1879) + node T_1881 = mux(T_1491, UInt<3>(7), T_1880) + node T_1882 = mux(T_1489, UInt<3>(7), T_1881) + node T_1883 = mux(T_1487, UInt<3>(7), T_1882) + node T_1884 = mux(T_1485, UInt<3>(7), T_1883) + node T_1885 = mux(T_1483, UInt<3>(7), T_1884) + node T_1886 = mux(T_1481, UInt<3>(7), T_1885) + node T_1887 = mux(T_1479, UInt<3>(7), T_1886) + node T_1888 = mux(T_1477, UInt<3>(7), T_1887) + node T_1889 = mux(T_1475, UInt<3>(7), T_1888) + node T_1890 = mux(T_1473, UInt<3>(7), T_1889) + node T_1891 = mux(T_1471, UInt<3>(7), T_1890) + node T_1892 = mux(T_1469, UInt<3>(7), T_1891) + node T_1893 = mux(T_1467, UInt<3>(7), T_1892) + node T_1894 = mux(T_1465, UInt<3>(3), T_1893) + node T_1895 = mux(T_1463, UInt<3>(4), T_1894) + node T_1896 = mux(T_1461, UInt<3>(0), T_1895) + node T_1897 = mux(T_1459, UInt<3>(1), T_1896) + node T_1898 = mux(T_1457, UInt<3>(2), T_1897) + node T_1899 = mux(T_1455, UInt<3>(7), T_1898) + node T_1900 = mux(T_1453, UInt<3>(7), T_1899) + node T_1901 = mux(T_1451, UInt<3>(7), T_1900) + node T_1902 = mux(T_1449, UInt<3>(7), T_1901) + node T_1903 = mux(T_1447, UInt<3>(7), T_1902) + node T_1904 = mux(T_1445, UInt<3>(7), T_1903) + node T_1905 = mux(T_1443, UInt<3>(7), T_1904) + node T_1906 = mux(T_1441, UInt<3>(7), T_1905) + node T_1907 = mux(T_1439, UInt<3>(7), T_1906) + node T_1908 = mux(T_1437, UInt<3>(7), T_1907) + node T_1909 = mux(T_1521, UInt<2>(3), UInt<2>(0)) + node T_1910 = mux(T_1519, UInt<2>(3), T_1909) + node T_1911 = mux(T_1517, UInt<2>(3), T_1910) + node T_1912 = mux(T_1515, UInt<2>(3), T_1911) + node T_1913 = mux(T_1513, UInt<2>(3), T_1912) + node T_1914 = mux(T_1511, UInt<2>(3), T_1913) + node T_1915 = mux(T_1509, UInt<2>(0), T_1914) + node T_1916 = mux(T_1507, UInt<2>(0), T_1915) + node T_1917 = mux(T_1505, UInt<2>(0), T_1916) + node T_1918 = mux(T_1503, UInt<2>(0), T_1917) + node T_1919 = mux(T_1501, UInt<2>(0), T_1918) + node T_1920 = mux(T_1499, UInt<2>(0), T_1919) + node T_1921 = mux(T_1497, UInt<2>(0), T_1920) + node T_1922 = mux(T_1495, UInt<2>(0), T_1921) + node T_1923 = mux(T_1493, UInt<2>(0), T_1922) + node T_1924 = mux(T_1491, UInt<2>(0), T_1923) + node T_1925 = mux(T_1489, UInt<2>(0), T_1924) + node T_1926 = mux(T_1487, UInt<2>(0), T_1925) + node T_1927 = mux(T_1485, UInt<2>(0), T_1926) + node T_1928 = mux(T_1483, UInt<2>(0), T_1927) + node T_1929 = mux(T_1481, UInt<2>(0), T_1928) + node T_1930 = mux(T_1479, UInt<2>(0), T_1929) + node T_1931 = mux(T_1477, UInt<2>(0), T_1930) + node T_1932 = mux(T_1475, UInt<2>(0), T_1931) + node T_1933 = mux(T_1473, UInt<2>(0), T_1932) + node T_1934 = mux(T_1471, UInt<2>(0), T_1933) + node T_1935 = mux(T_1469, UInt<2>(0), T_1934) + node T_1936 = mux(T_1467, UInt<2>(0), T_1935) + node T_1937 = mux(T_1465, UInt<2>(1), T_1936) + node T_1938 = mux(T_1463, UInt<2>(1), T_1937) + node T_1939 = mux(T_1461, UInt<2>(1), T_1938) + node T_1940 = mux(T_1459, UInt<2>(1), T_1939) + node T_1941 = mux(T_1457, UInt<2>(1), T_1940) + node T_1942 = mux(T_1455, UInt<2>(0), T_1941) + node T_1943 = mux(T_1453, UInt<2>(0), T_1942) + node T_1944 = mux(T_1451, UInt<2>(0), T_1943) + node T_1945 = mux(T_1449, UInt<2>(0), T_1944) + node T_1946 = mux(T_1447, UInt<2>(0), T_1945) + node T_1947 = mux(T_1445, UInt<2>(0), T_1946) + node T_1948 = mux(T_1443, UInt<2>(2), T_1947) + node T_1949 = mux(T_1441, UInt<2>(2), T_1948) + node T_1950 = mux(T_1439, UInt<2>(0), T_1949) + node T_1951 = mux(T_1437, UInt<2>(0), T_1950) + node T_1952 = mux(T_1521, UInt<1>(0), UInt<1>(0)) + node T_1953 = mux(T_1519, UInt<1>(0), T_1952) + node T_1954 = mux(T_1517, UInt<1>(0), T_1953) + node T_1955 = mux(T_1515, UInt<1>(0), T_1954) + node T_1956 = mux(T_1513, UInt<1>(0), T_1955) + node T_1957 = mux(T_1511, UInt<1>(0), T_1956) + node T_1958 = mux(T_1509, UInt<1>(1), T_1957) + node T_1959 = mux(T_1507, UInt<1>(1), T_1958) + node T_1960 = mux(T_1505, UInt<1>(1), T_1959) + node T_1961 = mux(T_1503, UInt<1>(1), T_1960) + node T_1962 = mux(T_1501, UInt<1>(1), T_1961) + node T_1963 = mux(T_1499, UInt<1>(1), T_1962) + node T_1964 = mux(T_1497, UInt<1>(1), T_1963) + node T_1965 = mux(T_1495, UInt<1>(1), T_1964) + node T_1966 = mux(T_1493, UInt<1>(1), T_1965) + node T_1967 = mux(T_1491, UInt<1>(1), T_1966) + node T_1968 = mux(T_1489, UInt<1>(1), T_1967) + node T_1969 = mux(T_1487, UInt<1>(1), T_1968) + node T_1970 = mux(T_1485, UInt<1>(1), T_1969) + node T_1971 = mux(T_1483, UInt<1>(1), T_1970) + node T_1972 = mux(T_1481, UInt<1>(1), T_1971) + node T_1973 = mux(T_1479, UInt<1>(1), T_1972) + node T_1974 = mux(T_1477, UInt<1>(1), T_1973) + node T_1975 = mux(T_1475, UInt<1>(1), T_1974) + node T_1976 = mux(T_1473, UInt<1>(1), T_1975) + node T_1977 = mux(T_1471, UInt<1>(0), T_1976) + node T_1978 = mux(T_1469, UInt<1>(0), T_1977) + node T_1979 = mux(T_1467, UInt<1>(0), T_1978) + node T_1980 = mux(T_1465, UInt<1>(1), T_1979) + node T_1981 = mux(T_1463, UInt<1>(1), T_1980) + node T_1982 = mux(T_1461, UInt<1>(1), T_1981) + node T_1983 = mux(T_1459, UInt<1>(1), T_1982) + node T_1984 = mux(T_1457, UInt<1>(1), T_1983) + node T_1985 = mux(T_1455, UInt<1>(0), T_1984) + node T_1986 = mux(T_1453, UInt<1>(0), T_1985) + node T_1987 = mux(T_1451, UInt<1>(0), T_1986) + node T_1988 = mux(T_1449, UInt<1>(0), T_1987) + node T_1989 = mux(T_1447, UInt<1>(0), T_1988) + node T_1990 = mux(T_1445, UInt<1>(0), T_1989) + node T_1991 = mux(T_1443, UInt<1>(1), T_1990) + node T_1992 = mux(T_1441, UInt<1>(1), T_1991) + node T_1993 = mux(T_1439, UInt<1>(1), T_1992) + node T_1994 = mux(T_1437, UInt<1>(1), T_1993) + node T_1995 = mux(T_1521, UInt<2>(3), UInt<2>(0)) + node T_1996 = mux(T_1519, UInt<2>(2), T_1995) + node T_1997 = mux(T_1517, UInt<2>(1), T_1996) + node T_1998 = mux(T_1515, UInt<2>(3), T_1997) + node T_1999 = mux(T_1513, UInt<2>(2), T_1998) + node T_2000 = mux(T_1511, UInt<2>(1), T_1999) + node T_2001 = mux(T_1509, UInt<2>(0), T_2000) + node T_2002 = mux(T_1507, UInt<2>(0), T_2001) + node T_2003 = mux(T_1505, UInt<2>(0), T_2002) + node T_2004 = mux(T_1503, UInt<2>(0), T_2003) + node T_2005 = mux(T_1501, UInt<2>(0), T_2004) + node T_2006 = mux(T_1499, UInt<2>(0), T_2005) + node T_2007 = mux(T_1497, UInt<2>(0), T_2006) + node T_2008 = mux(T_1495, UInt<2>(0), T_2007) + node T_2009 = mux(T_1493, UInt<2>(0), T_2008) + node T_2010 = mux(T_1491, UInt<2>(0), T_2009) + node T_2011 = mux(T_1489, UInt<2>(0), T_2010) + node T_2012 = mux(T_1487, UInt<2>(0), T_2011) + node T_2013 = mux(T_1485, UInt<2>(0), T_2012) + node T_2014 = mux(T_1483, UInt<2>(0), T_2013) + node T_2015 = mux(T_1481, UInt<2>(0), T_2014) + node T_2016 = mux(T_1479, UInt<2>(0), T_2015) + node T_2017 = mux(T_1477, UInt<2>(0), T_2016) + node T_2018 = mux(T_1475, UInt<2>(0), T_2017) + node T_2019 = mux(T_1473, UInt<2>(0), T_2018) + node T_2020 = mux(T_1471, UInt<2>(0), T_2019) + node T_2021 = mux(T_1469, UInt<2>(0), T_2020) + node T_2022 = mux(T_1467, UInt<2>(0), T_2021) + node T_2023 = mux(T_1465, UInt<2>(0), T_2022) + node T_2024 = mux(T_1463, UInt<2>(0), T_2023) + node T_2025 = mux(T_1461, UInt<2>(0), T_2024) + node T_2026 = mux(T_1459, UInt<2>(0), T_2025) + node T_2027 = mux(T_1457, UInt<2>(0), T_2026) + node T_2028 = mux(T_1455, UInt<2>(0), T_2027) + node T_2029 = mux(T_1453, UInt<2>(0), T_2028) + node T_2030 = mux(T_1451, UInt<2>(0), T_2029) + node T_2031 = mux(T_1449, UInt<2>(0), T_2030) + node T_2032 = mux(T_1447, UInt<2>(0), T_2031) + node T_2033 = mux(T_1445, UInt<2>(0), T_2032) + node T_2034 = mux(T_1443, UInt<2>(0), T_2033) + node T_2035 = mux(T_1441, UInt<2>(0), T_2034) + node T_2036 = mux(T_1439, UInt<2>(0), T_2035) + node T_2037 = mux(T_1437, UInt<2>(0), T_2036) + node rs1_addr = bits(ctrl.inst, 19, 15) + node rs2_addr = bits(ctrl.inst, 24, 20) + reg st_type : UInt<2> + reg ld_type : UInt<3> + reg wb_sel : UInt<2> + node T_2038 = bit(T_1994, 0) + reg wb_en : UInt<1> + reg csr_cmd : UInt<2> + ctrl.pc_sel := T_1564 + node T_2039 = bit-not(ctrl.stall) + node T_2040 = bit-not(ctrl.data_re) + node T_2041 = bit-and(T_2039, T_2040) + ctrl.inst_re := T_2041 + node T_2042 = neq(T_1908, UInt<3>(7)) + node T_2043 = bit(T_1822, 0) + node T_2044 = bit-or(T_2042, T_2043) + node T_2045 = mux(T_2044, UInt<1>(1), UInt<1>(0)) + ctrl.inst_type := T_2045 + ctrl.A_sel := T_1607 + ctrl.B_sel := T_1650 + ctrl.imm_sel := T_1693 + ctrl.alu_op := T_1736 + ctrl.br_type := T_1779 + ctrl.st_type := T_1865 + node T_2046 = bit-not(ctrl.stall) + when T_2046 : + st_type := ctrl.st_type + ld_type := T_1908 + wb_sel := T_1951 + node T_2047 = bit(T_1994, 0) + wb_en := T_2047 + csr_cmd := T_2037 + node T_2048 = neq(ctrl.ld_type, UInt<3>(7)) + node T_2049 = neq(T_1908, UInt<3>(7)) + node T_2050 = mux(ctrl.stall, T_2048, T_2049) + ctrl.data_re := T_2050 + ctrl.ld_type := ld_type + ctrl.wb_en := wb_en + ctrl.wb_sel := wb_sel + ctrl.csr_cmd := csr_cmd + module Core : + output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} + output icache : {re : UInt<1>, addr : UInt<32>, flip dout : UInt<32>, we : UInt<4>, din : UInt<32>} + output dcache : {re : UInt<1>, addr : UInt<32>, flip dout : UInt<32>, we : UInt<4>, din : UInt<32>} + input stall : UInt<1> + + inst dpath of Datapath + inst ctrl of Control + host := dpath.host + icache := dpath.icache + dcache := dpath.dcache + dpath.ctrl := ctrl.ctrl + dpath.stall := stall diff --git a/test/chisel3/Counter.fir b/test/chisel3/Counter.fir new file mode 100644 index 00000000..6f04dfb9 --- /dev/null +++ b/test/chisel3/Counter.fir @@ -0,0 +1,17 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit Counter : + module Counter : + input inc : UInt<1> + output tot : UInt<8> + input amt : UInt<4> + + reg T_13 : UInt<8> + on-reset T_13 := UInt<8>(0) + when inc : + node T_14 = add-wrap(T_13, amt) + node T_15 = gt(T_14, UInt<8>(255)) + node T_16 = mux(T_15, UInt<1>(0), T_14) + T_13 := T_16 + tot := T_13 diff --git a/test/chisel3/EnableShiftRegister.fir b/test/chisel3/EnableShiftRegister.fir new file mode 100644 index 00000000..795b03e4 --- /dev/null +++ b/test/chisel3/EnableShiftRegister.fir @@ -0,0 +1,23 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit EnableShiftRegister : + module EnableShiftRegister : + input in : UInt<4> + output out : UInt<4> + input shift : UInt<1> + + reg r0 : UInt<4> + on-reset r0 := UInt<4>(0) + reg r1 : UInt<4> + on-reset r1 := UInt<4>(0) + reg r2 : UInt<4> + on-reset r2 := UInt<4>(0) + reg r3 : UInt<4> + on-reset r3 := UInt<4>(0) + when shift : + r0 := in + r1 := r0 + r2 := r1 + r3 := r2 + out := r3 diff --git a/test/chisel3/GCD.fir b/test/chisel3/GCD.fir new file mode 100644 index 00000000..d6f7d798 --- /dev/null +++ b/test/chisel3/GCD.fir @@ -0,0 +1,26 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit GCD : + module GCD : + output v : UInt<1> + input e : UInt<1> + output z : UInt<16> + input a : UInt<16> + input b : UInt<16> + + reg x : UInt<16> + reg y : UInt<16> + node T_17 = gt(x, y) + when T_17 : + node T_18 = sub-wrap(x, y) + x := T_18 + else : + node T_19 = sub-wrap(y, x) + y := T_19 + when e : + x := a + y := b + z := x + node T_20 = eq(y, UInt<1>(0)) + v := T_20 diff --git a/test/chisel3/ModuleWire.fir b/test/chisel3/ModuleWire.fir new file mode 100644 index 00000000..fefe42bd --- /dev/null +++ b/test/chisel3/ModuleWire.fir @@ -0,0 +1,17 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit ModuleWire : + module Inc : + input in : UInt<32> + output out : UInt<32> + + node T_12 = add-wrap(in, UInt<1>(1)) + out := T_12 + module ModuleWire : + input in : UInt<32> + output out : UInt<32> + + inst T_13 of Inc + T_13.in := in + out := T_13.out diff --git a/test/chisel3/Risc.fir b/test/chisel3/Risc.fir new file mode 100644 index 00000000..bd02bac3 --- /dev/null +++ b/test/chisel3/Risc.fir @@ -0,0 +1,53 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit Risc : + module Risc : + output out : UInt<32> + output valid : UInt<1> + input boot : UInt<1> + input isWr : UInt<1> + input wrAddr : UInt<8> + input wrData : UInt<32> + + mem file : UInt<32>[256] + mem code : UInt<32>[256] + reg pc : UInt<8> + on-reset pc := UInt<8>(0) + accessor inst = code[pc] + node op = bits(inst, 31, 24) + node rci = bits(inst, 23, 16) + node rai = bits(inst, 15, 8) + node rbi = bits(inst, 7, 0) + node T_51 = eq(rai, UInt<1>(0)) + accessor T_52 = file[rai] + node ra = mux(T_51, UInt<1>(0), T_52) + node T_53 = eq(rbi, UInt<1>(0)) + accessor T_54 = file[rbi] + node rb = mux(T_53, UInt<1>(0), T_54) + wire rc : UInt<32> + valid := UInt<1>(0) + out := UInt<1>(0) + rc := UInt<1>(0) + when isWr : + accessor T_55 = code[wrAddr] + T_55 := wrData + else : when boot : pc := UInt<1>(0) + else : + node T_56 = eq(UInt<1>(0), op) + when T_56 : + node T_57 = add-wrap(ra, rb) + rc := T_57 + node T_58 = eq(UInt<1>(1), op) + when T_58 : + node T_59 = shl(rai, 8) + node T_60 = bit-or(T_59, rbi) + rc := T_60 + out := rc + node T_61 = eq(rci, UInt<8>(255)) + when T_61 : valid := UInt<1>(1) + else : + accessor T_62 = file[rci] + T_62 := rc + node T_63 = add-wrap(pc, UInt<1>(1)) + pc := T_63 diff --git a/test/chisel3/Rom.fir b/test/chisel3/Rom.fir new file mode 100644 index 00000000..8e80b7d4 --- /dev/null +++ b/test/chisel3/Rom.fir @@ -0,0 +1,27 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit Rom : + module Rom : + output out : UInt<5> + input addr : UInt<4> + + wire r : UInt<5>[16] + r[0] := UInt<5>(0) + r[1] := UInt<5>(2) + r[2] := UInt<5>(4) + r[3] := UInt<5>(6) + r[4] := UInt<5>(8) + r[5] := UInt<5>(10) + r[6] := UInt<5>(12) + r[7] := UInt<5>(14) + r[8] := UInt<5>(16) + r[9] := UInt<5>(18) + r[10] := UInt<5>(20) + r[11] := UInt<5>(22) + r[12] := UInt<5>(24) + r[13] := UInt<5>(26) + r[14] := UInt<5>(28) + r[15] := UInt<5>(30) + accessor T_39 = r[addr] + out := T_39 diff --git a/test/chisel3/Tbl.fir b/test/chisel3/Tbl.fir new file mode 100644 index 00000000..d64916f1 --- /dev/null +++ b/test/chisel3/Tbl.fir @@ -0,0 +1,19 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit Tbl : + module Tbl : + input i : UInt<16> + input d : UInt<16> + output o : UInt<16> + input we : UInt<1> + + mem m : UInt<10>[256] + o := UInt<1>(0) + when we : + accessor T_13 = m[i] + node T_14 = bits(d, 9, 0) + T_13 := T_14 + else : + accessor T_15 = m[i] + o := T_15 diff --git a/test/chisel3/Tile.fir b/test/chisel3/Tile.fir new file mode 100644 index 00000000..eeec18ee --- /dev/null +++ b/test/chisel3/Tile.fir @@ -0,0 +1,1234 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit Tile : + module ALU : + input B : UInt<32> + output out : UInt<32> + output sum : UInt<32> + input A : UInt<32> + input alu_op : UInt<4> + + node shamt = bits(B, 4, 0) + node T_1554 = add-wrap(A, B) + node T_1555 = sub-wrap(A, B) + node T_1556 = convert(A) + node T_1557 = dshr(T_1556, shamt) + node T_1558 = as-UInt(T_1557) + node T_1559 = dshr(A, shamt) + node T_1560 = dshl(A, shamt) + node T_1561 = bits(T_1560, 31, 0) + node T_1562 = convert(A) + node T_1563 = convert(B) + node T_1564 = lt(T_1562, T_1563) + node T_1565 = as-UInt(T_1564) + node T_1566 = lt(A, B) + node T_1567 = as-UInt(T_1566) + node T_1568 = bit-and(A, B) + node T_1569 = bit-or(A, B) + node T_1570 = bit-xor(A, B) + node T_1571 = eq(UInt<4>(10), alu_op) + node T_1572 = mux(T_1571, A, B) + node T_1573 = eq(UInt<4>(4), alu_op) + node T_1574 = mux(T_1573, T_1570, T_1572) + node T_1575 = eq(UInt<4>(3), alu_op) + node T_1576 = mux(T_1575, T_1569, T_1574) + node T_1577 = eq(UInt<4>(2), alu_op) + node T_1578 = mux(T_1577, T_1568, T_1576) + node T_1579 = eq(UInt<4>(7), alu_op) + node T_1580 = mux(T_1579, T_1567, T_1578) + node T_1581 = eq(UInt<4>(5), alu_op) + node T_1582 = mux(T_1581, T_1565, T_1580) + node T_1583 = eq(UInt<4>(6), alu_op) + node T_1584 = mux(T_1583, T_1561, T_1582) + node T_1585 = eq(UInt<4>(8), alu_op) + node T_1586 = mux(T_1585, T_1559, T_1584) + node T_1587 = eq(UInt<4>(9), alu_op) + node T_1588 = mux(T_1587, T_1558, T_1586) + node T_1589 = eq(UInt<4>(1), alu_op) + node T_1590 = mux(T_1589, T_1555, T_1588) + node T_1591 = eq(UInt<4>(0), alu_op) + node oot = mux(T_1591, T_1554, T_1590) + node T_1592 = bits(oot, 31, 0) + out := T_1592 + node T_1593 = bit(alu_op, 0) + node T_1594 = sub-wrap(UInt<1>(0), B) + node T_1595 = mux(T_1593, T_1594, B) + node T_1596 = add-wrap(A, T_1595) + sum := T_1596 + module BrCond : + input br_type : UInt<3> + input rs1 : UInt<32> + input rs2 : UInt<32> + output taken : UInt<1> + + node eq = eq(rs1, rs2) + node neq = bit-not(eq) + node T_1597 = convert(rs1) + node T_1598 = convert(rs2) + node lt = lt(T_1597, T_1598) + node ge = bit-not(lt) + node ltu = lt(rs1, rs2) + node geu = bit-not(ltu) + node T_1599 = eq(br_type, UInt<3>(2)) + node T_1600 = bit-and(T_1599, eq) + node T_1601 = eq(br_type, UInt<3>(6)) + node T_1602 = bit-and(T_1601, neq) + node T_1603 = bit-or(T_1600, T_1602) + node T_1604 = eq(br_type, UInt<3>(1)) + node T_1605 = bit-and(T_1604, lt) + node T_1606 = bit-or(T_1603, T_1605) + node T_1607 = eq(br_type, UInt<3>(5)) + node T_1608 = bit-and(T_1607, ge) + node T_1609 = bit-or(T_1606, T_1608) + node T_1610 = eq(br_type, UInt<3>(0)) + node T_1611 = bit-and(T_1610, ltu) + node T_1612 = bit-or(T_1609, T_1611) + node T_1613 = eq(br_type, UInt<3>(4)) + node T_1614 = bit-and(T_1613, geu) + node T_1615 = bit-or(T_1612, T_1614) + taken := T_1615 + module RegFile : + input raddr1 : UInt<5> + input raddr2 : UInt<5> + output rdata1 : UInt<32> + output rdata2 : UInt<32> + input wen : UInt<1> + input waddr : UInt<5> + input wdata : UInt<32> + + mem regs : UInt<32>[32] + node T_1616 = eq(raddr1, UInt<1>(0)) + node T_1617 = bit-not(T_1616) + accessor T_1618 = regs[raddr1] + node T_1619 = mux(T_1617, T_1618, UInt<1>(0)) + rdata1 := T_1619 + node T_1620 = eq(raddr2, UInt<1>(0)) + node T_1621 = bit-not(T_1620) + accessor T_1622 = regs[raddr2] + node T_1623 = mux(T_1621, T_1622, UInt<1>(0)) + rdata2 := T_1623 + node T_1624 = eq(waddr, UInt<1>(0)) + node T_1625 = bit-not(T_1624) + node T_1626 = bit-and(wen, T_1625) + when T_1626 : + accessor T_1627 = regs[waddr] + T_1627 := wdata + module ImmGenWire : + output out : UInt<32> + input inst : UInt<32> + input sel : UInt<3> + + node T_1628 = bits(inst, 31, 20) + node Iimm = convert(T_1628) + node T_1629 = bits(inst, 31, 25) + node T_1630 = bits(inst, 11, 7) + node T_1631 = cat(T_1629, T_1630) + node Simm = convert(T_1631) + node T_1632 = bit(inst, 31) + node T_1633 = bit(inst, 7) + node T_1634 = bits(inst, 30, 25) + node T_1635 = bits(inst, 11, 8) + node T_1636 = cat(T_1632, T_1633) + node T_1637 = cat(T_1635, UInt<1>(0)) + node T_1638 = cat(T_1634, T_1637) + node T_1639 = cat(T_1636, T_1638) + node Bimm = convert(T_1639) + node T_1640 = bits(inst, 31, 12) + node T_1641 = cat(T_1640, UInt<12>(0)) + node Uimm = convert(T_1641) + node T_1642 = bit(inst, 31) + node T_1643 = bits(inst, 19, 12) + node T_1644 = bit(inst, 20) + node T_1645 = bits(inst, 30, 25) + node T_1646 = bits(inst, 24, 21) + node T_1647 = cat(T_1643, T_1644) + node T_1648 = cat(T_1642, T_1647) + node T_1649 = cat(T_1646, UInt<1>(0)) + node T_1650 = cat(T_1645, T_1649) + node T_1651 = cat(T_1648, T_1650) + node Jimm = convert(T_1651) + node T_1652 = bits(inst, 19, 15) + node T_1653 = pad(T_1652, 32) + node Zimm = convert(T_1653) + node T_1654 = eq(UInt<3>(3), sel) + node T_1655 = mux(T_1654, Jimm, Zimm) + node T_1656 = eq(UInt<3>(2), sel) + node T_1657 = mux(T_1656, Uimm, T_1655) + node T_1658 = eq(UInt<3>(4), sel) + node T_1659 = mux(T_1658, Bimm, T_1657) + node T_1660 = eq(UInt<3>(1), sel) + node T_1661 = mux(T_1660, Simm, T_1659) + node T_1662 = eq(UInt<3>(0), sel) + node T_1663 = mux(T_1662, Iimm, T_1661) + node T_1664 = as-UInt(T_1663) + out := T_1664 + module CSR : + output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} + input cmd : UInt<2> + input src : UInt<32> + output data : UInt<32> + input addr : UInt<12> + + reg reg_tohost : UInt<32> + on-reset reg_tohost := UInt<32>(0) + reg reg_status : UInt<32> + on-reset reg_status := UInt<32>(0) + host.tohost := reg_tohost + host.status := reg_status + node T_1665 = eq(UInt<12>(1291), addr) + node T_1666 = mux(T_1665, host.hid, UInt<1>(0)) + node T_1667 = eq(UInt<12>(1290), addr) + node T_1668 = mux(T_1667, reg_status, T_1666) + node T_1669 = eq(UInt<12>(1310), addr) + node T_1670 = mux(T_1669, reg_tohost, T_1668) + data := T_1670 + node T_1671 = eq(cmd, UInt<2>(1)) + when T_1671 : + node T_1672 = eq(addr, UInt<12>(1310)) + when T_1672 : reg_tohost := src + node T_1673 = eq(addr, UInt<12>(1290)) + when T_1673 : reg_status := src + node T_1674 = eq(cmd, UInt<2>(2)) + node T_1675 = neq(src, UInt<1>(0)) + node T_1676 = bit-and(T_1674, T_1675) + when T_1676 : + node T_1677 = eq(addr, UInt<12>(1310)) + when T_1677 : + node T_1678 = dshl(UInt<1>(1), src) + node T_1679 = bit-or(data, T_1678) + reg_tohost := T_1679 + node T_1680 = eq(addr, UInt<12>(1290)) + when T_1680 : + node T_1681 = dshl(UInt<1>(1), src) + node T_1682 = bit-or(data, T_1681) + reg_status := T_1682 + node T_1683 = eq(cmd, UInt<2>(3)) + node T_1684 = neq(src, UInt<1>(0)) + node T_1685 = bit-and(T_1683, T_1684) + when T_1685 : + node T_1686 = eq(addr, UInt<12>(1310)) + when T_1686 : + node T_1687 = dshl(UInt<1>(0), src) + node T_1688 = bit-and(data, T_1687) + reg_tohost := T_1688 + node T_1689 = eq(addr, UInt<12>(1290)) + when T_1689 : + node T_1690 = dshl(UInt<1>(0), src) + node T_1691 = bit-and(data, T_1690) + reg_status := T_1691 + module Datapath : + output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} + input stall : UInt<1> + output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} + output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} + input ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, pc_sel : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} + + inst alu of ALU + inst brCond of BrCond + inst regFile of RegFile + inst immGen of ImmGenWire + reg fe_inst : UInt<32> + on-reset fe_inst := UInt<32>(0) + reg fe_pc : UInt + reg ew_inst : UInt<32> + on-reset ew_inst := UInt<32>(0) + reg ew_pc : UInt + reg ew_alu : UInt + node T_1692 = sub-wrap(UInt<14>(8192), UInt<32>(4)) + reg pc : UInt<32> + on-reset pc := T_1692 + node T_1693 = eq(ctrl.pc_sel, UInt<1>(1)) + node T_1694 = bit-or(T_1693, brCond.taken) + node T_1695 = add-wrap(pc, UInt<3>(4)) + node iaddr = mux(T_1694, alu.sum, T_1695) + node T_1696 = eq(ctrl.inst_type, UInt<1>(1)) + node T_1697 = bit-or(T_1696, brCond.taken) + node inst = mux(T_1697, UInt<32>(19), icache.dout) + icache.we := UInt<1>(0) + icache.din := UInt<1>(0) + icache.addr := iaddr + icache.re := ctrl.inst_re + node T_1698 = eq(dcache.we, UInt<1>(0)) + node T_1699 = bit-not(T_1698) + node T_1700 = bit-not(T_1699) + node T_1701 = bit-and(icache.re, T_1700) + node T_1702 = mux(T_1701, iaddr, pc) + pc := T_1702 + node T_1703 = bit-not(stall) + when T_1703 : + fe_pc := pc + fe_inst := inst + ctrl.inst := fe_inst + ctrl.stall := stall + node rd_addr = bits(fe_inst, 11, 7) + node rs1_addr = bits(fe_inst, 19, 15) + node rs2_addr = bits(fe_inst, 24, 20) + regFile.raddr1 := rs1_addr + regFile.raddr2 := rs2_addr + immGen.inst := fe_inst + immGen.sel := ctrl.imm_sel + node T_1704 = eq(rs1_addr, UInt<1>(0)) + node rs1NotZero = bit-not(T_1704) + node T_1705 = eq(rs2_addr, UInt<1>(0)) + node rs2NotZero = bit-not(T_1705) + node T_1706 = eq(ctrl.wb_sel, UInt<2>(0)) + node alutype = bit-and(ctrl.wb_en, T_1706) + node ex_rd_addr = bits(ew_inst, 11, 7) + node T_1707 = bit-and(alutype, rs1NotZero) + node T_1708 = eq(rs1_addr, ex_rd_addr) + node T_1709 = bit-and(T_1707, T_1708) + node rs1 = mux(T_1709, ew_alu, regFile.rdata1) + node T_1710 = bit-and(alutype, rs2NotZero) + node T_1711 = eq(rs2_addr, ex_rd_addr) + node T_1712 = bit-and(T_1710, T_1711) + node rs2 = mux(T_1712, ew_alu, regFile.rdata2) + node T_1713 = eq(ctrl.A_sel, UInt<1>(0)) + node T_1714 = mux(T_1713, rs1, fe_pc) + alu.A := T_1714 + node T_1715 = eq(ctrl.B_sel, UInt<1>(0)) + node T_1716 = mux(T_1715, rs2, immGen.out) + alu.B := T_1716 + alu.alu_op := ctrl.alu_op + brCond.rs1 := rs1 + brCond.rs2 := rs2 + brCond.br_type := ctrl.br_type + node T_1717 = bit(alu.sum, 1) + node T_1718 = dshl(T_1717, UInt<3>(4)) + node T_1719 = bit(alu.sum, 0) + node T_1720 = dshl(T_1719, UInt<2>(3)) + node woffset = bit-or(T_1718, T_1720) + dcache.re := ctrl.data_re + node T_1721 = mux(stall, ew_alu, alu.sum) + dcache.addr := T_1721 + node T_1722 = bits(alu.sum, 1, 0) + node T_1723 = dshl(UInt<2>(3), T_1722) + node T_1724 = bits(T_1723, 3, 0) + node T_1725 = bits(alu.sum, 1, 0) + node T_1726 = dshl(UInt<1>(1), T_1725) + node T_1727 = bits(T_1726, 3, 0) + node T_1728 = eq(UInt<2>(2), ctrl.st_type) + node T_1729 = mux(T_1728, T_1727, UInt<4>(0)) + node T_1730 = eq(UInt<2>(1), ctrl.st_type) + node T_1731 = mux(T_1730, T_1724, T_1729) + node T_1732 = eq(UInt<2>(0), ctrl.st_type) + node T_1733 = mux(T_1732, UInt<4>(15), T_1731) + node T_1734 = mux(stall, UInt<4>(0), T_1733) + dcache.we := T_1734 + node T_1735 = dshl(rs2, woffset) + node T_1736 = bits(T_1735, 31, 0) + dcache.din := T_1736 + node T_1737 = bit-not(stall) + when T_1737 : + ew_pc := fe_pc + ew_inst := fe_inst + ew_alu := alu.out + node T_1738 = bit(ew_alu, 1) + node T_1739 = dshl(T_1738, UInt<3>(4)) + node T_1740 = bit(ew_alu, 0) + node T_1741 = dshl(T_1740, UInt<2>(3)) + node loffset = bit-or(T_1739, T_1741) + node lshift = dshr(dcache.dout, loffset) + node T_1742 = bits(lshift, 15, 0) + node T_1743 = convert(T_1742) + node T_1744 = pad(T_1743, 32) + node T_1745 = as-UInt(T_1744) + node T_1746 = bits(lshift, 7, 0) + node T_1747 = convert(T_1746) + node T_1748 = pad(T_1747, 32) + node T_1749 = as-UInt(T_1748) + node T_1750 = bits(lshift, 15, 0) + node T_1751 = bits(lshift, 7, 0) + node T_1752 = eq(UInt<3>(4), ctrl.ld_type) + node T_1753 = mux(T_1752, T_1751, dcache.dout) + node T_1754 = eq(UInt<3>(3), ctrl.ld_type) + node T_1755 = mux(T_1754, T_1750, T_1753) + node T_1756 = eq(UInt<3>(2), ctrl.ld_type) + node T_1757 = mux(T_1756, T_1749, T_1755) + node T_1758 = eq(UInt<3>(1), ctrl.ld_type) + node load = mux(T_1758, T_1745, T_1757) + inst csr of CSR + host := csr.host + csr.src := ew_alu + node T_1759 = bits(ew_inst, 31, 20) + csr.addr := T_1759 + csr.cmd := ctrl.csr_cmd + node T_1760 = add-wrap(ew_pc, UInt<3>(4)) + node T_1761 = eq(UInt<2>(3), ctrl.wb_sel) + node T_1762 = mux(T_1761, csr.data, ew_alu) + node T_1763 = eq(UInt<2>(2), ctrl.wb_sel) + node T_1764 = mux(T_1763, T_1760, T_1762) + node T_1765 = eq(UInt<2>(1), ctrl.wb_sel) + node regWrite = mux(T_1765, load, T_1764) + regFile.wen := ctrl.wb_en + regFile.waddr := ex_rd_addr + regFile.wdata := regWrite + module Control : + output ctrl : {flip inst : UInt<32>, flip stall : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, pc_sel : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>} + + node T_1766 = bit-and(UInt<7>(127), ctrl.inst) + node T_1767 = eq(T_1766, UInt<6>(55)) + node T_1768 = bit-and(UInt<7>(127), ctrl.inst) + node T_1769 = eq(T_1768, UInt<5>(23)) + node T_1770 = bit-and(UInt<7>(127), ctrl.inst) + node T_1771 = eq(T_1770, UInt<7>(111)) + node T_1772 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1773 = eq(T_1772, UInt<7>(103)) + node T_1774 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1775 = eq(T_1774, UInt<7>(99)) + node T_1776 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1777 = eq(T_1776, UInt<13>(4195)) + node T_1778 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1779 = eq(T_1778, UInt<15>(16483)) + node T_1780 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1781 = eq(T_1780, UInt<15>(20579)) + node T_1782 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1783 = eq(T_1782, UInt<15>(24675)) + node T_1784 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1785 = eq(T_1784, UInt<15>(28771)) + node T_1786 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1787 = eq(T_1786, UInt<2>(3)) + node T_1788 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1789 = eq(T_1788, UInt<13>(4099)) + node T_1790 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1791 = eq(T_1790, UInt<14>(8195)) + node T_1792 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1793 = eq(T_1792, UInt<15>(16387)) + node T_1794 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1795 = eq(T_1794, UInt<15>(20483)) + node T_1796 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1797 = eq(T_1796, UInt<6>(35)) + node T_1798 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1799 = eq(T_1798, UInt<13>(4131)) + node T_1800 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1801 = eq(T_1800, UInt<14>(8227)) + node T_1802 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1803 = eq(T_1802, UInt<5>(19)) + node T_1804 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1805 = eq(T_1804, UInt<14>(8211)) + node T_1806 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1807 = eq(T_1806, UInt<14>(12307)) + node T_1808 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1809 = eq(T_1808, UInt<15>(16403)) + node T_1810 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1811 = eq(T_1810, UInt<15>(24595)) + node T_1812 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1813 = eq(T_1812, UInt<15>(28691)) + node T_1814 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1815 = eq(T_1814, UInt<13>(4115)) + node T_1816 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1817 = eq(T_1816, UInt<15>(20499)) + node T_1818 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1819 = eq(T_1818, UInt<31>(1073762323)) + node T_1820 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1821 = eq(T_1820, UInt<6>(51)) + node T_1822 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1823 = eq(T_1822, UInt<31>(1073741875)) + node T_1824 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1825 = eq(T_1824, UInt<13>(4147)) + node T_1826 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1827 = eq(T_1826, UInt<14>(8243)) + node T_1828 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1829 = eq(T_1828, UInt<14>(12339)) + node T_1830 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1831 = eq(T_1830, UInt<15>(16435)) + node T_1832 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1833 = eq(T_1832, UInt<15>(20531)) + node T_1834 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1835 = eq(T_1834, UInt<31>(1073762355)) + node T_1836 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1837 = eq(T_1836, UInt<15>(24627)) + node T_1838 = bit-and(UInt<32>(4261441663), ctrl.inst) + node T_1839 = eq(T_1838, UInt<15>(28723)) + node T_1840 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1841 = eq(T_1840, UInt<13>(4211)) + node T_1842 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1843 = eq(T_1842, UInt<14>(8307)) + node T_1844 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1845 = eq(T_1844, UInt<14>(12403)) + node T_1846 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1847 = eq(T_1846, UInt<15>(20595)) + node T_1848 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1849 = eq(T_1848, UInt<15>(24691)) + node T_1850 = bit-and(UInt<15>(28799), ctrl.inst) + node T_1851 = eq(T_1850, UInt<15>(28787)) + node T_1852 = mux(T_1851, UInt<1>(0), UInt<1>(0)) + node T_1853 = mux(T_1849, UInt<1>(0), T_1852) + node T_1854 = mux(T_1847, UInt<1>(0), T_1853) + node T_1855 = mux(T_1845, UInt<1>(0), T_1854) + node T_1856 = mux(T_1843, UInt<1>(0), T_1855) + node T_1857 = mux(T_1841, UInt<1>(0), T_1856) + node T_1858 = mux(T_1839, UInt<1>(0), T_1857) + node T_1859 = mux(T_1837, UInt<1>(0), T_1858) + node T_1860 = mux(T_1835, UInt<1>(0), T_1859) + node T_1861 = mux(T_1833, UInt<1>(0), T_1860) + node T_1862 = mux(T_1831, UInt<1>(0), T_1861) + node T_1863 = mux(T_1829, UInt<1>(0), T_1862) + node T_1864 = mux(T_1827, UInt<1>(0), T_1863) + node T_1865 = mux(T_1825, UInt<1>(0), T_1864) + node T_1866 = mux(T_1823, UInt<1>(0), T_1865) + node T_1867 = mux(T_1821, UInt<1>(0), T_1866) + node T_1868 = mux(T_1819, UInt<1>(0), T_1867) + node T_1869 = mux(T_1817, UInt<1>(0), T_1868) + node T_1870 = mux(T_1815, UInt<1>(0), T_1869) + node T_1871 = mux(T_1813, UInt<1>(0), T_1870) + node T_1872 = mux(T_1811, UInt<1>(0), T_1871) + node T_1873 = mux(T_1809, UInt<1>(0), T_1872) + node T_1874 = mux(T_1807, UInt<1>(0), T_1873) + node T_1875 = mux(T_1805, UInt<1>(0), T_1874) + node T_1876 = mux(T_1803, UInt<1>(0), T_1875) + node T_1877 = mux(T_1801, UInt<1>(0), T_1876) + node T_1878 = mux(T_1799, UInt<1>(0), T_1877) + node T_1879 = mux(T_1797, UInt<1>(0), T_1878) + node T_1880 = mux(T_1795, UInt<1>(0), T_1879) + node T_1881 = mux(T_1793, UInt<1>(0), T_1880) + node T_1882 = mux(T_1791, UInt<1>(0), T_1881) + node T_1883 = mux(T_1789, UInt<1>(0), T_1882) + node T_1884 = mux(T_1787, UInt<1>(0), T_1883) + node T_1885 = mux(T_1785, UInt<1>(0), T_1884) + node T_1886 = mux(T_1783, UInt<1>(0), T_1885) + node T_1887 = mux(T_1781, UInt<1>(0), T_1886) + node T_1888 = mux(T_1779, UInt<1>(0), T_1887) + node T_1889 = mux(T_1777, UInt<1>(0), T_1888) + node T_1890 = mux(T_1775, UInt<1>(0), T_1889) + node T_1891 = mux(T_1773, UInt<1>(1), T_1890) + node T_1892 = mux(T_1771, UInt<1>(1), T_1891) + node T_1893 = mux(T_1769, UInt<1>(0), T_1892) + node T_1894 = mux(T_1767, UInt<1>(0), T_1893) + node T_1895 = mux(T_1851, UInt<1>(1), UInt<1>(1)) + node T_1896 = mux(T_1849, UInt<1>(1), T_1895) + node T_1897 = mux(T_1847, UInt<1>(1), T_1896) + node T_1898 = mux(T_1845, UInt<1>(0), T_1897) + node T_1899 = mux(T_1843, UInt<1>(0), T_1898) + node T_1900 = mux(T_1841, UInt<1>(0), T_1899) + node T_1901 = mux(T_1839, UInt<1>(0), T_1900) + node T_1902 = mux(T_1837, UInt<1>(0), T_1901) + node T_1903 = mux(T_1835, UInt<1>(0), T_1902) + node T_1904 = mux(T_1833, UInt<1>(0), T_1903) + node T_1905 = mux(T_1831, UInt<1>(0), T_1904) + node T_1906 = mux(T_1829, UInt<1>(0), T_1905) + node T_1907 = mux(T_1827, UInt<1>(0), T_1906) + node T_1908 = mux(T_1825, UInt<1>(0), T_1907) + node T_1909 = mux(T_1823, UInt<1>(0), T_1908) + node T_1910 = mux(T_1821, UInt<1>(0), T_1909) + node T_1911 = mux(T_1819, UInt<1>(0), T_1910) + node T_1912 = mux(T_1817, UInt<1>(0), T_1911) + node T_1913 = mux(T_1815, UInt<1>(0), T_1912) + node T_1914 = mux(T_1813, UInt<1>(0), T_1913) + node T_1915 = mux(T_1811, UInt<1>(0), T_1914) + node T_1916 = mux(T_1809, UInt<1>(0), T_1915) + node T_1917 = mux(T_1807, UInt<1>(0), T_1916) + node T_1918 = mux(T_1805, UInt<1>(0), T_1917) + node T_1919 = mux(T_1803, UInt<1>(0), T_1918) + node T_1920 = mux(T_1801, UInt<1>(0), T_1919) + node T_1921 = mux(T_1799, UInt<1>(0), T_1920) + node T_1922 = mux(T_1797, UInt<1>(0), T_1921) + node T_1923 = mux(T_1795, UInt<1>(0), T_1922) + node T_1924 = mux(T_1793, UInt<1>(0), T_1923) + node T_1925 = mux(T_1791, UInt<1>(0), T_1924) + node T_1926 = mux(T_1789, UInt<1>(0), T_1925) + node T_1927 = mux(T_1787, UInt<1>(0), T_1926) + node T_1928 = mux(T_1785, UInt<1>(1), T_1927) + node T_1929 = mux(T_1783, UInt<1>(1), T_1928) + node T_1930 = mux(T_1781, UInt<1>(1), T_1929) + node T_1931 = mux(T_1779, UInt<1>(1), T_1930) + node T_1932 = mux(T_1777, UInt<1>(1), T_1931) + node T_1933 = mux(T_1775, UInt<1>(1), T_1932) + node T_1934 = mux(T_1773, UInt<1>(0), T_1933) + node T_1935 = mux(T_1771, UInt<1>(1), T_1934) + node T_1936 = mux(T_1769, UInt<1>(1), T_1935) + node T_1937 = mux(T_1767, UInt<1>(1), T_1936) + node T_1938 = mux(T_1851, UInt<1>(1), UInt<1>(0)) + node T_1939 = mux(T_1849, UInt<1>(1), T_1938) + node T_1940 = mux(T_1847, UInt<1>(1), T_1939) + node T_1941 = mux(T_1845, UInt<1>(0), T_1940) + node T_1942 = mux(T_1843, UInt<1>(0), T_1941) + node T_1943 = mux(T_1841, UInt<1>(0), T_1942) + node T_1944 = mux(T_1839, UInt<1>(0), T_1943) + node T_1945 = mux(T_1837, UInt<1>(0), T_1944) + node T_1946 = mux(T_1835, UInt<1>(0), T_1945) + node T_1947 = mux(T_1833, UInt<1>(0), T_1946) + node T_1948 = mux(T_1831, UInt<1>(0), T_1947) + node T_1949 = mux(T_1829, UInt<1>(0), T_1948) + node T_1950 = mux(T_1827, UInt<1>(0), T_1949) + node T_1951 = mux(T_1825, UInt<1>(0), T_1950) + node T_1952 = mux(T_1823, UInt<1>(0), T_1951) + node T_1953 = mux(T_1821, UInt<1>(0), T_1952) + node T_1954 = mux(T_1819, UInt<1>(1), T_1953) + node T_1955 = mux(T_1817, UInt<1>(1), T_1954) + node T_1956 = mux(T_1815, UInt<1>(1), T_1955) + node T_1957 = mux(T_1813, UInt<1>(1), T_1956) + node T_1958 = mux(T_1811, UInt<1>(1), T_1957) + node T_1959 = mux(T_1809, UInt<1>(1), T_1958) + node T_1960 = mux(T_1807, UInt<1>(1), T_1959) + node T_1961 = mux(T_1805, UInt<1>(1), T_1960) + node T_1962 = mux(T_1803, UInt<1>(1), T_1961) + node T_1963 = mux(T_1801, UInt<1>(1), T_1962) + node T_1964 = mux(T_1799, UInt<1>(1), T_1963) + node T_1965 = mux(T_1797, UInt<1>(1), T_1964) + node T_1966 = mux(T_1795, UInt<1>(1), T_1965) + node T_1967 = mux(T_1793, UInt<1>(1), T_1966) + node T_1968 = mux(T_1791, UInt<1>(1), T_1967) + node T_1969 = mux(T_1789, UInt<1>(1), T_1968) + node T_1970 = mux(T_1787, UInt<1>(1), T_1969) + node T_1971 = mux(T_1785, UInt<1>(1), T_1970) + node T_1972 = mux(T_1783, UInt<1>(1), T_1971) + node T_1973 = mux(T_1781, UInt<1>(1), T_1972) + node T_1974 = mux(T_1779, UInt<1>(1), T_1973) + node T_1975 = mux(T_1777, UInt<1>(1), T_1974) + node T_1976 = mux(T_1775, UInt<1>(1), T_1975) + node T_1977 = mux(T_1773, UInt<1>(1), T_1976) + node T_1978 = mux(T_1771, UInt<1>(1), T_1977) + node T_1979 = mux(T_1769, UInt<1>(1), T_1978) + node T_1980 = mux(T_1767, UInt<1>(1), T_1979) + node T_1981 = mux(T_1851, UInt<3>(5), UInt<3>(7)) + node T_1982 = mux(T_1849, UInt<3>(5), T_1981) + node T_1983 = mux(T_1847, UInt<3>(5), T_1982) + node T_1984 = mux(T_1845, UInt<3>(5), T_1983) + node T_1985 = mux(T_1843, UInt<3>(5), T_1984) + node T_1986 = mux(T_1841, UInt<3>(5), T_1985) + node T_1987 = mux(T_1839, UInt<3>(7), T_1986) + node T_1988 = mux(T_1837, UInt<3>(7), T_1987) + node T_1989 = mux(T_1835, UInt<3>(7), T_1988) + node T_1990 = mux(T_1833, UInt<3>(7), T_1989) + node T_1991 = mux(T_1831, UInt<3>(7), T_1990) + node T_1992 = mux(T_1829, UInt<3>(7), T_1991) + node T_1993 = mux(T_1827, UInt<3>(7), T_1992) + node T_1994 = mux(T_1825, UInt<3>(7), T_1993) + node T_1995 = mux(T_1823, UInt<3>(7), T_1994) + node T_1996 = mux(T_1821, UInt<3>(7), T_1995) + node T_1997 = mux(T_1819, UInt<3>(0), T_1996) + node T_1998 = mux(T_1817, UInt<3>(0), T_1997) + node T_1999 = mux(T_1815, UInt<3>(0), T_1998) + node T_2000 = mux(T_1813, UInt<3>(0), T_1999) + node T_2001 = mux(T_1811, UInt<3>(0), T_2000) + node T_2002 = mux(T_1809, UInt<3>(0), T_2001) + node T_2003 = mux(T_1807, UInt<3>(0), T_2002) + node T_2004 = mux(T_1805, UInt<3>(0), T_2003) + node T_2005 = mux(T_1803, UInt<3>(0), T_2004) + node T_2006 = mux(T_1801, UInt<3>(1), T_2005) + node T_2007 = mux(T_1799, UInt<3>(1), T_2006) + node T_2008 = mux(T_1797, UInt<3>(1), T_2007) + node T_2009 = mux(T_1795, UInt<3>(0), T_2008) + node T_2010 = mux(T_1793, UInt<3>(0), T_2009) + node T_2011 = mux(T_1791, UInt<3>(0), T_2010) + node T_2012 = mux(T_1789, UInt<3>(0), T_2011) + node T_2013 = mux(T_1787, UInt<3>(0), T_2012) + node T_2014 = mux(T_1785, UInt<3>(4), T_2013) + node T_2015 = mux(T_1783, UInt<3>(4), T_2014) + node T_2016 = mux(T_1781, UInt<3>(4), T_2015) + node T_2017 = mux(T_1779, UInt<3>(4), T_2016) + node T_2018 = mux(T_1777, UInt<3>(4), T_2017) + node T_2019 = mux(T_1775, UInt<3>(4), T_2018) + node T_2020 = mux(T_1773, UInt<3>(0), T_2019) + node T_2021 = mux(T_1771, UInt<3>(3), T_2020) + node T_2022 = mux(T_1769, UInt<3>(2), T_2021) + node T_2023 = mux(T_1767, UInt<3>(2), T_2022) + node T_2024 = mux(T_1851, UInt<4>(11), UInt<4>(15)) + node T_2025 = mux(T_1849, UInt<4>(11), T_2024) + node T_2026 = mux(T_1847, UInt<4>(11), T_2025) + node T_2027 = mux(T_1845, UInt<4>(10), T_2026) + node T_2028 = mux(T_1843, UInt<4>(10), T_2027) + node T_2029 = mux(T_1841, UInt<4>(10), T_2028) + node T_2030 = mux(T_1839, UInt<4>(2), T_2029) + node T_2031 = mux(T_1837, UInt<4>(3), T_2030) + node T_2032 = mux(T_1835, UInt<4>(9), T_2031) + node T_2033 = mux(T_1833, UInt<4>(8), T_2032) + node T_2034 = mux(T_1831, UInt<4>(4), T_2033) + node T_2035 = mux(T_1829, UInt<4>(7), T_2034) + node T_2036 = mux(T_1827, UInt<4>(5), T_2035) + node T_2037 = mux(T_1825, UInt<4>(6), T_2036) + node T_2038 = mux(T_1823, UInt<4>(1), T_2037) + node T_2039 = mux(T_1821, UInt<4>(0), T_2038) + node T_2040 = mux(T_1819, UInt<4>(9), T_2039) + node T_2041 = mux(T_1817, UInt<4>(8), T_2040) + node T_2042 = mux(T_1815, UInt<4>(6), T_2041) + node T_2043 = mux(T_1813, UInt<4>(2), T_2042) + node T_2044 = mux(T_1811, UInt<4>(3), T_2043) + node T_2045 = mux(T_1809, UInt<4>(4), T_2044) + node T_2046 = mux(T_1807, UInt<4>(7), T_2045) + node T_2047 = mux(T_1805, UInt<4>(5), T_2046) + node T_2048 = mux(T_1803, UInt<4>(0), T_2047) + node T_2049 = mux(T_1801, UInt<4>(0), T_2048) + node T_2050 = mux(T_1799, UInt<4>(0), T_2049) + node T_2051 = mux(T_1797, UInt<4>(0), T_2050) + node T_2052 = mux(T_1795, UInt<4>(0), T_2051) + node T_2053 = mux(T_1793, UInt<4>(0), T_2052) + node T_2054 = mux(T_1791, UInt<4>(0), T_2053) + node T_2055 = mux(T_1789, UInt<4>(0), T_2054) + node T_2056 = mux(T_1787, UInt<4>(0), T_2055) + node T_2057 = mux(T_1785, UInt<4>(0), T_2056) + node T_2058 = mux(T_1783, UInt<4>(0), T_2057) + node T_2059 = mux(T_1781, UInt<4>(0), T_2058) + node T_2060 = mux(T_1779, UInt<4>(0), T_2059) + node T_2061 = mux(T_1777, UInt<4>(0), T_2060) + node T_2062 = mux(T_1775, UInt<4>(0), T_2061) + node T_2063 = mux(T_1773, UInt<4>(0), T_2062) + node T_2064 = mux(T_1771, UInt<4>(0), T_2063) + node T_2065 = mux(T_1769, UInt<4>(0), T_2064) + node T_2066 = mux(T_1767, UInt<4>(11), T_2065) + node T_2067 = mux(T_1851, UInt<3>(7), UInt<3>(7)) + node T_2068 = mux(T_1849, UInt<3>(7), T_2067) + node T_2069 = mux(T_1847, UInt<3>(7), T_2068) + node T_2070 = mux(T_1845, UInt<3>(7), T_2069) + node T_2071 = mux(T_1843, UInt<3>(7), T_2070) + node T_2072 = mux(T_1841, UInt<3>(7), T_2071) + node T_2073 = mux(T_1839, UInt<3>(7), T_2072) + node T_2074 = mux(T_1837, UInt<3>(7), T_2073) + node T_2075 = mux(T_1835, UInt<3>(7), T_2074) + node T_2076 = mux(T_1833, UInt<3>(7), T_2075) + node T_2077 = mux(T_1831, UInt<3>(7), T_2076) + node T_2078 = mux(T_1829, UInt<3>(7), T_2077) + node T_2079 = mux(T_1827, UInt<3>(7), T_2078) + node T_2080 = mux(T_1825, UInt<3>(7), T_2079) + node T_2081 = mux(T_1823, UInt<3>(7), T_2080) + node T_2082 = mux(T_1821, UInt<3>(7), T_2081) + node T_2083 = mux(T_1819, UInt<3>(7), T_2082) + node T_2084 = mux(T_1817, UInt<3>(7), T_2083) + node T_2085 = mux(T_1815, UInt<3>(7), T_2084) + node T_2086 = mux(T_1813, UInt<3>(7), T_2085) + node T_2087 = mux(T_1811, UInt<3>(7), T_2086) + node T_2088 = mux(T_1809, UInt<3>(7), T_2087) + node T_2089 = mux(T_1807, UInt<3>(7), T_2088) + node T_2090 = mux(T_1805, UInt<3>(7), T_2089) + node T_2091 = mux(T_1803, UInt<3>(7), T_2090) + node T_2092 = mux(T_1801, UInt<3>(7), T_2091) + node T_2093 = mux(T_1799, UInt<3>(7), T_2092) + node T_2094 = mux(T_1797, UInt<3>(7), T_2093) + node T_2095 = mux(T_1795, UInt<3>(7), T_2094) + node T_2096 = mux(T_1793, UInt<3>(7), T_2095) + node T_2097 = mux(T_1791, UInt<3>(7), T_2096) + node T_2098 = mux(T_1789, UInt<3>(7), T_2097) + node T_2099 = mux(T_1787, UInt<3>(7), T_2098) + node T_2100 = mux(T_1785, UInt<3>(4), T_2099) + node T_2101 = mux(T_1783, UInt<3>(0), T_2100) + node T_2102 = mux(T_1781, UInt<3>(5), T_2101) + node T_2103 = mux(T_1779, UInt<3>(1), T_2102) + node T_2104 = mux(T_1777, UInt<3>(6), T_2103) + node T_2105 = mux(T_1775, UInt<3>(2), T_2104) + node T_2106 = mux(T_1773, UInt<3>(7), T_2105) + node T_2107 = mux(T_1771, UInt<3>(7), T_2106) + node T_2108 = mux(T_1769, UInt<3>(7), T_2107) + node T_2109 = mux(T_1767, UInt<3>(7), T_2108) + node T_2110 = mux(T_1851, UInt<1>(0), UInt<1>(0)) + node T_2111 = mux(T_1849, UInt<1>(0), T_2110) + node T_2112 = mux(T_1847, UInt<1>(0), T_2111) + node T_2113 = mux(T_1845, UInt<1>(0), T_2112) + node T_2114 = mux(T_1843, UInt<1>(0), T_2113) + node T_2115 = mux(T_1841, UInt<1>(0), T_2114) + node T_2116 = mux(T_1839, UInt<1>(0), T_2115) + node T_2117 = mux(T_1837, UInt<1>(0), T_2116) + node T_2118 = mux(T_1835, UInt<1>(0), T_2117) + node T_2119 = mux(T_1833, UInt<1>(0), T_2118) + node T_2120 = mux(T_1831, UInt<1>(0), T_2119) + node T_2121 = mux(T_1829, UInt<1>(0), T_2120) + node T_2122 = mux(T_1827, UInt<1>(0), T_2121) + node T_2123 = mux(T_1825, UInt<1>(0), T_2122) + node T_2124 = mux(T_1823, UInt<1>(0), T_2123) + node T_2125 = mux(T_1821, UInt<1>(0), T_2124) + node T_2126 = mux(T_1819, UInt<1>(0), T_2125) + node T_2127 = mux(T_1817, UInt<1>(0), T_2126) + node T_2128 = mux(T_1815, UInt<1>(0), T_2127) + node T_2129 = mux(T_1813, UInt<1>(0), T_2128) + node T_2130 = mux(T_1811, UInt<1>(0), T_2129) + node T_2131 = mux(T_1809, UInt<1>(0), T_2130) + node T_2132 = mux(T_1807, UInt<1>(0), T_2131) + node T_2133 = mux(T_1805, UInt<1>(0), T_2132) + node T_2134 = mux(T_1803, UInt<1>(0), T_2133) + node T_2135 = mux(T_1801, UInt<1>(0), T_2134) + node T_2136 = mux(T_1799, UInt<1>(0), T_2135) + node T_2137 = mux(T_1797, UInt<1>(0), T_2136) + node T_2138 = mux(T_1795, UInt<1>(0), T_2137) + node T_2139 = mux(T_1793, UInt<1>(0), T_2138) + node T_2140 = mux(T_1791, UInt<1>(0), T_2139) + node T_2141 = mux(T_1789, UInt<1>(0), T_2140) + node T_2142 = mux(T_1787, UInt<1>(0), T_2141) + node T_2143 = mux(T_1785, UInt<1>(0), T_2142) + node T_2144 = mux(T_1783, UInt<1>(0), T_2143) + node T_2145 = mux(T_1781, UInt<1>(0), T_2144) + node T_2146 = mux(T_1779, UInt<1>(0), T_2145) + node T_2147 = mux(T_1777, UInt<1>(0), T_2146) + node T_2148 = mux(T_1775, UInt<1>(0), T_2147) + node T_2149 = mux(T_1773, UInt<1>(1), T_2148) + node T_2150 = mux(T_1771, UInt<1>(1), T_2149) + node T_2151 = mux(T_1769, UInt<1>(0), T_2150) + node T_2152 = mux(T_1767, UInt<1>(0), T_2151) + node T_2153 = mux(T_1851, UInt<2>(3), UInt<2>(3)) + node T_2154 = mux(T_1849, UInt<2>(3), T_2153) + node T_2155 = mux(T_1847, UInt<2>(3), T_2154) + node T_2156 = mux(T_1845, UInt<2>(3), T_2155) + node T_2157 = mux(T_1843, UInt<2>(3), T_2156) + node T_2158 = mux(T_1841, UInt<2>(3), T_2157) + node T_2159 = mux(T_1839, UInt<2>(3), T_2158) + node T_2160 = mux(T_1837, UInt<2>(3), T_2159) + node T_2161 = mux(T_1835, UInt<2>(3), T_2160) + node T_2162 = mux(T_1833, UInt<2>(3), T_2161) + node T_2163 = mux(T_1831, UInt<2>(3), T_2162) + node T_2164 = mux(T_1829, UInt<2>(3), T_2163) + node T_2165 = mux(T_1827, UInt<2>(3), T_2164) + node T_2166 = mux(T_1825, UInt<2>(3), T_2165) + node T_2167 = mux(T_1823, UInt<2>(3), T_2166) + node T_2168 = mux(T_1821, UInt<2>(3), T_2167) + node T_2169 = mux(T_1819, UInt<2>(3), T_2168) + node T_2170 = mux(T_1817, UInt<2>(3), T_2169) + node T_2171 = mux(T_1815, UInt<2>(3), T_2170) + node T_2172 = mux(T_1813, UInt<2>(3), T_2171) + node T_2173 = mux(T_1811, UInt<2>(3), T_2172) + node T_2174 = mux(T_1809, UInt<2>(3), T_2173) + node T_2175 = mux(T_1807, UInt<2>(3), T_2174) + node T_2176 = mux(T_1805, UInt<2>(3), T_2175) + node T_2177 = mux(T_1803, UInt<2>(3), T_2176) + node T_2178 = mux(T_1801, UInt<2>(0), T_2177) + node T_2179 = mux(T_1799, UInt<2>(1), T_2178) + node T_2180 = mux(T_1797, UInt<2>(2), T_2179) + node T_2181 = mux(T_1795, UInt<2>(3), T_2180) + node T_2182 = mux(T_1793, UInt<2>(3), T_2181) + node T_2183 = mux(T_1791, UInt<2>(3), T_2182) + node T_2184 = mux(T_1789, UInt<2>(3), T_2183) + node T_2185 = mux(T_1787, UInt<2>(3), T_2184) + node T_2186 = mux(T_1785, UInt<2>(3), T_2185) + node T_2187 = mux(T_1783, UInt<2>(3), T_2186) + node T_2188 = mux(T_1781, UInt<2>(3), T_2187) + node T_2189 = mux(T_1779, UInt<2>(3), T_2188) + node T_2190 = mux(T_1777, UInt<2>(3), T_2189) + node T_2191 = mux(T_1775, UInt<2>(3), T_2190) + node T_2192 = mux(T_1773, UInt<2>(3), T_2191) + node T_2193 = mux(T_1771, UInt<2>(3), T_2192) + node T_2194 = mux(T_1769, UInt<2>(3), T_2193) + node T_2195 = mux(T_1767, UInt<2>(3), T_2194) + node T_2196 = mux(T_1851, UInt<3>(7), UInt<3>(7)) + node T_2197 = mux(T_1849, UInt<3>(7), T_2196) + node T_2198 = mux(T_1847, UInt<3>(7), T_2197) + node T_2199 = mux(T_1845, UInt<3>(7), T_2198) + node T_2200 = mux(T_1843, UInt<3>(7), T_2199) + node T_2201 = mux(T_1841, UInt<3>(7), T_2200) + node T_2202 = mux(T_1839, UInt<3>(7), T_2201) + node T_2203 = mux(T_1837, UInt<3>(7), T_2202) + node T_2204 = mux(T_1835, UInt<3>(7), T_2203) + node T_2205 = mux(T_1833, UInt<3>(7), T_2204) + node T_2206 = mux(T_1831, UInt<3>(7), T_2205) + node T_2207 = mux(T_1829, UInt<3>(7), T_2206) + node T_2208 = mux(T_1827, UInt<3>(7), T_2207) + node T_2209 = mux(T_1825, UInt<3>(7), T_2208) + node T_2210 = mux(T_1823, UInt<3>(7), T_2209) + node T_2211 = mux(T_1821, UInt<3>(7), T_2210) + node T_2212 = mux(T_1819, UInt<3>(7), T_2211) + node T_2213 = mux(T_1817, UInt<3>(7), T_2212) + node T_2214 = mux(T_1815, UInt<3>(7), T_2213) + node T_2215 = mux(T_1813, UInt<3>(7), T_2214) + node T_2216 = mux(T_1811, UInt<3>(7), T_2215) + node T_2217 = mux(T_1809, UInt<3>(7), T_2216) + node T_2218 = mux(T_1807, UInt<3>(7), T_2217) + node T_2219 = mux(T_1805, UInt<3>(7), T_2218) + node T_2220 = mux(T_1803, UInt<3>(7), T_2219) + node T_2221 = mux(T_1801, UInt<3>(7), T_2220) + node T_2222 = mux(T_1799, UInt<3>(7), T_2221) + node T_2223 = mux(T_1797, UInt<3>(7), T_2222) + node T_2224 = mux(T_1795, UInt<3>(3), T_2223) + node T_2225 = mux(T_1793, UInt<3>(4), T_2224) + node T_2226 = mux(T_1791, UInt<3>(0), T_2225) + node T_2227 = mux(T_1789, UInt<3>(1), T_2226) + node T_2228 = mux(T_1787, UInt<3>(2), T_2227) + node T_2229 = mux(T_1785, UInt<3>(7), T_2228) + node T_2230 = mux(T_1783, UInt<3>(7), T_2229) + node T_2231 = mux(T_1781, UInt<3>(7), T_2230) + node T_2232 = mux(T_1779, UInt<3>(7), T_2231) + node T_2233 = mux(T_1777, UInt<3>(7), T_2232) + node T_2234 = mux(T_1775, UInt<3>(7), T_2233) + node T_2235 = mux(T_1773, UInt<3>(7), T_2234) + node T_2236 = mux(T_1771, UInt<3>(7), T_2235) + node T_2237 = mux(T_1769, UInt<3>(7), T_2236) + node T_2238 = mux(T_1767, UInt<3>(7), T_2237) + node T_2239 = mux(T_1851, UInt<2>(3), UInt<2>(0)) + node T_2240 = mux(T_1849, UInt<2>(3), T_2239) + node T_2241 = mux(T_1847, UInt<2>(3), T_2240) + node T_2242 = mux(T_1845, UInt<2>(3), T_2241) + node T_2243 = mux(T_1843, UInt<2>(3), T_2242) + node T_2244 = mux(T_1841, UInt<2>(3), T_2243) + node T_2245 = mux(T_1839, UInt<2>(0), T_2244) + node T_2246 = mux(T_1837, UInt<2>(0), T_2245) + node T_2247 = mux(T_1835, UInt<2>(0), T_2246) + node T_2248 = mux(T_1833, UInt<2>(0), T_2247) + node T_2249 = mux(T_1831, UInt<2>(0), T_2248) + node T_2250 = mux(T_1829, UInt<2>(0), T_2249) + node T_2251 = mux(T_1827, UInt<2>(0), T_2250) + node T_2252 = mux(T_1825, UInt<2>(0), T_2251) + node T_2253 = mux(T_1823, UInt<2>(0), T_2252) + node T_2254 = mux(T_1821, UInt<2>(0), T_2253) + node T_2255 = mux(T_1819, UInt<2>(0), T_2254) + node T_2256 = mux(T_1817, UInt<2>(0), T_2255) + node T_2257 = mux(T_1815, UInt<2>(0), T_2256) + node T_2258 = mux(T_1813, UInt<2>(0), T_2257) + node T_2259 = mux(T_1811, UInt<2>(0), T_2258) + node T_2260 = mux(T_1809, UInt<2>(0), T_2259) + node T_2261 = mux(T_1807, UInt<2>(0), T_2260) + node T_2262 = mux(T_1805, UInt<2>(0), T_2261) + node T_2263 = mux(T_1803, UInt<2>(0), T_2262) + node T_2264 = mux(T_1801, UInt<2>(0), T_2263) + node T_2265 = mux(T_1799, UInt<2>(0), T_2264) + node T_2266 = mux(T_1797, UInt<2>(0), T_2265) + node T_2267 = mux(T_1795, UInt<2>(1), T_2266) + node T_2268 = mux(T_1793, UInt<2>(1), T_2267) + node T_2269 = mux(T_1791, UInt<2>(1), T_2268) + node T_2270 = mux(T_1789, UInt<2>(1), T_2269) + node T_2271 = mux(T_1787, UInt<2>(1), T_2270) + node T_2272 = mux(T_1785, UInt<2>(0), T_2271) + node T_2273 = mux(T_1783, UInt<2>(0), T_2272) + node T_2274 = mux(T_1781, UInt<2>(0), T_2273) + node T_2275 = mux(T_1779, UInt<2>(0), T_2274) + node T_2276 = mux(T_1777, UInt<2>(0), T_2275) + node T_2277 = mux(T_1775, UInt<2>(0), T_2276) + node T_2278 = mux(T_1773, UInt<2>(2), T_2277) + node T_2279 = mux(T_1771, UInt<2>(2), T_2278) + node T_2280 = mux(T_1769, UInt<2>(0), T_2279) + node T_2281 = mux(T_1767, UInt<2>(0), T_2280) + node T_2282 = mux(T_1851, UInt<1>(0), UInt<1>(0)) + node T_2283 = mux(T_1849, UInt<1>(0), T_2282) + node T_2284 = mux(T_1847, UInt<1>(0), T_2283) + node T_2285 = mux(T_1845, UInt<1>(0), T_2284) + node T_2286 = mux(T_1843, UInt<1>(0), T_2285) + node T_2287 = mux(T_1841, UInt<1>(0), T_2286) + node T_2288 = mux(T_1839, UInt<1>(1), T_2287) + node T_2289 = mux(T_1837, UInt<1>(1), T_2288) + node T_2290 = mux(T_1835, UInt<1>(1), T_2289) + node T_2291 = mux(T_1833, UInt<1>(1), T_2290) + node T_2292 = mux(T_1831, UInt<1>(1), T_2291) + node T_2293 = mux(T_1829, UInt<1>(1), T_2292) + node T_2294 = mux(T_1827, UInt<1>(1), T_2293) + node T_2295 = mux(T_1825, UInt<1>(1), T_2294) + node T_2296 = mux(T_1823, UInt<1>(1), T_2295) + node T_2297 = mux(T_1821, UInt<1>(1), T_2296) + node T_2298 = mux(T_1819, UInt<1>(1), T_2297) + node T_2299 = mux(T_1817, UInt<1>(1), T_2298) + node T_2300 = mux(T_1815, UInt<1>(1), T_2299) + node T_2301 = mux(T_1813, UInt<1>(1), T_2300) + node T_2302 = mux(T_1811, UInt<1>(1), T_2301) + node T_2303 = mux(T_1809, UInt<1>(1), T_2302) + node T_2304 = mux(T_1807, UInt<1>(1), T_2303) + node T_2305 = mux(T_1805, UInt<1>(1), T_2304) + node T_2306 = mux(T_1803, UInt<1>(1), T_2305) + node T_2307 = mux(T_1801, UInt<1>(0), T_2306) + node T_2308 = mux(T_1799, UInt<1>(0), T_2307) + node T_2309 = mux(T_1797, UInt<1>(0), T_2308) + node T_2310 = mux(T_1795, UInt<1>(1), T_2309) + node T_2311 = mux(T_1793, UInt<1>(1), T_2310) + node T_2312 = mux(T_1791, UInt<1>(1), T_2311) + node T_2313 = mux(T_1789, UInt<1>(1), T_2312) + node T_2314 = mux(T_1787, UInt<1>(1), T_2313) + node T_2315 = mux(T_1785, UInt<1>(0), T_2314) + node T_2316 = mux(T_1783, UInt<1>(0), T_2315) + node T_2317 = mux(T_1781, UInt<1>(0), T_2316) + node T_2318 = mux(T_1779, UInt<1>(0), T_2317) + node T_2319 = mux(T_1777, UInt<1>(0), T_2318) + node T_2320 = mux(T_1775, UInt<1>(0), T_2319) + node T_2321 = mux(T_1773, UInt<1>(1), T_2320) + node T_2322 = mux(T_1771, UInt<1>(1), T_2321) + node T_2323 = mux(T_1769, UInt<1>(1), T_2322) + node T_2324 = mux(T_1767, UInt<1>(1), T_2323) + node T_2325 = mux(T_1851, UInt<2>(3), UInt<2>(0)) + node T_2326 = mux(T_1849, UInt<2>(2), T_2325) + node T_2327 = mux(T_1847, UInt<2>(1), T_2326) + node T_2328 = mux(T_1845, UInt<2>(3), T_2327) + node T_2329 = mux(T_1843, UInt<2>(2), T_2328) + node T_2330 = mux(T_1841, UInt<2>(1), T_2329) + node T_2331 = mux(T_1839, UInt<2>(0), T_2330) + node T_2332 = mux(T_1837, UInt<2>(0), T_2331) + node T_2333 = mux(T_1835, UInt<2>(0), T_2332) + node T_2334 = mux(T_1833, UInt<2>(0), T_2333) + node T_2335 = mux(T_1831, UInt<2>(0), T_2334) + node T_2336 = mux(T_1829, UInt<2>(0), T_2335) + node T_2337 = mux(T_1827, UInt<2>(0), T_2336) + node T_2338 = mux(T_1825, UInt<2>(0), T_2337) + node T_2339 = mux(T_1823, UInt<2>(0), T_2338) + node T_2340 = mux(T_1821, UInt<2>(0), T_2339) + node T_2341 = mux(T_1819, UInt<2>(0), T_2340) + node T_2342 = mux(T_1817, UInt<2>(0), T_2341) + node T_2343 = mux(T_1815, UInt<2>(0), T_2342) + node T_2344 = mux(T_1813, UInt<2>(0), T_2343) + node T_2345 = mux(T_1811, UInt<2>(0), T_2344) + node T_2346 = mux(T_1809, UInt<2>(0), T_2345) + node T_2347 = mux(T_1807, UInt<2>(0), T_2346) + node T_2348 = mux(T_1805, UInt<2>(0), T_2347) + node T_2349 = mux(T_1803, UInt<2>(0), T_2348) + node T_2350 = mux(T_1801, UInt<2>(0), T_2349) + node T_2351 = mux(T_1799, UInt<2>(0), T_2350) + node T_2352 = mux(T_1797, UInt<2>(0), T_2351) + node T_2353 = mux(T_1795, UInt<2>(0), T_2352) + node T_2354 = mux(T_1793, UInt<2>(0), T_2353) + node T_2355 = mux(T_1791, UInt<2>(0), T_2354) + node T_2356 = mux(T_1789, UInt<2>(0), T_2355) + node T_2357 = mux(T_1787, UInt<2>(0), T_2356) + node T_2358 = mux(T_1785, UInt<2>(0), T_2357) + node T_2359 = mux(T_1783, UInt<2>(0), T_2358) + node T_2360 = mux(T_1781, UInt<2>(0), T_2359) + node T_2361 = mux(T_1779, UInt<2>(0), T_2360) + node T_2362 = mux(T_1777, UInt<2>(0), T_2361) + node T_2363 = mux(T_1775, UInt<2>(0), T_2362) + node T_2364 = mux(T_1773, UInt<2>(0), T_2363) + node T_2365 = mux(T_1771, UInt<2>(0), T_2364) + node T_2366 = mux(T_1769, UInt<2>(0), T_2365) + node T_2367 = mux(T_1767, UInt<2>(0), T_2366) + node rs1_addr = bits(ctrl.inst, 19, 15) + node rs2_addr = bits(ctrl.inst, 24, 20) + reg st_type : UInt<2> + reg ld_type : UInt<3> + reg wb_sel : UInt<2> + node T_2368 = bit(T_2324, 0) + reg wb_en : UInt<1> + reg csr_cmd : UInt<2> + ctrl.pc_sel := T_1894 + node T_2369 = bit-not(ctrl.stall) + node T_2370 = bit-not(ctrl.data_re) + node T_2371 = bit-and(T_2369, T_2370) + ctrl.inst_re := T_2371 + node T_2372 = neq(T_2238, UInt<3>(7)) + node T_2373 = bit(T_2152, 0) + node T_2374 = bit-or(T_2372, T_2373) + node T_2375 = mux(T_2374, UInt<1>(1), UInt<1>(0)) + ctrl.inst_type := T_2375 + ctrl.A_sel := T_1937 + ctrl.B_sel := T_1980 + ctrl.imm_sel := T_2023 + ctrl.alu_op := T_2066 + ctrl.br_type := T_2109 + ctrl.st_type := T_2195 + node T_2376 = bit-not(ctrl.stall) + when T_2376 : + st_type := ctrl.st_type + ld_type := T_2238 + wb_sel := T_2281 + node T_2377 = bit(T_2324, 0) + wb_en := T_2377 + csr_cmd := T_2367 + node T_2378 = neq(ctrl.ld_type, UInt<3>(7)) + node T_2379 = neq(T_2238, UInt<3>(7)) + node T_2380 = mux(ctrl.stall, T_2378, T_2379) + ctrl.data_re := T_2380 + ctrl.ld_type := ld_type + ctrl.wb_en := wb_en + ctrl.wb_sel := wb_sel + ctrl.csr_cmd := csr_cmd + module Core : + output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} + input stall : UInt<1> + output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} + output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} + + inst dpath of Datapath + inst ctrl of Control + host := dpath.host + icache := dpath.icache + dcache := dpath.dcache + dpath.ctrl := ctrl.ctrl + dpath.stall := stall + module Queue : + output count : UInt<3> + input enq : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}} + output deq : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}} + + mem ram : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}[4] + reg T_2381 : UInt<2> + on-reset T_2381 := UInt<2>(0) + reg T_2382 : UInt<2> + on-reset T_2382 := UInt<2>(0) + reg maybe_full : UInt<1> + on-reset maybe_full := UInt<1>(0) + node ptr_match = eq(T_2381, T_2382) + node T_2383 = bit-not(maybe_full) + node empty = bit-and(ptr_match, T_2383) + node full = bit-and(ptr_match, maybe_full) + node maybe_flow = bit-and(UInt<1>(0), empty) + node do_flow = bit-and(maybe_flow, deq.ready) + node T_2384 = bit-and(enq.ready, enq.valid) + node T_2385 = bit-not(do_flow) + node do_enq = bit-and(T_2384, T_2385) + node T_2386 = bit-and(deq.ready, deq.valid) + node T_2387 = bit-not(do_flow) + node do_deq = bit-and(T_2386, T_2387) + when do_enq : + accessor T_2388 = ram[T_2381] + T_2388 := enq.bits + node T_2389 = eq(T_2381, UInt<2>(3)) + node T_2390 = bit-and(UInt<1>(0), T_2389) + node T_2391 = add-wrap(T_2381, UInt<1>(1)) + node T_2392 = mux(T_2390, UInt<1>(0), T_2391) + T_2381 := T_2392 + when do_deq : + node T_2393 = eq(T_2382, UInt<2>(3)) + node T_2394 = bit-and(UInt<1>(0), T_2393) + node T_2395 = add-wrap(T_2382, UInt<1>(1)) + node T_2396 = mux(T_2394, UInt<1>(0), T_2395) + T_2382 := T_2396 + node T_2397 = neq(do_enq, do_deq) + when T_2397 : maybe_full := do_enq + node T_2398 = bit-not(empty) + node T_2399 = bit-and(UInt<1>(0), enq.valid) + node T_2400 = bit-or(T_2398, T_2399) + deq.valid := T_2400 + node T_2401 = bit-not(full) + node T_2402 = bit-and(UInt<1>(0), deq.ready) + node T_2403 = bit-or(T_2401, T_2402) + enq.ready := T_2403 + accessor T_2404 = ram[T_2382] + wire T_2405 : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>} + node T_2406 = mux(maybe_flow, enq.bits.mask, T_2404.mask) + T_2405.mask := T_2406 + node T_2407 = mux(maybe_flow, enq.bits.tag, T_2404.tag) + T_2405.tag := T_2407 + node T_2408 = mux(maybe_flow, enq.bits.rw, T_2404.rw) + T_2405.rw := T_2408 + node T_2409 = mux(maybe_flow, enq.bits.addr, T_2404.addr) + T_2405.addr := T_2409 + deq.bits := T_2405 + node ptr_diff = sub-wrap(T_2381, T_2382) + node T_2410 = bit-and(maybe_full, ptr_match) + node T_2411 = cat(T_2410, ptr_diff) + count := T_2411 + module Queue_1490 : + output count : UInt<3> + input enq : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}} + output deq : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}} + + mem ram : {data : UInt<32>}[4] + reg T_2412 : UInt<2> + on-reset T_2412 := UInt<2>(0) + reg T_2413 : UInt<2> + on-reset T_2413 := UInt<2>(0) + reg maybe_full : UInt<1> + on-reset maybe_full := UInt<1>(0) + node ptr_match = eq(T_2412, T_2413) + node T_2414 = bit-not(maybe_full) + node empty = bit-and(ptr_match, T_2414) + node full = bit-and(ptr_match, maybe_full) + node maybe_flow = bit-and(UInt<1>(0), empty) + node do_flow = bit-and(maybe_flow, deq.ready) + node T_2415 = bit-and(enq.ready, enq.valid) + node T_2416 = bit-not(do_flow) + node do_enq = bit-and(T_2415, T_2416) + node T_2417 = bit-and(deq.ready, deq.valid) + node T_2418 = bit-not(do_flow) + node do_deq = bit-and(T_2417, T_2418) + when do_enq : + accessor T_2419 = ram[T_2412] + T_2419 := enq.bits + node T_2420 = eq(T_2412, UInt<2>(3)) + node T_2421 = bit-and(UInt<1>(0), T_2420) + node T_2422 = add-wrap(T_2412, UInt<1>(1)) + node T_2423 = mux(T_2421, UInt<1>(0), T_2422) + T_2412 := T_2423 + when do_deq : + node T_2424 = eq(T_2413, UInt<2>(3)) + node T_2425 = bit-and(UInt<1>(0), T_2424) + node T_2426 = add-wrap(T_2413, UInt<1>(1)) + node T_2427 = mux(T_2425, UInt<1>(0), T_2426) + T_2413 := T_2427 + node T_2428 = neq(do_enq, do_deq) + when T_2428 : maybe_full := do_enq + node T_2429 = bit-not(empty) + node T_2430 = bit-and(UInt<1>(0), enq.valid) + node T_2431 = bit-or(T_2429, T_2430) + deq.valid := T_2431 + node T_2432 = bit-not(full) + node T_2433 = bit-and(UInt<1>(0), deq.ready) + node T_2434 = bit-or(T_2432, T_2433) + enq.ready := T_2434 + accessor T_2435 = ram[T_2413] + wire T_2436 : {data : UInt<32>} + node T_2437 = mux(maybe_flow, enq.bits.data, T_2435.data) + T_2436.data := T_2437 + deq.bits := T_2436 + node ptr_diff = sub-wrap(T_2412, T_2413) + node T_2438 = bit-and(maybe_full, ptr_match) + node T_2439 = cat(T_2438, ptr_diff) + count := T_2439 + module Memory : + output memory : {req_cmd : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}}, req_data : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}}, flip resp : {valid : UInt<1>, flip ready : UInt<1>, bits : {tag : UInt<5>, data : UInt<32>}}} + output stall : UInt<1> + input icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} + input dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} + + inst memReqCmdQueue of Queue + inst memReqDataQueue of Queue_1490 + reg state : UInt<1> + on-reset state := UInt<1>(0) + reg tag : UInt<5> + on-reset tag := UInt<5>(0) + node T_2440 = eq(state, UInt<1>(0)) + node T_2441 = bit-or(icache.re, dcache.re) + node T_2442 = eq(dcache.we, UInt<1>(0)) + node T_2443 = bit-not(T_2442) + node T_2444 = bit-or(T_2441, T_2443) + node cpuReq = bit-and(T_2440, T_2444) + node T_2445 = bits(icache.addr, 31, 2) + node iaddr = cat(T_2445, UInt<2>(0)) + node T_2446 = bits(dcache.addr, 31, 2) + node daddr = cat(T_2446, UInt<2>(0)) + reg idata : UInt + reg ddata : UInt + reg ire : UInt<1> + reg dre : UInt<1> + icache.dout := idata + dcache.dout := ddata + memory.req_cmd := memReqCmdQueue.deq + memory.req_data := memReqDataQueue.deq + memory.resp.ready := UInt<1>(0) + node T_2447 = eq(state, UInt<1>(1)) + node T_2448 = bit-not(memReqCmdQueue.enq.ready) + node T_2449 = bit-or(T_2447, T_2448) + node T_2450 = bit-not(memReqDataQueue.enq.ready) + node T_2451 = bit-or(T_2449, T_2450) + stall := T_2451 + node T_2452 = eq(dcache.we, UInt<1>(0)) + node T_2453 = bit-not(T_2452) + memReqCmdQueue.enq.bits.rw := T_2453 + memReqCmdQueue.enq.bits.tag := tag + node T_2454 = eq(dcache.we, UInt<1>(0)) + node T_2455 = bit-not(T_2454) + node T_2456 = bit-not(icache.re) + node T_2457 = bit-or(T_2455, T_2456) + node T_2458 = mux(T_2457, daddr, iaddr) + memReqCmdQueue.enq.bits.addr := T_2458 + memReqCmdQueue.enq.bits.mask := dcache.we + node T_2459 = bit-and(memReqDataQueue.enq.ready, cpuReq) + memReqCmdQueue.enq.valid := T_2459 + memReqDataQueue.enq.bits.data := dcache.din + node T_2460 = bit-and(memReqCmdQueue.enq.ready, cpuReq) + node T_2461 = eq(dcache.we, UInt<1>(0)) + node T_2462 = bit-not(T_2461) + node T_2463 = bit-and(T_2460, T_2462) + memReqDataQueue.enq.valid := T_2463 + node T_2464 = eq(UInt<1>(0), state) + when T_2464 : + node T_2465 = bit-or(icache.re, dcache.re) + node T_2466 = eq(dcache.we, UInt<1>(0)) + node T_2467 = bit-not(T_2466) + node T_2468 = bit-not(T_2467) + node T_2469 = bit-and(T_2465, T_2468) + node T_2470 = bit-and(T_2469, memReqCmdQueue.enq.ready) + when T_2470 : + ire := icache.re + dre := dcache.re + state := UInt<1>(1) + node T_2471 = eq(UInt<1>(1), state) + when T_2471 : + memory.resp.ready := UInt<1>(1) + node T_2472 = eq(memory.resp.bits.tag, tag) + node T_2473 = bit-and(memory.resp.valid, T_2472) + when T_2473 : + state := UInt<1>(0) + node T_2474 = add-wrap(tag, UInt<1>(1)) + tag := T_2474 + memory.resp.ready := UInt<1>(0) + when ire : idata := memory.resp.bits.data + when dre : ddata := memory.resp.bits.data + module Tile : + output htif : {host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>}} + output memory : {req_cmd : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}}, req_data : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}}, flip resp : {valid : UInt<1>, flip ready : UInt<1>, bits : {tag : UInt<5>, data : UInt<32>}}} + + inst core of Core + inst memmod of Memory + htif.host := core.host + memory := memmod.memory + core.stall := memmod.stall + memmod.icache := core.icache + memmod.dcache := core.dcache diff --git a/test/chisel3/UIntOps.fir b/test/chisel3/UIntOps.fir new file mode 100644 index 00000000..9b219523 --- /dev/null +++ b/test/chisel3/UIntOps.fir @@ -0,0 +1,51 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit UIntOps : + module UIntOps : + input a : UInt<16> + input b : UInt<16> + output addout : UInt<16> + output subout : UInt<16> + output timesout : UInt<16> + output divout : UInt<16> + output modout : UInt<16> + output lshiftout : UInt<16> + output rshiftout : UInt<16> + output lessout : UInt<1> + output greatout : UInt<1> + output eqout : UInt<1> + output noteqout : UInt<1> + output lesseqout : UInt<1> + output greateqout : UInt<1> + + node T_38 = add-wrap(a, b) + addout := T_38 + node T_39 = sub-wrap(a, b) + subout := T_39 + node T_40 = mul(a, b) + node T_41 = bits(T_40, 15, 0) + timesout := T_41 + node T_42 = eq(b, UInt<1>(0)) + node T_43 = mux(T_42, UInt<1>(1), b) + node T_44 = div(a, T_43) + divout := T_44 + modout := UInt<1>(0) + node T_45 = bits(b, 3, 0) + node T_46 = dshl(a, T_45) + node T_47 = bits(T_46, 15, 0) + lshiftout := T_47 + node T_48 = dshr(a, b) + rshiftout := T_48 + node T_49 = lt(a, b) + lessout := T_49 + node T_50 = gt(a, b) + greatout := T_50 + node T_51 = eq(a, b) + eqout := T_51 + node T_52 = neq(a, b) + noteqout := T_52 + node T_53 = leq(a, b) + lesseqout := T_53 + node T_54 = geq(a, b) + greateqout := T_54 diff --git a/test/chisel3/VendingMachine.fir b/test/chisel3/VendingMachine.fir new file mode 100644 index 00000000..a1149dbc --- /dev/null +++ b/test/chisel3/VendingMachine.fir @@ -0,0 +1,31 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Done! + +circuit VendingMachine : + module VendingMachine : + output valid : UInt<1> + input nickel : UInt<1> + input dime : UInt<1> + + reg state : UInt<3> + on-reset state := UInt<3>(0) + node T_22 = eq(state, UInt<3>(0)) + when T_22 : + when nickel : state := UInt<3>(1) + when dime : state := UInt<3>(2) + node T_23 = eq(state, UInt<3>(1)) + when T_23 : + when nickel : state := UInt<3>(2) + when dime : state := UInt<3>(3) + node T_24 = eq(state, UInt<3>(2)) + when T_24 : + when nickel : state := UInt<3>(3) + when dime : state := UInt<3>(4) + node T_25 = eq(state, UInt<3>(3)) + when T_25 : + when nickel : state := UInt<3>(4) + when dime : state := UInt<3>(4) + node T_26 = eq(state, UInt<3>(4)) + when T_26 : state := UInt<3>(0) + node T_27 = eq(state, UInt<3>(4)) + valid := T_27 diff --git a/test/errors/high-form/NegVecSize.fir b/test/errors/high-form/NegVecSize.fir new file mode 100644 index 00000000..16fae565 --- /dev/null +++ b/test/errors/high-form/NegVecSize.fir @@ -0,0 +1,7 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +; CHECK: Vector type size cannot be negative + +circuit Top : + module Top : + wire x : UInt<3>[-5] + diff --git a/test/errors/high-form/NegWidth.fir b/test/errors/high-form/NegWidth.fir new file mode 100644 index 00000000..3f305301 --- /dev/null +++ b/test/errors/high-form/NegWidth.fir @@ -0,0 +1,7 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +; CHECK: Width cannot be negative. + +circuit Top : + module Top : + wire x : UInt<-3> + diff --git a/test/errors/high-form/NumArgs.fir b/test/errors/high-form/NumArgs.fir new file mode 100644 index 00000000..4dc8ad46 --- /dev/null +++ b/test/errors/high-form/NumArgs.fir @@ -0,0 +1,11 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +; CHECK: Primop mux requires 3 expression arguments. +; CHECK: Primop add requires 2 expression arguments. +; CHECK: Primop bits requires 2 integer arguments. + +circuit Top : + module Top : + node x = mux(UInt(1),UInt(1)) + node y = add(SInt(1),UInt(1),UInt(1)) + node z = bits(UInt(1),1,2,3) + diff --git a/test/errors/type/NodeWithFlips.fir b/test/errors/type/NodeWithFlips.fir new file mode 100644 index 00000000..1342f78d --- /dev/null +++ b/test/errors/type/NodeWithFlips.fir @@ -0,0 +1,8 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +; CHECK: Node cannot be a bundle type with flips. + +circuit Top : + module Top : + wire x : {x : UInt, flip y : UInt} + node z = x + diff --git a/test/errors/type/Primop.fir b/test/errors/type/Primop.fir new file mode 100644 index 00000000..b3a5dbc6 --- /dev/null +++ b/test/errors/type/Primop.fir @@ -0,0 +1,15 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +; CHECK: Primop mux requires all operands to have the same type. +; CHECK: Primop add cannot operate on non-ground types. +; CHECK: Primop add cannot operate on non-ground types. +; CHECK: Primop bits requires all arguments to be UInt type. +; CHECK: Primop mux requires argument SInt(1) to be a UInt type. + +circuit Top : + module Top : + node x = mux(UInt(1),SInt(1),UInt(1)) + wire a : { q : UInt<1> } + node y = add(a,a) + node z = bits(SInt<10>(-1),1,2) + node zz = mux(SInt(1),UInt(1),UInt(1)) + diff --git a/test/features/BulkConnect.fir b/test/features/BulkConnect.fir new file mode 100644 index 00000000..eab0e602 --- /dev/null +++ b/test/features/BulkConnect.fir @@ -0,0 +1,28 @@ +; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +;CHECK: Lower To Ground +circuit Top : + module Top : + wire a : { w : UInt<42>, x : UInt<10>, flip y : UInt<42>, z : SInt<42>} + wire b : { w : UInt<42>, x : UInt<20>, y : UInt<42>, z : UInt<42>} + a <> b + ; CHECK: a_w := b_w + ; CHECK: a_x := b_x + ; CHECK-NOT: a_y := b_y + ; CHECK-NOT: b_y := a_y + ; CHECK-NOT: a_z := b_z + + + wire c : { x : { y : UInt<1>, z : UInt<1>}}[4] + wire d : { x : { y : UInt<1>}}[2] + c <> d + ; CHECK: c_0_x_y := d_0_x_y + ; CHECK: c_1_x_y := d_1_x_y + ; CHECK-NOT: c_2_x_y := d_2_x_y + ; CHECK-NOT: c_3_x_y := d_3_x_y + ; CHECK-NOT: c_0_x_z := d_0_x_z + ; CHECK-NOT: c_1_x_z := d_1_x_z + ; CHECK-NOT: c_2_x_z := d_2_x_z + ; CHECK-NOT: c_3_x_z := d_3_x_z + +;CHECK: Finished Lower To Ground +;CHECK: Done! diff --git a/test/passes/jacktest/Tile.fir b/test/passes/jacktest/Tile.fir index f74aa172..c3123dab 100644 --- a/test/passes/jacktest/Tile.fir +++ b/test/passes/jacktest/Tile.fir @@ -1,1233 +1,1272 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.flo -X flo -p ct | tee %s.out | FileCheck %s ;CHECK: Done! -circuit Tile : - module ALU : - input B : UInt<32> - output out : UInt<32> - output sum : UInt<32> - input A : UInt<32> - input alu_op : UInt<4> - - node shamt = bits(B, 4, 0) - node T_1554 = add-wrap(A, B) - node T_1555 = sub-wrap(A, B) - node T_1556 = convert(A) - node T_1557 = dshr(T_1556, shamt) - node T_1558 = as-UInt(T_1557) - node T_1559 = dshr(A, shamt) - node T_1560 = dshl(A, shamt) - node T_1561 = bits(T_1560, 31, 0) - node T_1562 = convert(A) - node T_1563 = convert(B) - node T_1564 = lt(T_1562, T_1563) - node T_1565 = as-UInt(T_1564) - node T_1566 = lt(A, B) - node T_1567 = as-UInt(T_1566) - node T_1568 = bit-and(A, B) - node T_1569 = bit-or(A, B) - node T_1570 = bit-xor(A, B) - node T_1571 = eq(UInt<4>(10), alu_op) - node T_1572 = mux(T_1571, A, B) - node T_1573 = eq(UInt<4>(4), alu_op) - node T_1574 = mux(T_1573, T_1570, T_1572) - node T_1575 = eq(UInt<4>(3), alu_op) - node T_1576 = mux(T_1575, T_1569, T_1574) - node T_1577 = eq(UInt<4>(2), alu_op) - node T_1578 = mux(T_1577, T_1568, T_1576) - node T_1579 = eq(UInt<4>(7), alu_op) - node T_1580 = mux(T_1579, T_1567, T_1578) - node T_1581 = eq(UInt<4>(5), alu_op) - node T_1582 = mux(T_1581, T_1565, T_1580) - node T_1583 = eq(UInt<4>(6), alu_op) - node T_1584 = mux(T_1583, T_1561, T_1582) - node T_1585 = eq(UInt<4>(8), alu_op) - node T_1586 = mux(T_1585, T_1559, T_1584) - node T_1587 = eq(UInt<4>(9), alu_op) - node T_1588 = mux(T_1587, T_1558, T_1586) - node T_1589 = eq(UInt<4>(1), alu_op) - node T_1590 = mux(T_1589, T_1555, T_1588) - node T_1591 = eq(UInt<4>(0), alu_op) - node oot = mux(T_1591, T_1554, T_1590) - node T_1592 = bits(oot, 31, 0) - out := T_1592 - node T_1593 = bit(alu_op, 0) - node T_1594 = sub-wrap(UInt<1>(0), B) - node T_1595 = mux(T_1593, T_1594, B) - node T_1596 = add-wrap(A, T_1595) - sum := T_1596 - module BrCond : - input br_type : UInt<3> - input rs1 : UInt<32> - input rs2 : UInt<32> - output taken : UInt<1> - - node eq = eq(rs1, rs2) - node neq = bit-not(eq) - node T_1597 = convert(rs1) - node T_1598 = convert(rs2) - node lt = lt(T_1597, T_1598) - node ge = bit-not(lt) - node ltu = lt(rs1, rs2) - node geu = bit-not(ltu) - node T_1599 = eq(br_type, UInt<3>(2)) - node T_1600 = bit-and(T_1599, eq) - node T_1601 = eq(br_type, UInt<3>(6)) - node T_1602 = bit-and(T_1601, neq) - node T_1603 = bit-or(T_1600, T_1602) - node T_1604 = eq(br_type, UInt<3>(1)) - node T_1605 = bit-and(T_1604, lt) - node T_1606 = bit-or(T_1603, T_1605) - node T_1607 = eq(br_type, UInt<3>(5)) - node T_1608 = bit-and(T_1607, ge) - node T_1609 = bit-or(T_1606, T_1608) - node T_1610 = eq(br_type, UInt<3>(0)) - node T_1611 = bit-and(T_1610, ltu) - node T_1612 = bit-or(T_1609, T_1611) - node T_1613 = eq(br_type, UInt<3>(4)) - node T_1614 = bit-and(T_1613, geu) - node T_1615 = bit-or(T_1612, T_1614) - taken := T_1615 - module RegFile : - input raddr1 : UInt<5> - input raddr2 : UInt<5> - output rdata1 : UInt<32> - output rdata2 : UInt<32> - input wen : UInt<1> - input waddr : UInt<5> - input wdata : UInt<32> - - mem regs : UInt<32>[32] - node T_1616 = eq(raddr1, UInt<1>(0)) - node T_1617 = bit-not(T_1616) - accessor T_1618 = regs[raddr1] - node T_1619 = mux(T_1617, T_1618, UInt<1>(0)) - rdata1 := T_1619 - node T_1620 = eq(raddr2, UInt<1>(0)) - node T_1621 = bit-not(T_1620) - accessor T_1622 = regs[raddr2] - node T_1623 = mux(T_1621, T_1622, UInt<1>(0)) - rdata2 := T_1623 - node T_1624 = eq(waddr, UInt<1>(0)) - node T_1625 = bit-not(T_1624) - node T_1626 = bit-and(wen, T_1625) - when T_1626 : - accessor T_1627 = regs[waddr] - T_1627 := wdata - module ImmGenWire : - output out : UInt<32> - input inst : UInt<32> - input sel : UInt<3> - - node T_1628 = bits(inst, 31, 20) - node Iimm = convert(T_1628) - node T_1629 = bits(inst, 31, 25) - node T_1630 = bits(inst, 11, 7) - node T_1631 = cat(T_1629, T_1630) - node Simm = convert(T_1631) - node T_1632 = bit(inst, 31) - node T_1633 = bit(inst, 7) - node T_1634 = bits(inst, 30, 25) - node T_1635 = bits(inst, 11, 8) - node T_1636 = cat(T_1632, T_1633) - node T_1637 = cat(T_1635, UInt<1>(0)) - node T_1638 = cat(T_1634, T_1637) - node T_1639 = cat(T_1636, T_1638) - node Bimm = convert(T_1639) - node T_1640 = bits(inst, 31, 12) - node T_1641 = cat(T_1640, UInt<12>(0)) - node Uimm = convert(T_1641) - node T_1642 = bit(inst, 31) - node T_1643 = bits(inst, 19, 12) - node T_1644 = bit(inst, 20) - node T_1645 = bits(inst, 30, 25) - node T_1646 = bits(inst, 24, 21) - node T_1647 = cat(T_1643, T_1644) - node T_1648 = cat(T_1642, T_1647) - node T_1649 = cat(T_1646, UInt<1>(0)) - node T_1650 = cat(T_1645, T_1649) - node T_1651 = cat(T_1648, T_1650) - node Jimm = convert(T_1651) - node T_1652 = bits(inst, 19, 15) - node T_1653 = Pad(T_1652, 32) - node Zimm = convert(T_1653) - node T_1654 = eq(UInt<3>(3), sel) - node T_1655 = mux(T_1654, Jimm, Zimm) - node T_1656 = eq(UInt<3>(2), sel) - node T_1657 = mux(T_1656, Uimm, T_1655) - node T_1658 = eq(UInt<3>(4), sel) - node T_1659 = mux(T_1658, Bimm, T_1657) - node T_1660 = eq(UInt<3>(1), sel) - node T_1661 = mux(T_1660, Simm, T_1659) - node T_1662 = eq(UInt<3>(0), sel) - node T_1663 = mux(T_1662, Iimm, T_1661) - node T_1664 = as-UInt(T_1663) - out := T_1664 - module CSR : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input cmd : UInt<2> - input src : UInt<32> - output data : UInt<32> - input addr : UInt<12> - - reg reg_tohost : UInt<32> - on-reset reg_tohost := UInt<32>(0) - reg reg_status : UInt<32> - on-reset reg_status := UInt<32>(0) - host.tohost := reg_tohost - host.status := reg_status - node T_1665 = eq(UInt<12>(1291), addr) - node T_1666 = mux(T_1665, host.hid, UInt<1>(0)) - node T_1667 = eq(UInt<12>(1290), addr) - node T_1668 = mux(T_1667, reg_status, T_1666) - node T_1669 = eq(UInt<12>(1310), addr) - node T_1670 = mux(T_1669, reg_tohost, T_1668) - data := T_1670 - node T_1671 = eq(cmd, UInt<2>(1)) - when T_1671 : - node T_1672 = eq(addr, UInt<12>(1310)) - when T_1672 : reg_tohost := src - node T_1673 = eq(addr, UInt<12>(1290)) - when T_1673 : reg_status := src - node T_1674 = eq(cmd, UInt<2>(2)) - node T_1675 = neq(src, UInt<1>(0)) - node T_1676 = bit-and(T_1674, T_1675) - when T_1676 : - node T_1677 = eq(addr, UInt<12>(1310)) - when T_1677 : - node T_1678 = dshl(UInt<1>(1), src) - node T_1679 = bit-or(data, T_1678) - reg_tohost := T_1679 - node T_1680 = eq(addr, UInt<12>(1290)) - when T_1680 : - node T_1681 = dshl(UInt<1>(1), src) - node T_1682 = bit-or(data, T_1681) - reg_status := T_1682 - node T_1683 = eq(cmd, UInt<2>(3)) - node T_1684 = neq(src, UInt<1>(0)) - node T_1685 = bit-and(T_1683, T_1684) - when T_1685 : - node T_1686 = eq(addr, UInt<12>(1310)) - when T_1686 : - node T_1687 = dshl(UInt<1>(0), src) - node T_1688 = bit-and(data, T_1687) - reg_tohost := T_1688 - node T_1689 = eq(addr, UInt<12>(1290)) - when T_1689 : - node T_1690 = dshl(UInt<1>(0), src) - node T_1691 = bit-and(data, T_1690) - reg_status := T_1691 - module Datapath : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input ctrl : {flip inst : UInt<32>, inst_type : UInt<1>, A_sel : UInt<1>, pc_sel : UInt<1>, inst_re : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, flip stall : UInt<1>} - input stall : UInt<1> - output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - - inst alu of ALU - inst brCond of BrCond - inst regFile of RegFile - inst immGen of ImmGenWire - reg fe_inst : UInt<32> - on-reset fe_inst := UInt<32>(0) - reg fe_pc : UInt - reg ew_inst : UInt<32> - on-reset ew_inst := UInt<32>(0) - reg ew_pc : UInt - reg ew_alu : UInt - node T_1692 = sub-wrap(UInt<14>(8192), UInt<32>(4)) - reg pc : UInt<32> - on-reset pc := T_1692 - node T_1693 = eq(ctrl.pc_sel, UInt<1>(1)) - node T_1694 = bit-or(T_1693, brCond.taken) - node T_1695 = add-wrap(pc, UInt<3>(4)) - node iaddr = mux(T_1694, alu.sum, T_1695) - node T_1696 = eq(ctrl.inst_type, UInt<1>(1)) - node T_1697 = bit-or(T_1696, brCond.taken) - node inst = mux(T_1697, UInt<32>(19), icache.dout) - icache.we := UInt<1>(0) - icache.din := UInt<1>(0) - icache.addr := iaddr - icache.re := ctrl.inst_re - node T_1698 = eq(dcache.we, UInt<1>(0)) - node T_1699 = bit-not(T_1698) - node T_1700 = bit-not(T_1699) - node T_1701 = bit-and(icache.re, T_1700) - node T_1702 = mux(T_1701, iaddr, pc) - pc := T_1702 - node T_1703 = bit-not(stall) - when T_1703 : - fe_pc := pc - fe_inst := inst - ctrl.inst := fe_inst - ctrl.stall := stall - node rd_addr = bits(fe_inst, 11, 7) - node rs1_addr = bits(fe_inst, 19, 15) - node rs2_addr = bits(fe_inst, 24, 20) - regFile.raddr1 := rs1_addr - regFile.raddr2 := rs2_addr - immGen.inst := fe_inst - immGen.sel := ctrl.imm_sel - node T_1704 = eq(rs1_addr, UInt<1>(0)) - node rs1NotZero = bit-not(T_1704) - node T_1705 = eq(rs2_addr, UInt<1>(0)) - node rs2NotZero = bit-not(T_1705) - node T_1706 = eq(ctrl.wb_sel, UInt<2>(0)) - node alutype = bit-and(ctrl.wb_en, T_1706) - node ex_rd_addr = bits(ew_inst, 11, 7) - node T_1707 = bit-and(alutype, rs1NotZero) - node T_1708 = eq(rs1_addr, ex_rd_addr) - node T_1709 = bit-and(T_1707, T_1708) - node rs1 = mux(T_1709, ew_alu, regFile.rdata1) - node T_1710 = bit-and(alutype, rs2NotZero) - node T_1711 = eq(rs2_addr, ex_rd_addr) - node T_1712 = bit-and(T_1710, T_1711) - node rs2 = mux(T_1712, ew_alu, regFile.rdata2) - node T_1713 = eq(ctrl.A_sel, UInt<1>(0)) - node T_1714 = mux(T_1713, rs1, fe_pc) - alu.A := T_1714 - node T_1715 = eq(ctrl.B_sel, UInt<1>(0)) - node T_1716 = mux(T_1715, rs2, immGen.out) - alu.B := T_1716 - alu.alu_op := ctrl.alu_op - brCond.rs1 := rs1 - brCond.rs2 := rs2 - brCond.br_type := ctrl.br_type - node T_1717 = bit(alu.sum, 1) - node T_1718 = dshl(T_1717, UInt<3>(4)) - node T_1719 = bit(alu.sum, 0) - node T_1720 = dshl(T_1719, UInt<2>(3)) - node woffset = bit-or(T_1718, T_1720) - dcache.re := ctrl.data_re - node T_1721 = mux(stall, ew_alu, alu.sum) - dcache.addr := T_1721 - node T_1722 = bits(alu.sum, 1, 0) - node T_1723 = dshl(UInt<2>(3), T_1722) - node T_1724 = bits(T_1723, 3, 0) - node T_1725 = bits(alu.sum, 1, 0) - node T_1726 = dshl(UInt<1>(1), T_1725) - node T_1727 = bits(T_1726, 3, 0) - node T_1728 = eq(UInt<2>(2), ctrl.st_type) - node T_1729 = mux(T_1728, T_1727, UInt<4>(0)) - node T_1730 = eq(UInt<2>(1), ctrl.st_type) - node T_1731 = mux(T_1730, T_1724, T_1729) - node T_1732 = eq(UInt<2>(0), ctrl.st_type) - node T_1733 = mux(T_1732, UInt<4>(15), T_1731) - node T_1734 = mux(stall, UInt<4>(0), T_1733) - dcache.we := T_1734 - node T_1735 = dshl(rs2, woffset) - node T_1736 = bits(T_1735, 31, 0) - dcache.din := T_1736 - node T_1737 = bit-not(stall) - when T_1737 : - ew_pc := fe_pc - ew_inst := fe_inst - ew_alu := alu.out - node T_1738 = bit(ew_alu, 1) - node T_1739 = dshl(T_1738, UInt<3>(4)) - node T_1740 = bit(ew_alu, 0) - node T_1741 = dshl(T_1740, UInt<2>(3)) - node loffset = bit-or(T_1739, T_1741) - node lshift = dshr(dcache.dout, loffset) - node T_1742 = bits(lshift, 15, 0) - node T_1743 = convert(T_1742) - node T_1744 = Pad(T_1743, 32) - node T_1745 = as-UInt(T_1744) - node T_1746 = bits(lshift, 7, 0) - node T_1747 = convert(T_1746) - node T_1748 = Pad(T_1747, 32) - node T_1749 = as-UInt(T_1748) - node T_1750 = bits(lshift, 15, 0) - node T_1751 = bits(lshift, 7, 0) - node T_1752 = eq(UInt<3>(4), ctrl.ld_type) - node T_1753 = mux(T_1752, T_1751, dcache.dout) - node T_1754 = eq(UInt<3>(3), ctrl.ld_type) - node T_1755 = mux(T_1754, T_1750, T_1753) - node T_1756 = eq(UInt<3>(2), ctrl.ld_type) - node T_1757 = mux(T_1756, T_1749, T_1755) - node T_1758 = eq(UInt<3>(1), ctrl.ld_type) - node load = mux(T_1758, T_1745, T_1757) - inst csr of CSR - host := csr.host - csr.src := ew_alu - node T_1759 = bits(ew_inst, 31, 20) - csr.addr := T_1759 - csr.cmd := ctrl.csr_cmd - node T_1760 = add-wrap(ew_pc, UInt<3>(4)) - node T_1761 = eq(UInt<2>(3), ctrl.wb_sel) - node T_1762 = mux(T_1761, csr.data, ew_alu) - node T_1763 = eq(UInt<2>(2), ctrl.wb_sel) - node T_1764 = mux(T_1763, T_1760, T_1762) - node T_1765 = eq(UInt<2>(1), ctrl.wb_sel) - node regWrite = mux(T_1765, load, T_1764) - regFile.wen := ctrl.wb_en - regFile.waddr := ex_rd_addr - regFile.wdata := regWrite - module Control : - output ctrl : {flip inst : UInt<32>, inst_type : UInt<1>, A_sel : UInt<1>, pc_sel : UInt<1>, inst_re : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, flip stall : UInt<1>} - - node T_1766 = bit-and(UInt<7>(127), ctrl.inst) - node T_1767 = eq(T_1766, UInt<6>(55)) - node T_1768 = bit-and(UInt<7>(127), ctrl.inst) - node T_1769 = eq(T_1768, UInt<5>(23)) - node T_1770 = bit-and(UInt<7>(127), ctrl.inst) - node T_1771 = eq(T_1770, UInt<7>(111)) - node T_1772 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1773 = eq(T_1772, UInt<7>(103)) - node T_1774 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1775 = eq(T_1774, UInt<7>(99)) - node T_1776 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1777 = eq(T_1776, UInt<13>(4195)) - node T_1778 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1779 = eq(T_1778, UInt<15>(16483)) - node T_1780 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1781 = eq(T_1780, UInt<15>(20579)) - node T_1782 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1783 = eq(T_1782, UInt<15>(24675)) - node T_1784 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1785 = eq(T_1784, UInt<15>(28771)) - node T_1786 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1787 = eq(T_1786, UInt<2>(3)) - node T_1788 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1789 = eq(T_1788, UInt<13>(4099)) - node T_1790 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1791 = eq(T_1790, UInt<14>(8195)) - node T_1792 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1793 = eq(T_1792, UInt<15>(16387)) - node T_1794 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1795 = eq(T_1794, UInt<15>(20483)) - node T_1796 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1797 = eq(T_1796, UInt<6>(35)) - node T_1798 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1799 = eq(T_1798, UInt<13>(4131)) - node T_1800 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1801 = eq(T_1800, UInt<14>(8227)) - node T_1802 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1803 = eq(T_1802, UInt<5>(19)) - node T_1804 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1805 = eq(T_1804, UInt<14>(8211)) - node T_1806 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1807 = eq(T_1806, UInt<14>(12307)) - node T_1808 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1809 = eq(T_1808, UInt<15>(16403)) - node T_1810 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1811 = eq(T_1810, UInt<15>(24595)) - node T_1812 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1813 = eq(T_1812, UInt<15>(28691)) - node T_1814 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1815 = eq(T_1814, UInt<13>(4115)) - node T_1816 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1817 = eq(T_1816, UInt<15>(20499)) - node T_1818 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1819 = eq(T_1818, UInt<31>(1073762323)) - node T_1820 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1821 = eq(T_1820, UInt<6>(51)) - node T_1822 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1823 = eq(T_1822, UInt<31>(1073741875)) - node T_1824 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1825 = eq(T_1824, UInt<13>(4147)) - node T_1826 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1827 = eq(T_1826, UInt<14>(8243)) - node T_1828 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1829 = eq(T_1828, UInt<14>(12339)) - node T_1830 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1831 = eq(T_1830, UInt<15>(16435)) - node T_1832 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1833 = eq(T_1832, UInt<15>(20531)) - node T_1834 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1835 = eq(T_1834, UInt<31>(1073762355)) - node T_1836 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1837 = eq(T_1836, UInt<15>(24627)) - node T_1838 = bit-and(UInt<32>(4261441663), ctrl.inst) - node T_1839 = eq(T_1838, UInt<15>(28723)) - node T_1840 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1841 = eq(T_1840, UInt<13>(4211)) - node T_1842 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1843 = eq(T_1842, UInt<14>(8307)) - node T_1844 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1845 = eq(T_1844, UInt<14>(12403)) - node T_1846 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1847 = eq(T_1846, UInt<15>(20595)) - node T_1848 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1849 = eq(T_1848, UInt<15>(24691)) - node T_1850 = bit-and(UInt<15>(28799), ctrl.inst) - node T_1851 = eq(T_1850, UInt<15>(28787)) - node T_1852 = mux(T_1851, UInt<1>(0), UInt<1>(0)) - node T_1853 = mux(T_1849, UInt<1>(0), T_1852) - node T_1854 = mux(T_1847, UInt<1>(0), T_1853) - node T_1855 = mux(T_1845, UInt<1>(0), T_1854) - node T_1856 = mux(T_1843, UInt<1>(0), T_1855) - node T_1857 = mux(T_1841, UInt<1>(0), T_1856) - node T_1858 = mux(T_1839, UInt<1>(0), T_1857) - node T_1859 = mux(T_1837, UInt<1>(0), T_1858) - node T_1860 = mux(T_1835, UInt<1>(0), T_1859) - node T_1861 = mux(T_1833, UInt<1>(0), T_1860) - node T_1862 = mux(T_1831, UInt<1>(0), T_1861) - node T_1863 = mux(T_1829, UInt<1>(0), T_1862) - node T_1864 = mux(T_1827, UInt<1>(0), T_1863) - node T_1865 = mux(T_1825, UInt<1>(0), T_1864) - node T_1866 = mux(T_1823, UInt<1>(0), T_1865) - node T_1867 = mux(T_1821, UInt<1>(0), T_1866) - node T_1868 = mux(T_1819, UInt<1>(0), T_1867) - node T_1869 = mux(T_1817, UInt<1>(0), T_1868) - node T_1870 = mux(T_1815, UInt<1>(0), T_1869) - node T_1871 = mux(T_1813, UInt<1>(0), T_1870) - node T_1872 = mux(T_1811, UInt<1>(0), T_1871) - node T_1873 = mux(T_1809, UInt<1>(0), T_1872) - node T_1874 = mux(T_1807, UInt<1>(0), T_1873) - node T_1875 = mux(T_1805, UInt<1>(0), T_1874) - node T_1876 = mux(T_1803, UInt<1>(0), T_1875) - node T_1877 = mux(T_1801, UInt<1>(0), T_1876) - node T_1878 = mux(T_1799, UInt<1>(0), T_1877) - node T_1879 = mux(T_1797, UInt<1>(0), T_1878) - node T_1880 = mux(T_1795, UInt<1>(0), T_1879) - node T_1881 = mux(T_1793, UInt<1>(0), T_1880) - node T_1882 = mux(T_1791, UInt<1>(0), T_1881) - node T_1883 = mux(T_1789, UInt<1>(0), T_1882) - node T_1884 = mux(T_1787, UInt<1>(0), T_1883) - node T_1885 = mux(T_1785, UInt<1>(0), T_1884) - node T_1886 = mux(T_1783, UInt<1>(0), T_1885) - node T_1887 = mux(T_1781, UInt<1>(0), T_1886) - node T_1888 = mux(T_1779, UInt<1>(0), T_1887) - node T_1889 = mux(T_1777, UInt<1>(0), T_1888) - node T_1890 = mux(T_1775, UInt<1>(0), T_1889) - node T_1891 = mux(T_1773, UInt<1>(1), T_1890) - node T_1892 = mux(T_1771, UInt<1>(1), T_1891) - node T_1893 = mux(T_1769, UInt<1>(0), T_1892) - node T_1894 = mux(T_1767, UInt<1>(0), T_1893) - node T_1895 = mux(T_1851, UInt<1>(1), UInt<1>(1)) - node T_1896 = mux(T_1849, UInt<1>(1), T_1895) - node T_1897 = mux(T_1847, UInt<1>(1), T_1896) - node T_1898 = mux(T_1845, UInt<1>(0), T_1897) - node T_1899 = mux(T_1843, UInt<1>(0), T_1898) - node T_1900 = mux(T_1841, UInt<1>(0), T_1899) - node T_1901 = mux(T_1839, UInt<1>(0), T_1900) - node T_1902 = mux(T_1837, UInt<1>(0), T_1901) - node T_1903 = mux(T_1835, UInt<1>(0), T_1902) - node T_1904 = mux(T_1833, UInt<1>(0), T_1903) - node T_1905 = mux(T_1831, UInt<1>(0), T_1904) - node T_1906 = mux(T_1829, UInt<1>(0), T_1905) - node T_1907 = mux(T_1827, UInt<1>(0), T_1906) - node T_1908 = mux(T_1825, UInt<1>(0), T_1907) - node T_1909 = mux(T_1823, UInt<1>(0), T_1908) - node T_1910 = mux(T_1821, UInt<1>(0), T_1909) - node T_1911 = mux(T_1819, UInt<1>(0), T_1910) - node T_1912 = mux(T_1817, UInt<1>(0), T_1911) - node T_1913 = mux(T_1815, UInt<1>(0), T_1912) - node T_1914 = mux(T_1813, UInt<1>(0), T_1913) - node T_1915 = mux(T_1811, UInt<1>(0), T_1914) - node T_1916 = mux(T_1809, UInt<1>(0), T_1915) - node T_1917 = mux(T_1807, UInt<1>(0), T_1916) - node T_1918 = mux(T_1805, UInt<1>(0), T_1917) - node T_1919 = mux(T_1803, UInt<1>(0), T_1918) - node T_1920 = mux(T_1801, UInt<1>(0), T_1919) - node T_1921 = mux(T_1799, UInt<1>(0), T_1920) - node T_1922 = mux(T_1797, UInt<1>(0), T_1921) - node T_1923 = mux(T_1795, UInt<1>(0), T_1922) - node T_1924 = mux(T_1793, UInt<1>(0), T_1923) - node T_1925 = mux(T_1791, UInt<1>(0), T_1924) - node T_1926 = mux(T_1789, UInt<1>(0), T_1925) - node T_1927 = mux(T_1787, UInt<1>(0), T_1926) - node T_1928 = mux(T_1785, UInt<1>(1), T_1927) - node T_1929 = mux(T_1783, UInt<1>(1), T_1928) - node T_1930 = mux(T_1781, UInt<1>(1), T_1929) - node T_1931 = mux(T_1779, UInt<1>(1), T_1930) - node T_1932 = mux(T_1777, UInt<1>(1), T_1931) - node T_1933 = mux(T_1775, UInt<1>(1), T_1932) - node T_1934 = mux(T_1773, UInt<1>(0), T_1933) - node T_1935 = mux(T_1771, UInt<1>(1), T_1934) - node T_1936 = mux(T_1769, UInt<1>(1), T_1935) - node T_1937 = mux(T_1767, UInt<1>(1), T_1936) - node T_1938 = mux(T_1851, UInt<1>(1), UInt<1>(0)) - node T_1939 = mux(T_1849, UInt<1>(1), T_1938) - node T_1940 = mux(T_1847, UInt<1>(1), T_1939) - node T_1941 = mux(T_1845, UInt<1>(0), T_1940) - node T_1942 = mux(T_1843, UInt<1>(0), T_1941) - node T_1943 = mux(T_1841, UInt<1>(0), T_1942) - node T_1944 = mux(T_1839, UInt<1>(0), T_1943) - node T_1945 = mux(T_1837, UInt<1>(0), T_1944) - node T_1946 = mux(T_1835, UInt<1>(0), T_1945) - node T_1947 = mux(T_1833, UInt<1>(0), T_1946) - node T_1948 = mux(T_1831, UInt<1>(0), T_1947) - node T_1949 = mux(T_1829, UInt<1>(0), T_1948) - node T_1950 = mux(T_1827, UInt<1>(0), T_1949) - node T_1951 = mux(T_1825, UInt<1>(0), T_1950) - node T_1952 = mux(T_1823, UInt<1>(0), T_1951) - node T_1953 = mux(T_1821, UInt<1>(0), T_1952) - node T_1954 = mux(T_1819, UInt<1>(1), T_1953) - node T_1955 = mux(T_1817, UInt<1>(1), T_1954) - node T_1956 = mux(T_1815, UInt<1>(1), T_1955) - node T_1957 = mux(T_1813, UInt<1>(1), T_1956) - node T_1958 = mux(T_1811, UInt<1>(1), T_1957) - node T_1959 = mux(T_1809, UInt<1>(1), T_1958) - node T_1960 = mux(T_1807, UInt<1>(1), T_1959) - node T_1961 = mux(T_1805, UInt<1>(1), T_1960) - node T_1962 = mux(T_1803, UInt<1>(1), T_1961) - node T_1963 = mux(T_1801, UInt<1>(1), T_1962) - node T_1964 = mux(T_1799, UInt<1>(1), T_1963) - node T_1965 = mux(T_1797, UInt<1>(1), T_1964) - node T_1966 = mux(T_1795, UInt<1>(1), T_1965) - node T_1967 = mux(T_1793, UInt<1>(1), T_1966) - node T_1968 = mux(T_1791, UInt<1>(1), T_1967) - node T_1969 = mux(T_1789, UInt<1>(1), T_1968) - node T_1970 = mux(T_1787, UInt<1>(1), T_1969) - node T_1971 = mux(T_1785, UInt<1>(1), T_1970) - node T_1972 = mux(T_1783, UInt<1>(1), T_1971) - node T_1973 = mux(T_1781, UInt<1>(1), T_1972) - node T_1974 = mux(T_1779, UInt<1>(1), T_1973) - node T_1975 = mux(T_1777, UInt<1>(1), T_1974) - node T_1976 = mux(T_1775, UInt<1>(1), T_1975) - node T_1977 = mux(T_1773, UInt<1>(1), T_1976) - node T_1978 = mux(T_1771, UInt<1>(1), T_1977) - node T_1979 = mux(T_1769, UInt<1>(1), T_1978) - node T_1980 = mux(T_1767, UInt<1>(1), T_1979) - node T_1981 = mux(T_1851, UInt<3>(5), UInt<3>(7)) - node T_1982 = mux(T_1849, UInt<3>(5), T_1981) - node T_1983 = mux(T_1847, UInt<3>(5), T_1982) - node T_1984 = mux(T_1845, UInt<3>(5), T_1983) - node T_1985 = mux(T_1843, UInt<3>(5), T_1984) - node T_1986 = mux(T_1841, UInt<3>(5), T_1985) - node T_1987 = mux(T_1839, UInt<3>(7), T_1986) - node T_1988 = mux(T_1837, UInt<3>(7), T_1987) - node T_1989 = mux(T_1835, UInt<3>(7), T_1988) - node T_1990 = mux(T_1833, UInt<3>(7), T_1989) - node T_1991 = mux(T_1831, UInt<3>(7), T_1990) - node T_1992 = mux(T_1829, UInt<3>(7), T_1991) - node T_1993 = mux(T_1827, UInt<3>(7), T_1992) - node T_1994 = mux(T_1825, UInt<3>(7), T_1993) - node T_1995 = mux(T_1823, UInt<3>(7), T_1994) - node T_1996 = mux(T_1821, UInt<3>(7), T_1995) - node T_1997 = mux(T_1819, UInt<3>(0), T_1996) - node T_1998 = mux(T_1817, UInt<3>(0), T_1997) - node T_1999 = mux(T_1815, UInt<3>(0), T_1998) - node T_2000 = mux(T_1813, UInt<3>(0), T_1999) - node T_2001 = mux(T_1811, UInt<3>(0), T_2000) - node T_2002 = mux(T_1809, UInt<3>(0), T_2001) - node T_2003 = mux(T_1807, UInt<3>(0), T_2002) - node T_2004 = mux(T_1805, UInt<3>(0), T_2003) - node T_2005 = mux(T_1803, UInt<3>(0), T_2004) - node T_2006 = mux(T_1801, UInt<3>(1), T_2005) - node T_2007 = mux(T_1799, UInt<3>(1), T_2006) - node T_2008 = mux(T_1797, UInt<3>(1), T_2007) - node T_2009 = mux(T_1795, UInt<3>(0), T_2008) - node T_2010 = mux(T_1793, UInt<3>(0), T_2009) - node T_2011 = mux(T_1791, UInt<3>(0), T_2010) - node T_2012 = mux(T_1789, UInt<3>(0), T_2011) - node T_2013 = mux(T_1787, UInt<3>(0), T_2012) - node T_2014 = mux(T_1785, UInt<3>(4), T_2013) - node T_2015 = mux(T_1783, UInt<3>(4), T_2014) - node T_2016 = mux(T_1781, UInt<3>(4), T_2015) - node T_2017 = mux(T_1779, UInt<3>(4), T_2016) - node T_2018 = mux(T_1777, UInt<3>(4), T_2017) - node T_2019 = mux(T_1775, UInt<3>(4), T_2018) - node T_2020 = mux(T_1773, UInt<3>(0), T_2019) - node T_2021 = mux(T_1771, UInt<3>(3), T_2020) - node T_2022 = mux(T_1769, UInt<3>(2), T_2021) - node T_2023 = mux(T_1767, UInt<3>(2), T_2022) - node T_2024 = mux(T_1851, UInt<4>(11), UInt<4>(15)) - node T_2025 = mux(T_1849, UInt<4>(11), T_2024) - node T_2026 = mux(T_1847, UInt<4>(11), T_2025) - node T_2027 = mux(T_1845, UInt<4>(10), T_2026) - node T_2028 = mux(T_1843, UInt<4>(10), T_2027) - node T_2029 = mux(T_1841, UInt<4>(10), T_2028) - node T_2030 = mux(T_1839, UInt<4>(2), T_2029) - node T_2031 = mux(T_1837, UInt<4>(3), T_2030) - node T_2032 = mux(T_1835, UInt<4>(9), T_2031) - node T_2033 = mux(T_1833, UInt<4>(8), T_2032) - node T_2034 = mux(T_1831, UInt<4>(4), T_2033) - node T_2035 = mux(T_1829, UInt<4>(7), T_2034) - node T_2036 = mux(T_1827, UInt<4>(5), T_2035) - node T_2037 = mux(T_1825, UInt<4>(6), T_2036) - node T_2038 = mux(T_1823, UInt<4>(1), T_2037) - node T_2039 = mux(T_1821, UInt<4>(0), T_2038) - node T_2040 = mux(T_1819, UInt<4>(9), T_2039) - node T_2041 = mux(T_1817, UInt<4>(8), T_2040) - node T_2042 = mux(T_1815, UInt<4>(6), T_2041) - node T_2043 = mux(T_1813, UInt<4>(2), T_2042) - node T_2044 = mux(T_1811, UInt<4>(3), T_2043) - node T_2045 = mux(T_1809, UInt<4>(4), T_2044) - node T_2046 = mux(T_1807, UInt<4>(7), T_2045) - node T_2047 = mux(T_1805, UInt<4>(5), T_2046) - node T_2048 = mux(T_1803, UInt<4>(0), T_2047) - node T_2049 = mux(T_1801, UInt<4>(0), T_2048) - node T_2050 = mux(T_1799, UInt<4>(0), T_2049) - node T_2051 = mux(T_1797, UInt<4>(0), T_2050) - node T_2052 = mux(T_1795, UInt<4>(0), T_2051) - node T_2053 = mux(T_1793, UInt<4>(0), T_2052) - node T_2054 = mux(T_1791, UInt<4>(0), T_2053) - node T_2055 = mux(T_1789, UInt<4>(0), T_2054) - node T_2056 = mux(T_1787, UInt<4>(0), T_2055) - node T_2057 = mux(T_1785, UInt<4>(0), T_2056) - node T_2058 = mux(T_1783, UInt<4>(0), T_2057) - node T_2059 = mux(T_1781, UInt<4>(0), T_2058) - node T_2060 = mux(T_1779, UInt<4>(0), T_2059) - node T_2061 = mux(T_1777, UInt<4>(0), T_2060) - node T_2062 = mux(T_1775, UInt<4>(0), T_2061) - node T_2063 = mux(T_1773, UInt<4>(0), T_2062) - node T_2064 = mux(T_1771, UInt<4>(0), T_2063) - node T_2065 = mux(T_1769, UInt<4>(0), T_2064) - node T_2066 = mux(T_1767, UInt<4>(11), T_2065) - node T_2067 = mux(T_1851, UInt<3>(7), UInt<3>(7)) - node T_2068 = mux(T_1849, UInt<3>(7), T_2067) - node T_2069 = mux(T_1847, UInt<3>(7), T_2068) - node T_2070 = mux(T_1845, UInt<3>(7), T_2069) - node T_2071 = mux(T_1843, UInt<3>(7), T_2070) - node T_2072 = mux(T_1841, UInt<3>(7), T_2071) - node T_2073 = mux(T_1839, UInt<3>(7), T_2072) - node T_2074 = mux(T_1837, UInt<3>(7), T_2073) - node T_2075 = mux(T_1835, UInt<3>(7), T_2074) - node T_2076 = mux(T_1833, UInt<3>(7), T_2075) - node T_2077 = mux(T_1831, UInt<3>(7), T_2076) - node T_2078 = mux(T_1829, UInt<3>(7), T_2077) - node T_2079 = mux(T_1827, UInt<3>(7), T_2078) - node T_2080 = mux(T_1825, UInt<3>(7), T_2079) - node T_2081 = mux(T_1823, UInt<3>(7), T_2080) - node T_2082 = mux(T_1821, UInt<3>(7), T_2081) - node T_2083 = mux(T_1819, UInt<3>(7), T_2082) - node T_2084 = mux(T_1817, UInt<3>(7), T_2083) - node T_2085 = mux(T_1815, UInt<3>(7), T_2084) - node T_2086 = mux(T_1813, UInt<3>(7), T_2085) - node T_2087 = mux(T_1811, UInt<3>(7), T_2086) - node T_2088 = mux(T_1809, UInt<3>(7), T_2087) - node T_2089 = mux(T_1807, UInt<3>(7), T_2088) - node T_2090 = mux(T_1805, UInt<3>(7), T_2089) - node T_2091 = mux(T_1803, UInt<3>(7), T_2090) - node T_2092 = mux(T_1801, UInt<3>(7), T_2091) - node T_2093 = mux(T_1799, UInt<3>(7), T_2092) - node T_2094 = mux(T_1797, UInt<3>(7), T_2093) - node T_2095 = mux(T_1795, UInt<3>(7), T_2094) - node T_2096 = mux(T_1793, UInt<3>(7), T_2095) - node T_2097 = mux(T_1791, UInt<3>(7), T_2096) - node T_2098 = mux(T_1789, UInt<3>(7), T_2097) - node T_2099 = mux(T_1787, UInt<3>(7), T_2098) - node T_2100 = mux(T_1785, UInt<3>(4), T_2099) - node T_2101 = mux(T_1783, UInt<3>(0), T_2100) - node T_2102 = mux(T_1781, UInt<3>(5), T_2101) - node T_2103 = mux(T_1779, UInt<3>(1), T_2102) - node T_2104 = mux(T_1777, UInt<3>(6), T_2103) - node T_2105 = mux(T_1775, UInt<3>(2), T_2104) - node T_2106 = mux(T_1773, UInt<3>(7), T_2105) - node T_2107 = mux(T_1771, UInt<3>(7), T_2106) - node T_2108 = mux(T_1769, UInt<3>(7), T_2107) - node T_2109 = mux(T_1767, UInt<3>(7), T_2108) - node T_2110 = mux(T_1851, UInt<1>(0), UInt<1>(0)) - node T_2111 = mux(T_1849, UInt<1>(0), T_2110) - node T_2112 = mux(T_1847, UInt<1>(0), T_2111) - node T_2113 = mux(T_1845, UInt<1>(0), T_2112) - node T_2114 = mux(T_1843, UInt<1>(0), T_2113) - node T_2115 = mux(T_1841, UInt<1>(0), T_2114) - node T_2116 = mux(T_1839, UInt<1>(0), T_2115) - node T_2117 = mux(T_1837, UInt<1>(0), T_2116) - node T_2118 = mux(T_1835, UInt<1>(0), T_2117) - node T_2119 = mux(T_1833, UInt<1>(0), T_2118) - node T_2120 = mux(T_1831, UInt<1>(0), T_2119) - node T_2121 = mux(T_1829, UInt<1>(0), T_2120) - node T_2122 = mux(T_1827, UInt<1>(0), T_2121) - node T_2123 = mux(T_1825, UInt<1>(0), T_2122) - node T_2124 = mux(T_1823, UInt<1>(0), T_2123) - node T_2125 = mux(T_1821, UInt<1>(0), T_2124) - node T_2126 = mux(T_1819, UInt<1>(0), T_2125) - node T_2127 = mux(T_1817, UInt<1>(0), T_2126) - node T_2128 = mux(T_1815, UInt<1>(0), T_2127) - node T_2129 = mux(T_1813, UInt<1>(0), T_2128) - node T_2130 = mux(T_1811, UInt<1>(0), T_2129) - node T_2131 = mux(T_1809, UInt<1>(0), T_2130) - node T_2132 = mux(T_1807, UInt<1>(0), T_2131) - node T_2133 = mux(T_1805, UInt<1>(0), T_2132) - node T_2134 = mux(T_1803, UInt<1>(0), T_2133) - node T_2135 = mux(T_1801, UInt<1>(0), T_2134) - node T_2136 = mux(T_1799, UInt<1>(0), T_2135) - node T_2137 = mux(T_1797, UInt<1>(0), T_2136) - node T_2138 = mux(T_1795, UInt<1>(0), T_2137) - node T_2139 = mux(T_1793, UInt<1>(0), T_2138) - node T_2140 = mux(T_1791, UInt<1>(0), T_2139) - node T_2141 = mux(T_1789, UInt<1>(0), T_2140) - node T_2142 = mux(T_1787, UInt<1>(0), T_2141) - node T_2143 = mux(T_1785, UInt<1>(0), T_2142) - node T_2144 = mux(T_1783, UInt<1>(0), T_2143) - node T_2145 = mux(T_1781, UInt<1>(0), T_2144) - node T_2146 = mux(T_1779, UInt<1>(0), T_2145) - node T_2147 = mux(T_1777, UInt<1>(0), T_2146) - node T_2148 = mux(T_1775, UInt<1>(0), T_2147) - node T_2149 = mux(T_1773, UInt<1>(1), T_2148) - node T_2150 = mux(T_1771, UInt<1>(1), T_2149) - node T_2151 = mux(T_1769, UInt<1>(0), T_2150) - node T_2152 = mux(T_1767, UInt<1>(0), T_2151) - node T_2153 = mux(T_1851, UInt<2>(3), UInt<2>(3)) - node T_2154 = mux(T_1849, UInt<2>(3), T_2153) - node T_2155 = mux(T_1847, UInt<2>(3), T_2154) - node T_2156 = mux(T_1845, UInt<2>(3), T_2155) - node T_2157 = mux(T_1843, UInt<2>(3), T_2156) - node T_2158 = mux(T_1841, UInt<2>(3), T_2157) - node T_2159 = mux(T_1839, UInt<2>(3), T_2158) - node T_2160 = mux(T_1837, UInt<2>(3), T_2159) - node T_2161 = mux(T_1835, UInt<2>(3), T_2160) - node T_2162 = mux(T_1833, UInt<2>(3), T_2161) - node T_2163 = mux(T_1831, UInt<2>(3), T_2162) - node T_2164 = mux(T_1829, UInt<2>(3), T_2163) - node T_2165 = mux(T_1827, UInt<2>(3), T_2164) - node T_2166 = mux(T_1825, UInt<2>(3), T_2165) - node T_2167 = mux(T_1823, UInt<2>(3), T_2166) - node T_2168 = mux(T_1821, UInt<2>(3), T_2167) - node T_2169 = mux(T_1819, UInt<2>(3), T_2168) - node T_2170 = mux(T_1817, UInt<2>(3), T_2169) - node T_2171 = mux(T_1815, UInt<2>(3), T_2170) - node T_2172 = mux(T_1813, UInt<2>(3), T_2171) - node T_2173 = mux(T_1811, UInt<2>(3), T_2172) - node T_2174 = mux(T_1809, UInt<2>(3), T_2173) - node T_2175 = mux(T_1807, UInt<2>(3), T_2174) - node T_2176 = mux(T_1805, UInt<2>(3), T_2175) - node T_2177 = mux(T_1803, UInt<2>(3), T_2176) - node T_2178 = mux(T_1801, UInt<2>(0), T_2177) - node T_2179 = mux(T_1799, UInt<2>(1), T_2178) - node T_2180 = mux(T_1797, UInt<2>(2), T_2179) - node T_2181 = mux(T_1795, UInt<2>(3), T_2180) - node T_2182 = mux(T_1793, UInt<2>(3), T_2181) - node T_2183 = mux(T_1791, UInt<2>(3), T_2182) - node T_2184 = mux(T_1789, UInt<2>(3), T_2183) - node T_2185 = mux(T_1787, UInt<2>(3), T_2184) - node T_2186 = mux(T_1785, UInt<2>(3), T_2185) - node T_2187 = mux(T_1783, UInt<2>(3), T_2186) - node T_2188 = mux(T_1781, UInt<2>(3), T_2187) - node T_2189 = mux(T_1779, UInt<2>(3), T_2188) - node T_2190 = mux(T_1777, UInt<2>(3), T_2189) - node T_2191 = mux(T_1775, UInt<2>(3), T_2190) - node T_2192 = mux(T_1773, UInt<2>(3), T_2191) - node T_2193 = mux(T_1771, UInt<2>(3), T_2192) - node T_2194 = mux(T_1769, UInt<2>(3), T_2193) - node T_2195 = mux(T_1767, UInt<2>(3), T_2194) - node T_2196 = mux(T_1851, UInt<3>(7), UInt<3>(7)) - node T_2197 = mux(T_1849, UInt<3>(7), T_2196) - node T_2198 = mux(T_1847, UInt<3>(7), T_2197) - node T_2199 = mux(T_1845, UInt<3>(7), T_2198) - node T_2200 = mux(T_1843, UInt<3>(7), T_2199) - node T_2201 = mux(T_1841, UInt<3>(7), T_2200) - node T_2202 = mux(T_1839, UInt<3>(7), T_2201) - node T_2203 = mux(T_1837, UInt<3>(7), T_2202) - node T_2204 = mux(T_1835, UInt<3>(7), T_2203) - node T_2205 = mux(T_1833, UInt<3>(7), T_2204) - node T_2206 = mux(T_1831, UInt<3>(7), T_2205) - node T_2207 = mux(T_1829, UInt<3>(7), T_2206) - node T_2208 = mux(T_1827, UInt<3>(7), T_2207) - node T_2209 = mux(T_1825, UInt<3>(7), T_2208) - node T_2210 = mux(T_1823, UInt<3>(7), T_2209) - node T_2211 = mux(T_1821, UInt<3>(7), T_2210) - node T_2212 = mux(T_1819, UInt<3>(7), T_2211) - node T_2213 = mux(T_1817, UInt<3>(7), T_2212) - node T_2214 = mux(T_1815, UInt<3>(7), T_2213) - node T_2215 = mux(T_1813, UInt<3>(7), T_2214) - node T_2216 = mux(T_1811, UInt<3>(7), T_2215) - node T_2217 = mux(T_1809, UInt<3>(7), T_2216) - node T_2218 = mux(T_1807, UInt<3>(7), T_2217) - node T_2219 = mux(T_1805, UInt<3>(7), T_2218) - node T_2220 = mux(T_1803, UInt<3>(7), T_2219) - node T_2221 = mux(T_1801, UInt<3>(7), T_2220) - node T_2222 = mux(T_1799, UInt<3>(7), T_2221) - node T_2223 = mux(T_1797, UInt<3>(7), T_2222) - node T_2224 = mux(T_1795, UInt<3>(3), T_2223) - node T_2225 = mux(T_1793, UInt<3>(4), T_2224) - node T_2226 = mux(T_1791, UInt<3>(0), T_2225) - node T_2227 = mux(T_1789, UInt<3>(1), T_2226) - node T_2228 = mux(T_1787, UInt<3>(2), T_2227) - node T_2229 = mux(T_1785, UInt<3>(7), T_2228) - node T_2230 = mux(T_1783, UInt<3>(7), T_2229) - node T_2231 = mux(T_1781, UInt<3>(7), T_2230) - node T_2232 = mux(T_1779, UInt<3>(7), T_2231) - node T_2233 = mux(T_1777, UInt<3>(7), T_2232) - node T_2234 = mux(T_1775, UInt<3>(7), T_2233) - node T_2235 = mux(T_1773, UInt<3>(7), T_2234) - node T_2236 = mux(T_1771, UInt<3>(7), T_2235) - node T_2237 = mux(T_1769, UInt<3>(7), T_2236) - node T_2238 = mux(T_1767, UInt<3>(7), T_2237) - node T_2239 = mux(T_1851, UInt<2>(3), UInt<2>(0)) - node T_2240 = mux(T_1849, UInt<2>(3), T_2239) - node T_2241 = mux(T_1847, UInt<2>(3), T_2240) - node T_2242 = mux(T_1845, UInt<2>(3), T_2241) - node T_2243 = mux(T_1843, UInt<2>(3), T_2242) - node T_2244 = mux(T_1841, UInt<2>(3), T_2243) - node T_2245 = mux(T_1839, UInt<2>(0), T_2244) - node T_2246 = mux(T_1837, UInt<2>(0), T_2245) - node T_2247 = mux(T_1835, UInt<2>(0), T_2246) - node T_2248 = mux(T_1833, UInt<2>(0), T_2247) - node T_2249 = mux(T_1831, UInt<2>(0), T_2248) - node T_2250 = mux(T_1829, UInt<2>(0), T_2249) - node T_2251 = mux(T_1827, UInt<2>(0), T_2250) - node T_2252 = mux(T_1825, UInt<2>(0), T_2251) - node T_2253 = mux(T_1823, UInt<2>(0), T_2252) - node T_2254 = mux(T_1821, UInt<2>(0), T_2253) - node T_2255 = mux(T_1819, UInt<2>(0), T_2254) - node T_2256 = mux(T_1817, UInt<2>(0), T_2255) - node T_2257 = mux(T_1815, UInt<2>(0), T_2256) - node T_2258 = mux(T_1813, UInt<2>(0), T_2257) - node T_2259 = mux(T_1811, UInt<2>(0), T_2258) - node T_2260 = mux(T_1809, UInt<2>(0), T_2259) - node T_2261 = mux(T_1807, UInt<2>(0), T_2260) - node T_2262 = mux(T_1805, UInt<2>(0), T_2261) - node T_2263 = mux(T_1803, UInt<2>(0), T_2262) - node T_2264 = mux(T_1801, UInt<2>(0), T_2263) - node T_2265 = mux(T_1799, UInt<2>(0), T_2264) - node T_2266 = mux(T_1797, UInt<2>(0), T_2265) - node T_2267 = mux(T_1795, UInt<2>(1), T_2266) - node T_2268 = mux(T_1793, UInt<2>(1), T_2267) - node T_2269 = mux(T_1791, UInt<2>(1), T_2268) - node T_2270 = mux(T_1789, UInt<2>(1), T_2269) - node T_2271 = mux(T_1787, UInt<2>(1), T_2270) - node T_2272 = mux(T_1785, UInt<2>(0), T_2271) - node T_2273 = mux(T_1783, UInt<2>(0), T_2272) - node T_2274 = mux(T_1781, UInt<2>(0), T_2273) - node T_2275 = mux(T_1779, UInt<2>(0), T_2274) - node T_2276 = mux(T_1777, UInt<2>(0), T_2275) - node T_2277 = mux(T_1775, UInt<2>(0), T_2276) - node T_2278 = mux(T_1773, UInt<2>(2), T_2277) - node T_2279 = mux(T_1771, UInt<2>(2), T_2278) - node T_2280 = mux(T_1769, UInt<2>(0), T_2279) - node T_2281 = mux(T_1767, UInt<2>(0), T_2280) - node T_2282 = mux(T_1851, UInt<1>(0), UInt<1>(0)) - node T_2283 = mux(T_1849, UInt<1>(0), T_2282) - node T_2284 = mux(T_1847, UInt<1>(0), T_2283) - node T_2285 = mux(T_1845, UInt<1>(0), T_2284) - node T_2286 = mux(T_1843, UInt<1>(0), T_2285) - node T_2287 = mux(T_1841, UInt<1>(0), T_2286) - node T_2288 = mux(T_1839, UInt<1>(1), T_2287) - node T_2289 = mux(T_1837, UInt<1>(1), T_2288) - node T_2290 = mux(T_1835, UInt<1>(1), T_2289) - node T_2291 = mux(T_1833, UInt<1>(1), T_2290) - node T_2292 = mux(T_1831, UInt<1>(1), T_2291) - node T_2293 = mux(T_1829, UInt<1>(1), T_2292) - node T_2294 = mux(T_1827, UInt<1>(1), T_2293) - node T_2295 = mux(T_1825, UInt<1>(1), T_2294) - node T_2296 = mux(T_1823, UInt<1>(1), T_2295) - node T_2297 = mux(T_1821, UInt<1>(1), T_2296) - node T_2298 = mux(T_1819, UInt<1>(1), T_2297) - node T_2299 = mux(T_1817, UInt<1>(1), T_2298) - node T_2300 = mux(T_1815, UInt<1>(1), T_2299) - node T_2301 = mux(T_1813, UInt<1>(1), T_2300) - node T_2302 = mux(T_1811, UInt<1>(1), T_2301) - node T_2303 = mux(T_1809, UInt<1>(1), T_2302) - node T_2304 = mux(T_1807, UInt<1>(1), T_2303) - node T_2305 = mux(T_1805, UInt<1>(1), T_2304) - node T_2306 = mux(T_1803, UInt<1>(1), T_2305) - node T_2307 = mux(T_1801, UInt<1>(0), T_2306) - node T_2308 = mux(T_1799, UInt<1>(0), T_2307) - node T_2309 = mux(T_1797, UInt<1>(0), T_2308) - node T_2310 = mux(T_1795, UInt<1>(1), T_2309) - node T_2311 = mux(T_1793, UInt<1>(1), T_2310) - node T_2312 = mux(T_1791, UInt<1>(1), T_2311) - node T_2313 = mux(T_1789, UInt<1>(1), T_2312) - node T_2314 = mux(T_1787, UInt<1>(1), T_2313) - node T_2315 = mux(T_1785, UInt<1>(0), T_2314) - node T_2316 = mux(T_1783, UInt<1>(0), T_2315) - node T_2317 = mux(T_1781, UInt<1>(0), T_2316) - node T_2318 = mux(T_1779, UInt<1>(0), T_2317) - node T_2319 = mux(T_1777, UInt<1>(0), T_2318) - node T_2320 = mux(T_1775, UInt<1>(0), T_2319) - node T_2321 = mux(T_1773, UInt<1>(1), T_2320) - node T_2322 = mux(T_1771, UInt<1>(1), T_2321) - node T_2323 = mux(T_1769, UInt<1>(1), T_2322) - node T_2324 = mux(T_1767, UInt<1>(1), T_2323) - node T_2325 = mux(T_1851, UInt<2>(3), UInt<2>(0)) - node T_2326 = mux(T_1849, UInt<2>(2), T_2325) - node T_2327 = mux(T_1847, UInt<2>(1), T_2326) - node T_2328 = mux(T_1845, UInt<2>(3), T_2327) - node T_2329 = mux(T_1843, UInt<2>(2), T_2328) - node T_2330 = mux(T_1841, UInt<2>(1), T_2329) - node T_2331 = mux(T_1839, UInt<2>(0), T_2330) - node T_2332 = mux(T_1837, UInt<2>(0), T_2331) - node T_2333 = mux(T_1835, UInt<2>(0), T_2332) - node T_2334 = mux(T_1833, UInt<2>(0), T_2333) - node T_2335 = mux(T_1831, UInt<2>(0), T_2334) - node T_2336 = mux(T_1829, UInt<2>(0), T_2335) - node T_2337 = mux(T_1827, UInt<2>(0), T_2336) - node T_2338 = mux(T_1825, UInt<2>(0), T_2337) - node T_2339 = mux(T_1823, UInt<2>(0), T_2338) - node T_2340 = mux(T_1821, UInt<2>(0), T_2339) - node T_2341 = mux(T_1819, UInt<2>(0), T_2340) - node T_2342 = mux(T_1817, UInt<2>(0), T_2341) - node T_2343 = mux(T_1815, UInt<2>(0), T_2342) - node T_2344 = mux(T_1813, UInt<2>(0), T_2343) - node T_2345 = mux(T_1811, UInt<2>(0), T_2344) - node T_2346 = mux(T_1809, UInt<2>(0), T_2345) - node T_2347 = mux(T_1807, UInt<2>(0), T_2346) - node T_2348 = mux(T_1805, UInt<2>(0), T_2347) - node T_2349 = mux(T_1803, UInt<2>(0), T_2348) - node T_2350 = mux(T_1801, UInt<2>(0), T_2349) - node T_2351 = mux(T_1799, UInt<2>(0), T_2350) - node T_2352 = mux(T_1797, UInt<2>(0), T_2351) - node T_2353 = mux(T_1795, UInt<2>(0), T_2352) - node T_2354 = mux(T_1793, UInt<2>(0), T_2353) - node T_2355 = mux(T_1791, UInt<2>(0), T_2354) - node T_2356 = mux(T_1789, UInt<2>(0), T_2355) - node T_2357 = mux(T_1787, UInt<2>(0), T_2356) - node T_2358 = mux(T_1785, UInt<2>(0), T_2357) - node T_2359 = mux(T_1783, UInt<2>(0), T_2358) - node T_2360 = mux(T_1781, UInt<2>(0), T_2359) - node T_2361 = mux(T_1779, UInt<2>(0), T_2360) - node T_2362 = mux(T_1777, UInt<2>(0), T_2361) - node T_2363 = mux(T_1775, UInt<2>(0), T_2362) - node T_2364 = mux(T_1773, UInt<2>(0), T_2363) - node T_2365 = mux(T_1771, UInt<2>(0), T_2364) - node T_2366 = mux(T_1769, UInt<2>(0), T_2365) - node T_2367 = mux(T_1767, UInt<2>(0), T_2366) - node rs1_addr = bits(ctrl.inst, 19, 15) - node rs2_addr = bits(ctrl.inst, 24, 20) - reg st_type : UInt<2> - reg ld_type : UInt<3> - reg wb_sel : UInt<2> - node T_2368 = bit(T_2324, 0) - reg wb_en : UInt<1> - reg csr_cmd : UInt<2> - ctrl.pc_sel := T_1894 - node T_2369 = bit-not(ctrl.stall) - node T_2370 = bit-not(ctrl.data_re) - node T_2371 = bit-and(T_2369, T_2370) - ctrl.inst_re := T_2371 - node T_2372 = neq(T_2238, UInt<3>(7)) - node T_2373 = bit(T_2152, 0) - node T_2374 = bit-or(T_2372, T_2373) - node T_2375 = mux(T_2374, UInt<1>(1), UInt<1>(0)) - ctrl.inst_type := T_2375 - ctrl.A_sel := T_1937 - ctrl.B_sel := T_1980 - ctrl.imm_sel := T_2023 - ctrl.alu_op := T_2066 - ctrl.br_type := T_2109 - ctrl.st_type := T_2195 - node T_2376 = bit-not(ctrl.stall) - when T_2376 : - st_type := ctrl.st_type - ld_type := T_2238 - wb_sel := T_2281 - node T_2377 = bit(T_2324, 0) - wb_en := T_2377 - csr_cmd := T_2367 - node T_2378 = neq(ctrl.ld_type, UInt<3>(7)) - node T_2379 = neq(T_2238, UInt<3>(7)) - node T_2380 = mux(ctrl.stall, T_2378, T_2379) - ctrl.data_re := T_2380 - ctrl.ld_type := ld_type - ctrl.wb_en := wb_en - ctrl.wb_sel := wb_sel - ctrl.csr_cmd := csr_cmd - module Core : - output host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>} - input stall : UInt<1> - output icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - output dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - - inst dpath of Datapath - inst ctrl of Control - host := dpath.host - icache := dpath.icache - dcache := dpath.dcache - dpath.ctrl := ctrl.ctrl - dpath.stall := stall - module Queue : - output count : UInt<3> - input enq : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}} - output deq : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}} - - mem ram : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}[4] - reg T_2381 : UInt<2> - on-reset T_2381 := UInt<2>(0) - reg T_2382 : UInt<2> - on-reset T_2382 := UInt<2>(0) - reg maybe_full : UInt<1> - on-reset maybe_full := UInt<1>(0) - node ptr_match = eq(T_2381, T_2382) - node T_2383 = bit-not(maybe_full) - node empty = bit-and(ptr_match, T_2383) - node full = bit-and(ptr_match, maybe_full) - node maybe_flow = bit-and(UInt<1>(0), empty) - node do_flow = bit-and(maybe_flow, deq.ready) - node T_2384 = bit-and(enq.ready, enq.valid) - node T_2385 = bit-not(do_flow) - node do_enq = bit-and(T_2384, T_2385) - node T_2386 = bit-and(deq.ready, deq.valid) - node T_2387 = bit-not(do_flow) - node do_deq = bit-and(T_2386, T_2387) - when do_enq : - accessor T_2388 = ram[T_2381] - T_2388 := enq.bits - node T_2389 = eq(T_2381, UInt<2>(3)) - node T_2390 = bit-and(UInt<1>(0), T_2389) - node T_2391 = add-wrap(T_2381, UInt<1>(1)) - node T_2392 = mux(T_2390, UInt<1>(0), T_2391) - T_2381 := T_2392 - when do_deq : - node T_2393 = eq(T_2382, UInt<2>(3)) - node T_2394 = bit-and(UInt<1>(0), T_2393) - node T_2395 = add-wrap(T_2382, UInt<1>(1)) - node T_2396 = mux(T_2394, UInt<1>(0), T_2395) - T_2382 := T_2396 - node T_2397 = neq(do_enq, do_deq) - when T_2397 : maybe_full := do_enq - node T_2398 = bit-not(empty) - node T_2399 = bit-and(UInt<1>(0), enq.valid) - node T_2400 = bit-or(T_2398, T_2399) - deq.valid := T_2400 - node T_2401 = bit-not(full) - node T_2402 = bit-and(UInt<1>(0), deq.ready) - node T_2403 = bit-or(T_2401, T_2402) - enq.ready := T_2403 - accessor T_2404 = ram[T_2382] - wire T_2405 : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>} - node T_2406 = mux(maybe_flow, enq.bits.mask, T_2404.mask) - T_2405.mask := T_2406 - node T_2407 = mux(maybe_flow, enq.bits.tag, T_2404.tag) - T_2405.tag := T_2407 - node T_2408 = mux(maybe_flow, enq.bits.rw, T_2404.rw) - T_2405.rw := T_2408 - node T_2409 = mux(maybe_flow, enq.bits.addr, T_2404.addr) - T_2405.addr := T_2409 - deq.bits := T_2405 - node ptr_diff = sub-wrap(T_2381, T_2382) - node T_2410 = bit-and(maybe_full, ptr_match) - node T_2411 = cat(T_2410, ptr_diff) - count := T_2411 - module Queue_1490 : - output count : UInt<3> - input enq : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}} - output deq : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}} - - mem ram : {data : UInt<32>}[4] - reg T_2412 : UInt<2> - on-reset T_2412 := UInt<2>(0) - reg T_2413 : UInt<2> - on-reset T_2413 := UInt<2>(0) - reg maybe_full : UInt<1> - on-reset maybe_full := UInt<1>(0) - node ptr_match = eq(T_2412, T_2413) - node T_2414 = bit-not(maybe_full) - node empty = bit-and(ptr_match, T_2414) - node full = bit-and(ptr_match, maybe_full) - node maybe_flow = bit-and(UInt<1>(0), empty) - node do_flow = bit-and(maybe_flow, deq.ready) - node T_2415 = bit-and(enq.ready, enq.valid) - node T_2416 = bit-not(do_flow) - node do_enq = bit-and(T_2415, T_2416) - node T_2417 = bit-and(deq.ready, deq.valid) - node T_2418 = bit-not(do_flow) - node do_deq = bit-and(T_2417, T_2418) - when do_enq : - accessor T_2419 = ram[T_2412] - T_2419 := enq.bits - node T_2420 = eq(T_2412, UInt<2>(3)) - node T_2421 = bit-and(UInt<1>(0), T_2420) - node T_2422 = add-wrap(T_2412, UInt<1>(1)) - node T_2423 = mux(T_2421, UInt<1>(0), T_2422) - T_2412 := T_2423 - when do_deq : - node T_2424 = eq(T_2413, UInt<2>(3)) - node T_2425 = bit-and(UInt<1>(0), T_2424) - node T_2426 = add-wrap(T_2413, UInt<1>(1)) - node T_2427 = mux(T_2425, UInt<1>(0), T_2426) - T_2413 := T_2427 - node T_2428 = neq(do_enq, do_deq) - when T_2428 : maybe_full := do_enq - node T_2429 = bit-not(empty) - node T_2430 = bit-and(UInt<1>(0), enq.valid) - node T_2431 = bit-or(T_2429, T_2430) - deq.valid := T_2431 - node T_2432 = bit-not(full) - node T_2433 = bit-and(UInt<1>(0), deq.ready) - node T_2434 = bit-or(T_2432, T_2433) - enq.ready := T_2434 - accessor T_2435 = ram[T_2413] - wire T_2436 : {data : UInt<32>} - node T_2437 = mux(maybe_flow, enq.bits.data, T_2435.data) - T_2436.data := T_2437 - deq.bits := T_2436 - node ptr_diff = sub-wrap(T_2412, T_2413) - node T_2438 = bit-and(maybe_full, ptr_match) - node T_2439 = cat(T_2438, ptr_diff) - count := T_2439 - module Memory : - output memory : {req_cmd : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}}, req_data : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}}, flip resp : {valid : UInt<1>, flip ready : UInt<1>, bits : {tag : UInt<5>, data : UInt<32>}}} - output stall : UInt<1> - input icache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - input dcache : {re : UInt<1>, flip dout : UInt<32>, we : UInt<4>, addr : UInt<32>, din : UInt<32>} - - inst memReqCmdQueue of Queue - inst memReqDataQueue of Queue_1490 - reg state : UInt<1> - on-reset state := UInt<1>(0) - reg tag : UInt<5> - on-reset tag := UInt<5>(0) - node T_2440 = eq(state, UInt<1>(0)) - node T_2441 = bit-or(icache.re, dcache.re) - node T_2442 = eq(dcache.we, UInt<1>(0)) - node T_2443 = bit-not(T_2442) - node T_2444 = bit-or(T_2441, T_2443) - node cpuReq = bit-and(T_2440, T_2444) - node T_2445 = bits(icache.addr, 31, 2) - node iaddr = cat(T_2445, UInt<2>(0)) - node T_2446 = bits(dcache.addr, 31, 2) - node daddr = cat(T_2446, UInt<2>(0)) - reg idata : UInt - reg ddata : UInt - reg ire : UInt<1> - reg dre : UInt<1> - icache.dout := idata - dcache.dout := ddata - memory.req_cmd := memReqCmdQueue.deq - memory.req_data := memReqDataQueue.deq - memory.resp.ready := UInt<1>(0) - node T_2447 = eq(state, UInt<1>(1)) - node T_2448 = bit-not(memReqCmdQueue.enq.ready) - node T_2449 = bit-or(T_2447, T_2448) - node T_2450 = bit-not(memReqDataQueue.enq.ready) - node T_2451 = bit-or(T_2449, T_2450) - stall := T_2451 - node T_2452 = eq(dcache.we, UInt<1>(0)) - node T_2453 = bit-not(T_2452) - memReqCmdQueue.enq.bits.rw := T_2453 - memReqCmdQueue.enq.bits.tag := tag - node T_2454 = eq(dcache.we, UInt<1>(0)) - node T_2455 = bit-not(T_2454) - node T_2456 = bit-not(icache.re) - node T_2457 = bit-or(T_2455, T_2456) - node T_2458 = mux(T_2457, daddr, iaddr) - memReqCmdQueue.enq.bits.addr := T_2458 - memReqCmdQueue.enq.bits.mask := dcache.we - node T_2459 = bit-and(memReqDataQueue.enq.ready, cpuReq) - memReqCmdQueue.enq.valid := T_2459 - memReqDataQueue.enq.bits.data := dcache.din - node T_2460 = bit-and(memReqCmdQueue.enq.ready, cpuReq) - node T_2461 = eq(dcache.we, UInt<1>(0)) - node T_2462 = bit-not(T_2461) - node T_2463 = bit-and(T_2460, T_2462) - memReqDataQueue.enq.valid := T_2463 - node T_2464 = eq(UInt<1>(0), state) - when T_2464 : - node T_2465 = bit-or(icache.re, dcache.re) - node T_2466 = eq(dcache.we, UInt<1>(0)) - node T_2467 = bit-not(T_2466) - node T_2468 = bit-not(T_2467) - node T_2469 = bit-and(T_2465, T_2468) - node T_2470 = bit-and(T_2469, memReqCmdQueue.enq.ready) - when T_2470 : - ire := icache.re - dre := dcache.re - state := UInt<1>(1) - node T_2471 = eq(UInt<1>(1), state) - when T_2471 : - memory.resp.ready := UInt<1>(1) - node T_2472 = eq(memory.resp.bits.tag, tag) - node T_2473 = bit-and(memory.resp.valid, T_2472) - when T_2473 : - state := UInt<1>(0) - node T_2474 = add-wrap(tag, UInt<1>(1)) - tag := T_2474 - memory.resp.ready := UInt<1>(0) - when ire : idata := memory.resp.bits.data - when dre : ddata := memory.resp.bits.data - module Tile : - output htif : {host : {status : UInt<32>, flip hid : UInt<1>, tohost : UInt<32>}} - output memory : {req_cmd : {valid : UInt<1>, flip ready : UInt<1>, bits : {mask : UInt<4>, tag : UInt<5>, rw : UInt<1>, addr : UInt<32>}}, req_data : {valid : UInt<1>, flip ready : UInt<1>, bits : {data : UInt<32>}}, flip resp : {valid : UInt<1>, flip ready : UInt<1>, bits : {tag : UInt<5>, data : UInt<32>}}} - - inst core of Core - inst memmod of Memory - htif.host := core.host - memory := memmod.memory - core.stall := memmod.stall - memmod.icache := core.icache - memmod.dcache := core.dcache +circuit Tile : + module ALU : + input A : UInt<32> + input B : UInt<32> + input alu_op : UInt<4> + output out : UInt<32> + output sum : UInt<32> + node tmp1 = bits(B, 4, 0) + node shamt2 = tmp1 + node tmp3 = add-wrap(A, B) + node tmp4 = sub-wrap(A, B) + node tmp5 = convert(A) + node tmp6 = dshr(tmp5, shamt2) + node tmp7 = as-UInt(tmp6) + node tmp8 = dshr(A, shamt2) + node tmp9 = dshl(A, shamt2) + node tmp10 = bits(tmp9, 31, 0) + node tmp11 = convert(A) + node tmp12 = convert(B) + node tmp13 = lt(tmp11, tmp12) + node tmp14 = lt(A, B) + node tmp15 = bit-and(A, B) + node tmp16 = bit-or(A, B) + node tmp17 = bit-xor(A, B) + node tmp18 = eq(UInt<4>(10), alu_op) + node tmp19 = mux(tmp18, A, B) + node tmp20 = eq(UInt<4>(4), alu_op) + node tmp21 = mux(tmp20, tmp17, tmp19) + node tmp22 = eq(UInt<4>(3), alu_op) + node tmp23 = mux(tmp22, tmp16, tmp21) + node tmp24 = eq(UInt<4>(2), alu_op) + node tmp25 = mux(tmp24, tmp15, tmp23) + node tmp26 = eq(UInt<4>(7), alu_op) + node tmp27 = mux(tmp26, tmp14, tmp25) + node tmp28 = eq(UInt<4>(5), alu_op) + node tmp29 = mux(tmp28, tmp13, tmp27) + node tmp30 = eq(UInt<4>(6), alu_op) + node tmp31 = mux(tmp30, tmp10, tmp29) + node tmp32 = eq(UInt<4>(8), alu_op) + node tmp33 = mux(tmp32, tmp8, tmp31) + node tmp34 = eq(UInt<4>(9), alu_op) + node tmp35 = mux(tmp34, tmp7, tmp33) + node tmp36 = eq(UInt<4>(1), alu_op) + node tmp37 = mux(tmp36, tmp4, tmp35) + node tmp38 = eq(UInt<4>(0), alu_op) + node tmp39 = mux(tmp38, tmp3, tmp37) + node tmp40 = bits(tmp39, 31, 0) + out := tmp40 + node tmp41 = bit(alu_op, 0) + node tmp42 = sub-wrap(UInt<1>(0), B) + node tmp43 = mux(tmp41, tmp42, B) + node tmp44 = add-wrap(A, tmp43) + sum := tmp44 + module BrCond : + input rs1 : UInt<32> + input rs2 : UInt<32> + input br_type : UInt<3> + output taken : UInt<1> + node tmp45 = eq(rs1, rs2) + node eq46 = tmp45 + node tmp47 = bit-not(eq46) + node neq48 = tmp47 + node tmp49 = convert(rs1) + node tmp50 = convert(rs2) + node tmp51 = lt(tmp49, tmp50) + node lt52 = tmp51 + node tmp53 = bit-not(lt52) + node ge54 = tmp53 + node tmp55 = lt(rs1, rs2) + node ltu56 = tmp55 + node tmp57 = bit-not(ltu56) + node geu58 = tmp57 + node tmp59 = eq(br_type, UInt<3>(2)) + node tmp60 = bit-and(tmp59, eq46) + node tmp61 = eq(br_type, UInt<3>(6)) + node tmp62 = bit-and(tmp61, neq48) + node tmp63 = eq(br_type, UInt<3>(1)) + node tmp64 = bit-and(tmp63, lt52) + node tmp65 = eq(br_type, UInt<3>(5)) + node tmp66 = bit-and(tmp65, ge54) + node tmp67 = eq(br_type, UInt<3>(0)) + node tmp68 = bit-and(tmp67, ltu56) + node tmp69 = eq(br_type, UInt<3>(4)) + node tmp70 = bit-and(tmp69, geu58) + node tmp71 = bit-or(tmp68, tmp70) + node tmp72 = bit-or(tmp66, tmp71) + node tmp73 = bit-or(tmp64, tmp72) + node tmp74 = bit-or(tmp62, tmp73) + node tmp75 = bit-or(tmp60, tmp74) + taken := tmp75 + module RegFile : + input raddr1 : UInt<5> + input raddr2 : UInt<5> + input wen : UInt<1> + input waddr : UInt<5> + input wdata : UInt<32> + output rdata1 : UInt<32> + output rdata2 : UInt<32> + mem regs : UInt<32>[32] + node tmp76 = eq(raddr1, UInt<1>(0)) + node tmp77 = bit-not(tmp76) + accessor a78 = regs[raddr1] + node tmp79 = mux(tmp77, a78, UInt<1>(0)) + rdata1 := tmp79 + node tmp80 = eq(raddr2, UInt<1>(0)) + node tmp81 = bit-not(tmp80) + accessor a82 = regs[raddr2] + node tmp83 = mux(tmp81, a82, UInt<1>(0)) + rdata2 := tmp83 + node tmp84 = eq(waddr, UInt<1>(0)) + node tmp85 = bit-not(tmp84) + node tmp86 = bit-and(wen, tmp85) + when tmp86 : + accessor a87 = regs[waddr] + a87 := wdata + module ImmGenWire : + input inst : UInt<32> + input sel : UInt<3> + output out : UInt<32> + node tmp88 = bits(inst, 31, 20) + node tmp89 = convert(tmp88) + node Iimm90 = tmp89 + node tmp91 = bits(inst, 31, 25) + node tmp92 = bits(inst, 11, 7) + node tmp93 = cat(tmp91, tmp92) + node tmp94 = convert(tmp93) + node Simm95 = tmp94 + node tmp96 = bit(inst, 31) + node tmp97 = bit(inst, 7) + node tmp98 = bits(inst, 30, 25) + node tmp99 = bits(inst, 11, 8) + node tmp100 = cat(tmp96, tmp97) + node tmp101 = cat(tmp100, tmp98) + node tmp102 = cat(tmp101, tmp99) + node tmp103 = cat(tmp102, UInt<1>(0)) + node tmp104 = convert(tmp103) + node Bimm105 = tmp104 + node tmp106 = bits(inst, 31, 12) + node tmp107 = cat(tmp106, UInt<12>(0)) + node tmp108 = convert(tmp107) + node Uimm109 = tmp108 + node tmp110 = bit(inst, 31) + node tmp111 = bits(inst, 19, 12) + node tmp112 = bit(inst, 20) + node tmp113 = bits(inst, 30, 25) + node tmp114 = bits(inst, 24, 21) + node tmp115 = cat(tmp110, tmp111) + node tmp116 = cat(tmp115, tmp112) + node tmp117 = cat(tmp116, tmp113) + node tmp118 = cat(tmp117, tmp114) + node tmp119 = cat(tmp118, UInt<1>(0)) + node tmp120 = convert(tmp119) + node Jimm121 = tmp120 + node tmp122 = bits(inst, 19, 15) + node tmp123 = pad(tmp122, 32) + node tmp124 = convert(tmp123) + node Zimm125 = tmp124 + node tmp126 = eq(UInt<3>(3), sel) + node tmp127 = mux(tmp126, Jimm121, Zimm125) + node tmp128 = eq(UInt<3>(2), sel) + node tmp129 = mux(tmp128, Uimm109, tmp127) + node tmp130 = eq(UInt<3>(4), sel) + node tmp131 = mux(tmp130, Bimm105, tmp129) + node tmp132 = eq(UInt<3>(1), sel) + node tmp133 = mux(tmp132, Simm95, tmp131) + node tmp134 = eq(UInt<3>(0), sel) + node tmp135 = mux(tmp134, Iimm90, tmp133) + node tmp136 = as-UInt(tmp135) + out := tmp136 + module CSR : + input cmd : UInt<2> + input addr : UInt<12> + input src : UInt<32> + output host : {flip hid : UInt<1>, tohost : UInt<32>, status : UInt<32>} + output data : UInt<32> + reg reg_tohost238 : UInt<32> + on-reset reg_tohost238 := UInt<1>(0) + reg reg_status239 : UInt<32> + on-reset reg_status239 := UInt<1>(0) + host.tohost := reg_tohost238 + host.status := reg_status239 + node tmp240 = eq(UInt<12>(1291), addr) + node tmp241 = mux(tmp240, host.hid, UInt<1>(0)) + node tmp242 = eq(UInt<12>(1290), addr) + node tmp243 = mux(tmp242, reg_status239, tmp241) + node tmp244 = eq(UInt<12>(1310), addr) + node tmp245 = mux(tmp244, reg_tohost238, tmp243) + data := tmp245 + node tmp246 = eq(cmd, UInt<2>(1)) + when tmp246 : + node tmp247 = eq(addr, UInt<12>(1310)) + when tmp247 : + reg_tohost238 := src + node tmp248 = eq(addr, UInt<12>(1290)) + when tmp248 : + reg_status239 := src + node tmp249 = eq(cmd, UInt<2>(2)) + node tmp250 = neq(src, UInt<1>(0)) + node tmp251 = bit-and(tmp249, tmp250) + when tmp251 : + node tmp252 = eq(addr, UInt<12>(1310)) + when tmp252 : + node tmp253 = dshl(UInt<1>(1), src) + node tmp254 = bit-or(data, tmp253) + reg_tohost238 := tmp254 + node tmp255 = eq(addr, UInt<12>(1290)) + when tmp255 : + node tmp256 = dshl(UInt<1>(1), src) + node tmp257 = bit-or(data, tmp256) + reg_status239 := tmp257 + node tmp258 = eq(cmd, UInt<2>(3)) + node tmp259 = neq(src, UInt<1>(0)) + node tmp260 = bit-and(tmp258, tmp259) + when tmp260 : + node tmp261 = eq(addr, UInt<12>(1310)) + when tmp261 : + node tmp262 = dshl(UInt<1>(0), src) + node tmp263 = bit-and(data, tmp262) + reg_tohost238 := tmp263 + node tmp264 = eq(addr, UInt<12>(1290)) + when tmp264 : + node tmp265 = dshl(UInt<1>(0), src) + node tmp266 = bit-and(data, tmp265) + reg_status239 := tmp266 + module Datapath : + input stall : UInt<1> + input ctrl : {pc_sel : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, flip ins : UInt<32>, flip stall : UInt<1>} + output host : {flip hid : UInt<1>, tohost : UInt<32>, status : UInt<32>} + output icache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} + output dcache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} + inst alu of ALU + inst brCond of BrCond + inst regFile of RegFile + inst immGen of ImmGenWire + reg fe_inst137 : UInt<32> + on-reset fe_inst137 := UInt<1>(0) + reg fe_pc138 : UInt<?> + reg ew_inst139 : UInt<32> + on-reset ew_inst139 := UInt<1>(0) + reg ew_pc140 : UInt<?> + reg ew_alu141 : UInt<?> + reg pc142 : UInt<32> + node tmp143 = sub-wrap(UInt<14>(8192), UInt<32>(4)) + on-reset pc142 := tmp143 + node tmp144 = eq(ctrl.pc_sel, UInt<1>(1)) + node tmp145 = bit-or(tmp144, brCond.taken) + node tmp146 = add-wrap(pc142, UInt<3>(4)) + node tmp147 = mux(tmp145, alu.sum, tmp146) + node tmp148 = eq(ctrl.inst_type, UInt<1>(1)) + node tmp149 = bit-or(tmp148, brCond.taken) + node tmp150 = mux(tmp149, UInt<5>(19), icache.dout) + icache.we := UInt<1>(0) + icache.din := UInt<1>(0) + icache.addr := tmp147 + icache.re := ctrl.inst_re + node tmp151 = eq(dcache.we, UInt<1>(0)) + node tmp152 = bit-not(tmp151) + node tmp153 = bit-not(tmp152) + node tmp154 = bit-and(icache.re, tmp153) + node tmp155 = mux(tmp154, tmp147, pc142) + pc142 := tmp155 + node tmp156 = bit-not(stall) + when tmp156 : + fe_pc138 := pc142 + fe_inst137 := tmp150 + ctrl.ins := fe_inst137 + ctrl.stall := stall + node tmp157 = bits(fe_inst137, 11, 7) + node rd_addr158 = tmp157 + node tmp159 = bits(fe_inst137, 19, 15) + node rs1_addr160 = tmp159 + node tmp161 = bits(fe_inst137, 24, 20) + node rs2_addr162 = tmp161 + regFile.raddr1 := rs1_addr160 + regFile.raddr2 := rs2_addr162 + immGen.inst := fe_inst137 + immGen.sel := ctrl.imm_sel + node tmp163 = eq(rs1_addr160, UInt<1>(0)) + node tmp164 = bit-not(tmp163) + node rs1NotZero165 = tmp164 + node tmp166 = eq(rs2_addr162, UInt<1>(0)) + node tmp167 = bit-not(tmp166) + node rs2NotZero168 = tmp167 + node tmp169 = eq(ctrl.wb_sel, UInt<2>(0)) + node tmp170 = bit-and(ctrl.wb_en, tmp169) + node alutype171 = tmp170 + node tmp172 = bits(ew_inst139, 11, 7) + node ex_rd_addr173 = tmp172 + node tmp174 = eq(rs1_addr160, ex_rd_addr173) + node tmp175 = bit-and(rs1NotZero165, tmp174) + node tmp176 = bit-and(alutype171, tmp175) + node tmp177 = mux(tmp176, ew_alu141, regFile.rdata1) + node rs1178 = tmp177 + node tmp179 = eq(rs2_addr162, ex_rd_addr173) + node tmp180 = bit-and(rs2NotZero168, tmp179) + node tmp181 = bit-and(alutype171, tmp180) + node tmp182 = mux(tmp181, ew_alu141, regFile.rdata2) + node rs2183 = tmp182 + node tmp184 = eq(ctrl.A_sel, UInt<1>(0)) + node tmp185 = mux(tmp184, rs1178, fe_pc138) + alu.A := tmp185 + node tmp186 = eq(ctrl.B_sel, UInt<1>(0)) + node tmp187 = mux(tmp186, rs2183, immGen.out) + alu.B := tmp187 + alu.alu_op := ctrl.alu_op + brCond.rs1 := rs1178 + brCond.rs2 := rs2183 + brCond.br_type := ctrl.br_type + node tmp188 = bit(alu.sum, 1) + node tmp189 = shl(tmp188, 4) + node tmp190 = bit(alu.sum, 0) + node tmp191 = shl(tmp190, 3) + node tmp192 = bit-or(tmp189, tmp191) + node woffset193 = tmp192 + dcache.re := ctrl.data_re + node tmp194 = mux(stall, ew_alu141, alu.sum) + dcache.addr := tmp194 + node tmp195 = bits(alu.sum, 1, 0) + node tmp196 = dshl(UInt<2>(3), tmp195) + node tmp197 = bits(tmp196, 3, 0) + node tmp198 = bits(alu.sum, 1, 0) + node tmp199 = dshl(UInt<1>(1), tmp198) + node tmp200 = bits(tmp199, 3, 0) + node tmp201 = eq(UInt<2>(2), ctrl.st_type) + node tmp202 = mux(tmp201, tmp200, UInt<1>(0)) + node tmp203 = eq(UInt<2>(1), ctrl.st_type) + node tmp204 = mux(tmp203, tmp197, tmp202) + node tmp205 = eq(UInt<2>(0), ctrl.st_type) + node tmp206 = mux(tmp205, UInt<4>(15), tmp204) + node tmp207 = mux(stall, UInt<1>(0), tmp206) + dcache.we := tmp207 + node tmp208 = dshl(rs2183, woffset193) + node tmp209 = bits(tmp208, 31, 0) + dcache.din := tmp209 + node tmp210 = bit-not(stall) + when tmp210 : + ew_pc140 := fe_pc138 + ew_inst139 := fe_inst137 + ew_alu141 := alu.out + node tmp211 = bit(ew_alu141, 1) + node tmp212 = shl(tmp211, 4) + node tmp213 = bit(ew_alu141, 0) + node tmp214 = shl(tmp213, 3) + node tmp215 = bit-or(tmp212, tmp214) + node loffset216 = tmp215 + node tmp217 = dshr(dcache.dout, loffset216) + node lshift218 = tmp217 + node tmp219 = bits(lshift218, 15, 0) + node tmp220 = convert(tmp219) + node tmp221 = pad(tmp220, 32) + node tmp222 = as-UInt(tmp221) + node tmp223 = bits(lshift218, 7, 0) + node tmp224 = convert(tmp223) + node tmp225 = pad(tmp224, 32) + node tmp226 = as-UInt(tmp225) + node tmp227 = bits(lshift218, 15, 0) + node tmp228 = bits(lshift218, 7, 0) + node tmp229 = eq(UInt<3>(4), ctrl.ld_type) + node tmp230 = mux(tmp229, tmp228, dcache.dout) + node tmp231 = eq(UInt<3>(3), ctrl.ld_type) + node tmp232 = mux(tmp231, tmp227, tmp230) + node tmp233 = eq(UInt<3>(2), ctrl.ld_type) + node tmp234 = mux(tmp233, tmp226, tmp232) + node tmp235 = eq(UInt<3>(1), ctrl.ld_type) + node tmp236 = mux(tmp235, tmp222, tmp234) + node load237 = tmp236 + inst csr of CSR + host := csr.host + csr.src := ew_alu141 + node tmp267 = bits(ew_inst139, 31, 20) + csr.addr := tmp267 + csr.cmd := ctrl.csr_cmd + node tmp268 = add-wrap(ew_pc140, UInt<3>(4)) + node tmp269 = eq(UInt<2>(3), ctrl.wb_sel) + node tmp270 = mux(tmp269, csr.data, ew_alu141) + node tmp271 = eq(UInt<2>(2), ctrl.wb_sel) + node tmp272 = mux(tmp271, tmp268, tmp270) + node tmp273 = eq(UInt<2>(1), ctrl.wb_sel) + node tmp274 = mux(tmp273, load237, tmp272) + node regWrite275 = tmp274 + regFile.wen := ctrl.wb_en + regFile.waddr := ex_rd_addr173 + regFile.wdata := regWrite275 + module Control : + output ctrl : {pc_sel : UInt<1>, inst_re : UInt<1>, inst_type : UInt<1>, A_sel : UInt<1>, B_sel : UInt<1>, imm_sel : UInt<3>, alu_op : UInt<4>, br_type : UInt<3>, data_re : UInt<1>, st_type : UInt<2>, ld_type : UInt<3>, wb_sel : UInt<2>, wb_en : UInt<1>, csr_cmd : UInt<2>, flip ins : UInt<32>, flip stall : UInt<1>} + node tmp276 = bit-and(UInt<32>(127), ctrl.ins) + node tmp277 = eq(tmp276, UInt<32>(55)) + node tmp278 = bit-and(UInt<32>(127), ctrl.ins) + node tmp279 = eq(tmp278, UInt<32>(23)) + node tmp280 = bit-and(UInt<32>(127), ctrl.ins) + node tmp281 = eq(tmp280, UInt<32>(111)) + node tmp282 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp283 = eq(tmp282, UInt<32>(103)) + node tmp284 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp285 = eq(tmp284, UInt<32>(99)) + node tmp286 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp287 = eq(tmp286, UInt<32>(4195)) + node tmp288 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp289 = eq(tmp288, UInt<32>(16483)) + node tmp290 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp291 = eq(tmp290, UInt<32>(20579)) + node tmp292 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp293 = eq(tmp292, UInt<32>(24675)) + node tmp294 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp295 = eq(tmp294, UInt<32>(28771)) + node tmp296 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp297 = eq(tmp296, UInt<32>(3)) + node tmp298 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp299 = eq(tmp298, UInt<32>(4099)) + node tmp300 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp301 = eq(tmp300, UInt<32>(8195)) + node tmp302 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp303 = eq(tmp302, UInt<32>(16387)) + node tmp304 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp305 = eq(tmp304, UInt<32>(20483)) + node tmp306 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp307 = eq(tmp306, UInt<32>(35)) + node tmp308 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp309 = eq(tmp308, UInt<32>(4131)) + node tmp310 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp311 = eq(tmp310, UInt<32>(8227)) + node tmp312 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp313 = eq(tmp312, UInt<32>(19)) + node tmp314 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp315 = eq(tmp314, UInt<32>(8211)) + node tmp316 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp317 = eq(tmp316, UInt<32>(12307)) + node tmp318 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp319 = eq(tmp318, UInt<32>(16403)) + node tmp320 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp321 = eq(tmp320, UInt<32>(24595)) + node tmp322 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp323 = eq(tmp322, UInt<32>(28691)) + node tmp324 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp325 = eq(tmp324, UInt<32>(4115)) + node tmp326 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp327 = eq(tmp326, UInt<32>(20499)) + node tmp328 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp329 = eq(tmp328, UInt<32>(1073762323)) + node tmp330 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp331 = eq(tmp330, UInt<32>(51)) + node tmp332 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp333 = eq(tmp332, UInt<32>(1073741875)) + node tmp334 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp335 = eq(tmp334, UInt<32>(4147)) + node tmp336 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp337 = eq(tmp336, UInt<32>(8243)) + node tmp338 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp339 = eq(tmp338, UInt<32>(12339)) + node tmp340 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp341 = eq(tmp340, UInt<32>(16435)) + node tmp342 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp343 = eq(tmp342, UInt<32>(20531)) + node tmp344 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp345 = eq(tmp344, UInt<32>(1073762355)) + node tmp346 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp347 = eq(tmp346, UInt<32>(24627)) + node tmp348 = bit-and(UInt<32>(-33525633), ctrl.ins) + node tmp349 = eq(tmp348, UInt<32>(28723)) + node tmp350 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp351 = eq(tmp350, UInt<32>(4211)) + node tmp352 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp353 = eq(tmp352, UInt<32>(8307)) + node tmp354 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp355 = eq(tmp354, UInt<32>(12403)) + node tmp356 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp357 = eq(tmp356, UInt<32>(20595)) + node tmp358 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp359 = eq(tmp358, UInt<32>(24691)) + node tmp360 = bit-and(UInt<32>(28799), ctrl.ins) + node tmp361 = eq(tmp360, UInt<32>(28787)) + node tmp362 = mux(tmp361, UInt<1>(0), UInt<1>(0)) + node tmp363 = mux(tmp359, UInt<1>(0), tmp362) + node tmp364 = mux(tmp357, UInt<1>(0), tmp363) + node tmp365 = mux(tmp355, UInt<1>(0), tmp364) + node tmp366 = mux(tmp353, UInt<1>(0), tmp365) + node tmp367 = mux(tmp351, UInt<1>(0), tmp366) + node tmp368 = mux(tmp349, UInt<1>(0), tmp367) + node tmp369 = mux(tmp347, UInt<1>(0), tmp368) + node tmp370 = mux(tmp345, UInt<1>(0), tmp369) + node tmp371 = mux(tmp343, UInt<1>(0), tmp370) + node tmp372 = mux(tmp341, UInt<1>(0), tmp371) + node tmp373 = mux(tmp339, UInt<1>(0), tmp372) + node tmp374 = mux(tmp337, UInt<1>(0), tmp373) + node tmp375 = mux(tmp335, UInt<1>(0), tmp374) + node tmp376 = mux(tmp333, UInt<1>(0), tmp375) + node tmp377 = mux(tmp331, UInt<1>(0), tmp376) + node tmp378 = mux(tmp329, UInt<1>(0), tmp377) + node tmp379 = mux(tmp327, UInt<1>(0), tmp378) + node tmp380 = mux(tmp325, UInt<1>(0), tmp379) + node tmp381 = mux(tmp323, UInt<1>(0), tmp380) + node tmp382 = mux(tmp321, UInt<1>(0), tmp381) + node tmp383 = mux(tmp319, UInt<1>(0), tmp382) + node tmp384 = mux(tmp317, UInt<1>(0), tmp383) + node tmp385 = mux(tmp315, UInt<1>(0), tmp384) + node tmp386 = mux(tmp313, UInt<1>(0), tmp385) + node tmp387 = mux(tmp311, UInt<1>(0), tmp386) + node tmp388 = mux(tmp309, UInt<1>(0), tmp387) + node tmp389 = mux(tmp307, UInt<1>(0), tmp388) + node tmp390 = mux(tmp305, UInt<1>(0), tmp389) + node tmp391 = mux(tmp303, UInt<1>(0), tmp390) + node tmp392 = mux(tmp301, UInt<1>(0), tmp391) + node tmp393 = mux(tmp299, UInt<1>(0), tmp392) + node tmp394 = mux(tmp297, UInt<1>(0), tmp393) + node tmp395 = mux(tmp295, UInt<1>(0), tmp394) + node tmp396 = mux(tmp293, UInt<1>(0), tmp395) + node tmp397 = mux(tmp291, UInt<1>(0), tmp396) + node tmp398 = mux(tmp289, UInt<1>(0), tmp397) + node tmp399 = mux(tmp287, UInt<1>(0), tmp398) + node tmp400 = mux(tmp285, UInt<1>(0), tmp399) + node tmp401 = mux(tmp283, UInt<1>(1), tmp400) + node tmp402 = mux(tmp281, UInt<1>(1), tmp401) + node tmp403 = mux(tmp279, UInt<1>(0), tmp402) + node tmp404 = mux(tmp277, UInt<1>(0), tmp403) + node tmp405 = mux(tmp361, UInt<1>(1), UInt<1>(1)) + node tmp406 = mux(tmp359, UInt<1>(1), tmp405) + node tmp407 = mux(tmp357, UInt<1>(1), tmp406) + node tmp408 = mux(tmp355, UInt<1>(0), tmp407) + node tmp409 = mux(tmp353, UInt<1>(0), tmp408) + node tmp410 = mux(tmp351, UInt<1>(0), tmp409) + node tmp411 = mux(tmp349, UInt<1>(0), tmp410) + node tmp412 = mux(tmp347, UInt<1>(0), tmp411) + node tmp413 = mux(tmp345, UInt<1>(0), tmp412) + node tmp414 = mux(tmp343, UInt<1>(0), tmp413) + node tmp415 = mux(tmp341, UInt<1>(0), tmp414) + node tmp416 = mux(tmp339, UInt<1>(0), tmp415) + node tmp417 = mux(tmp337, UInt<1>(0), tmp416) + node tmp418 = mux(tmp335, UInt<1>(0), tmp417) + node tmp419 = mux(tmp333, UInt<1>(0), tmp418) + node tmp420 = mux(tmp331, UInt<1>(0), tmp419) + node tmp421 = mux(tmp329, UInt<1>(0), tmp420) + node tmp422 = mux(tmp327, UInt<1>(0), tmp421) + node tmp423 = mux(tmp325, UInt<1>(0), tmp422) + node tmp424 = mux(tmp323, UInt<1>(0), tmp423) + node tmp425 = mux(tmp321, UInt<1>(0), tmp424) + node tmp426 = mux(tmp319, UInt<1>(0), tmp425) + node tmp427 = mux(tmp317, UInt<1>(0), tmp426) + node tmp428 = mux(tmp315, UInt<1>(0), tmp427) + node tmp429 = mux(tmp313, UInt<1>(0), tmp428) + node tmp430 = mux(tmp311, UInt<1>(0), tmp429) + node tmp431 = mux(tmp309, UInt<1>(0), tmp430) + node tmp432 = mux(tmp307, UInt<1>(0), tmp431) + node tmp433 = mux(tmp305, UInt<1>(0), tmp432) + node tmp434 = mux(tmp303, UInt<1>(0), tmp433) + node tmp435 = mux(tmp301, UInt<1>(0), tmp434) + node tmp436 = mux(tmp299, UInt<1>(0), tmp435) + node tmp437 = mux(tmp297, UInt<1>(0), tmp436) + node tmp438 = mux(tmp295, UInt<1>(1), tmp437) + node tmp439 = mux(tmp293, UInt<1>(1), tmp438) + node tmp440 = mux(tmp291, UInt<1>(1), tmp439) + node tmp441 = mux(tmp289, UInt<1>(1), tmp440) + node tmp442 = mux(tmp287, UInt<1>(1), tmp441) + node tmp443 = mux(tmp285, UInt<1>(1), tmp442) + node tmp444 = mux(tmp283, UInt<1>(0), tmp443) + node tmp445 = mux(tmp281, UInt<1>(1), tmp444) + node tmp446 = mux(tmp279, UInt<1>(1), tmp445) + node tmp447 = mux(tmp277, UInt<1>(1), tmp446) + node tmp448 = mux(tmp361, UInt<1>(1), UInt<1>(0)) + node tmp449 = mux(tmp359, UInt<1>(1), tmp448) + node tmp450 = mux(tmp357, UInt<1>(1), tmp449) + node tmp451 = mux(tmp355, UInt<1>(0), tmp450) + node tmp452 = mux(tmp353, UInt<1>(0), tmp451) + node tmp453 = mux(tmp351, UInt<1>(0), tmp452) + node tmp454 = mux(tmp349, UInt<1>(0), tmp453) + node tmp455 = mux(tmp347, UInt<1>(0), tmp454) + node tmp456 = mux(tmp345, UInt<1>(0), tmp455) + node tmp457 = mux(tmp343, UInt<1>(0), tmp456) + node tmp458 = mux(tmp341, UInt<1>(0), tmp457) + node tmp459 = mux(tmp339, UInt<1>(0), tmp458) + node tmp460 = mux(tmp337, UInt<1>(0), tmp459) + node tmp461 = mux(tmp335, UInt<1>(0), tmp460) + node tmp462 = mux(tmp333, UInt<1>(0), tmp461) + node tmp463 = mux(tmp331, UInt<1>(0), tmp462) + node tmp464 = mux(tmp329, UInt<1>(1), tmp463) + node tmp465 = mux(tmp327, UInt<1>(1), tmp464) + node tmp466 = mux(tmp325, UInt<1>(1), tmp465) + node tmp467 = mux(tmp323, UInt<1>(1), tmp466) + node tmp468 = mux(tmp321, UInt<1>(1), tmp467) + node tmp469 = mux(tmp319, UInt<1>(1), tmp468) + node tmp470 = mux(tmp317, UInt<1>(1), tmp469) + node tmp471 = mux(tmp315, UInt<1>(1), tmp470) + node tmp472 = mux(tmp313, UInt<1>(1), tmp471) + node tmp473 = mux(tmp311, UInt<1>(1), tmp472) + node tmp474 = mux(tmp309, UInt<1>(1), tmp473) + node tmp475 = mux(tmp307, UInt<1>(1), tmp474) + node tmp476 = mux(tmp305, UInt<1>(1), tmp475) + node tmp477 = mux(tmp303, UInt<1>(1), tmp476) + node tmp478 = mux(tmp301, UInt<1>(1), tmp477) + node tmp479 = mux(tmp299, UInt<1>(1), tmp478) + node tmp480 = mux(tmp297, UInt<1>(1), tmp479) + node tmp481 = mux(tmp295, UInt<1>(1), tmp480) + node tmp482 = mux(tmp293, UInt<1>(1), tmp481) + node tmp483 = mux(tmp291, UInt<1>(1), tmp482) + node tmp484 = mux(tmp289, UInt<1>(1), tmp483) + node tmp485 = mux(tmp287, UInt<1>(1), tmp484) + node tmp486 = mux(tmp285, UInt<1>(1), tmp485) + node tmp487 = mux(tmp283, UInt<1>(1), tmp486) + node tmp488 = mux(tmp281, UInt<1>(1), tmp487) + node tmp489 = mux(tmp279, UInt<1>(1), tmp488) + node tmp490 = mux(tmp277, UInt<1>(1), tmp489) + node tmp491 = mux(tmp361, UInt<3>(5), UInt<3>(7)) + node tmp492 = mux(tmp359, UInt<3>(5), tmp491) + node tmp493 = mux(tmp357, UInt<3>(5), tmp492) + node tmp494 = mux(tmp355, UInt<3>(5), tmp493) + node tmp495 = mux(tmp353, UInt<3>(5), tmp494) + node tmp496 = mux(tmp351, UInt<3>(5), tmp495) + node tmp497 = mux(tmp349, UInt<3>(7), tmp496) + node tmp498 = mux(tmp347, UInt<3>(7), tmp497) + node tmp499 = mux(tmp345, UInt<3>(7), tmp498) + node tmp500 = mux(tmp343, UInt<3>(7), tmp499) + node tmp501 = mux(tmp341, UInt<3>(7), tmp500) + node tmp502 = mux(tmp339, UInt<3>(7), tmp501) + node tmp503 = mux(tmp337, UInt<3>(7), tmp502) + node tmp504 = mux(tmp335, UInt<3>(7), tmp503) + node tmp505 = mux(tmp333, UInt<3>(7), tmp504) + node tmp506 = mux(tmp331, UInt<3>(7), tmp505) + node tmp507 = mux(tmp329, UInt<3>(0), tmp506) + node tmp508 = mux(tmp327, UInt<3>(0), tmp507) + node tmp509 = mux(tmp325, UInt<3>(0), tmp508) + node tmp510 = mux(tmp323, UInt<3>(0), tmp509) + node tmp511 = mux(tmp321, UInt<3>(0), tmp510) + node tmp512 = mux(tmp319, UInt<3>(0), tmp511) + node tmp513 = mux(tmp317, UInt<3>(0), tmp512) + node tmp514 = mux(tmp315, UInt<3>(0), tmp513) + node tmp515 = mux(tmp313, UInt<3>(0), tmp514) + node tmp516 = mux(tmp311, UInt<3>(1), tmp515) + node tmp517 = mux(tmp309, UInt<3>(1), tmp516) + node tmp518 = mux(tmp307, UInt<3>(1), tmp517) + node tmp519 = mux(tmp305, UInt<3>(0), tmp518) + node tmp520 = mux(tmp303, UInt<3>(0), tmp519) + node tmp521 = mux(tmp301, UInt<3>(0), tmp520) + node tmp522 = mux(tmp299, UInt<3>(0), tmp521) + node tmp523 = mux(tmp297, UInt<3>(0), tmp522) + node tmp524 = mux(tmp295, UInt<3>(4), tmp523) + node tmp525 = mux(tmp293, UInt<3>(4), tmp524) + node tmp526 = mux(tmp291, UInt<3>(4), tmp525) + node tmp527 = mux(tmp289, UInt<3>(4), tmp526) + node tmp528 = mux(tmp287, UInt<3>(4), tmp527) + node tmp529 = mux(tmp285, UInt<3>(4), tmp528) + node tmp530 = mux(tmp283, UInt<3>(0), tmp529) + node tmp531 = mux(tmp281, UInt<3>(3), tmp530) + node tmp532 = mux(tmp279, UInt<3>(2), tmp531) + node tmp533 = mux(tmp277, UInt<3>(2), tmp532) + node tmp534 = mux(tmp361, UInt<4>(11), UInt<4>(15)) + node tmp535 = mux(tmp359, UInt<4>(11), tmp534) + node tmp536 = mux(tmp357, UInt<4>(11), tmp535) + node tmp537 = mux(tmp355, UInt<4>(10), tmp536) + node tmp538 = mux(tmp353, UInt<4>(10), tmp537) + node tmp539 = mux(tmp351, UInt<4>(10), tmp538) + node tmp540 = mux(tmp349, UInt<4>(2), tmp539) + node tmp541 = mux(tmp347, UInt<4>(3), tmp540) + node tmp542 = mux(tmp345, UInt<4>(9), tmp541) + node tmp543 = mux(tmp343, UInt<4>(8), tmp542) + node tmp544 = mux(tmp341, UInt<4>(4), tmp543) + node tmp545 = mux(tmp339, UInt<4>(7), tmp544) + node tmp546 = mux(tmp337, UInt<4>(5), tmp545) + node tmp547 = mux(tmp335, UInt<4>(6), tmp546) + node tmp548 = mux(tmp333, UInt<4>(1), tmp547) + node tmp549 = mux(tmp331, UInt<4>(0), tmp548) + node tmp550 = mux(tmp329, UInt<4>(9), tmp549) + node tmp551 = mux(tmp327, UInt<4>(8), tmp550) + node tmp552 = mux(tmp325, UInt<4>(6), tmp551) + node tmp553 = mux(tmp323, UInt<4>(2), tmp552) + node tmp554 = mux(tmp321, UInt<4>(3), tmp553) + node tmp555 = mux(tmp319, UInt<4>(4), tmp554) + node tmp556 = mux(tmp317, UInt<4>(7), tmp555) + node tmp557 = mux(tmp315, UInt<4>(5), tmp556) + node tmp558 = mux(tmp313, UInt<4>(0), tmp557) + node tmp559 = mux(tmp311, UInt<4>(0), tmp558) + node tmp560 = mux(tmp309, UInt<4>(0), tmp559) + node tmp561 = mux(tmp307, UInt<4>(0), tmp560) + node tmp562 = mux(tmp305, UInt<4>(0), tmp561) + node tmp563 = mux(tmp303, UInt<4>(0), tmp562) + node tmp564 = mux(tmp301, UInt<4>(0), tmp563) + node tmp565 = mux(tmp299, UInt<4>(0), tmp564) + node tmp566 = mux(tmp297, UInt<4>(0), tmp565) + node tmp567 = mux(tmp295, UInt<4>(0), tmp566) + node tmp568 = mux(tmp293, UInt<4>(0), tmp567) + node tmp569 = mux(tmp291, UInt<4>(0), tmp568) + node tmp570 = mux(tmp289, UInt<4>(0), tmp569) + node tmp571 = mux(tmp287, UInt<4>(0), tmp570) + node tmp572 = mux(tmp285, UInt<4>(0), tmp571) + node tmp573 = mux(tmp283, UInt<4>(0), tmp572) + node tmp574 = mux(tmp281, UInt<4>(0), tmp573) + node tmp575 = mux(tmp279, UInt<4>(0), tmp574) + node tmp576 = mux(tmp277, UInt<4>(11), tmp575) + node tmp577 = mux(tmp361, UInt<3>(7), UInt<3>(7)) + node tmp578 = mux(tmp359, UInt<3>(7), tmp577) + node tmp579 = mux(tmp357, UInt<3>(7), tmp578) + node tmp580 = mux(tmp355, UInt<3>(7), tmp579) + node tmp581 = mux(tmp353, UInt<3>(7), tmp580) + node tmp582 = mux(tmp351, UInt<3>(7), tmp581) + node tmp583 = mux(tmp349, UInt<3>(7), tmp582) + node tmp584 = mux(tmp347, UInt<3>(7), tmp583) + node tmp585 = mux(tmp345, UInt<3>(7), tmp584) + node tmp586 = mux(tmp343, UInt<3>(7), tmp585) + node tmp587 = mux(tmp341, UInt<3>(7), tmp586) + node tmp588 = mux(tmp339, UInt<3>(7), tmp587) + node tmp589 = mux(tmp337, UInt<3>(7), tmp588) + node tmp590 = mux(tmp335, UInt<3>(7), tmp589) + node tmp591 = mux(tmp333, UInt<3>(7), tmp590) + node tmp592 = mux(tmp331, UInt<3>(7), tmp591) + node tmp593 = mux(tmp329, UInt<3>(7), tmp592) + node tmp594 = mux(tmp327, UInt<3>(7), tmp593) + node tmp595 = mux(tmp325, UInt<3>(7), tmp594) + node tmp596 = mux(tmp323, UInt<3>(7), tmp595) + node tmp597 = mux(tmp321, UInt<3>(7), tmp596) + node tmp598 = mux(tmp319, UInt<3>(7), tmp597) + node tmp599 = mux(tmp317, UInt<3>(7), tmp598) + node tmp600 = mux(tmp315, UInt<3>(7), tmp599) + node tmp601 = mux(tmp313, UInt<3>(7), tmp600) + node tmp602 = mux(tmp311, UInt<3>(7), tmp601) + node tmp603 = mux(tmp309, UInt<3>(7), tmp602) + node tmp604 = mux(tmp307, UInt<3>(7), tmp603) + node tmp605 = mux(tmp305, UInt<3>(7), tmp604) + node tmp606 = mux(tmp303, UInt<3>(7), tmp605) + node tmp607 = mux(tmp301, UInt<3>(7), tmp606) + node tmp608 = mux(tmp299, UInt<3>(7), tmp607) + node tmp609 = mux(tmp297, UInt<3>(7), tmp608) + node tmp610 = mux(tmp295, UInt<3>(4), tmp609) + node tmp611 = mux(tmp293, UInt<3>(0), tmp610) + node tmp612 = mux(tmp291, UInt<3>(5), tmp611) + node tmp613 = mux(tmp289, UInt<3>(1), tmp612) + node tmp614 = mux(tmp287, UInt<3>(6), tmp613) + node tmp615 = mux(tmp285, UInt<3>(2), tmp614) + node tmp616 = mux(tmp283, UInt<3>(7), tmp615) + node tmp617 = mux(tmp281, UInt<3>(7), tmp616) + node tmp618 = mux(tmp279, UInt<3>(7), tmp617) + node tmp619 = mux(tmp277, UInt<3>(7), tmp618) + node tmp620 = mux(tmp361, UInt<1>(0), UInt<1>(0)) + node tmp621 = mux(tmp359, UInt<1>(0), tmp620) + node tmp622 = mux(tmp357, UInt<1>(0), tmp621) + node tmp623 = mux(tmp355, UInt<1>(0), tmp622) + node tmp624 = mux(tmp353, UInt<1>(0), tmp623) + node tmp625 = mux(tmp351, UInt<1>(0), tmp624) + node tmp626 = mux(tmp349, UInt<1>(0), tmp625) + node tmp627 = mux(tmp347, UInt<1>(0), tmp626) + node tmp628 = mux(tmp345, UInt<1>(0), tmp627) + node tmp629 = mux(tmp343, UInt<1>(0), tmp628) + node tmp630 = mux(tmp341, UInt<1>(0), tmp629) + node tmp631 = mux(tmp339, UInt<1>(0), tmp630) + node tmp632 = mux(tmp337, UInt<1>(0), tmp631) + node tmp633 = mux(tmp335, UInt<1>(0), tmp632) + node tmp634 = mux(tmp333, UInt<1>(0), tmp633) + node tmp635 = mux(tmp331, UInt<1>(0), tmp634) + node tmp636 = mux(tmp329, UInt<1>(0), tmp635) + node tmp637 = mux(tmp327, UInt<1>(0), tmp636) + node tmp638 = mux(tmp325, UInt<1>(0), tmp637) + node tmp639 = mux(tmp323, UInt<1>(0), tmp638) + node tmp640 = mux(tmp321, UInt<1>(0), tmp639) + node tmp641 = mux(tmp319, UInt<1>(0), tmp640) + node tmp642 = mux(tmp317, UInt<1>(0), tmp641) + node tmp643 = mux(tmp315, UInt<1>(0), tmp642) + node tmp644 = mux(tmp313, UInt<1>(0), tmp643) + node tmp645 = mux(tmp311, UInt<1>(0), tmp644) + node tmp646 = mux(tmp309, UInt<1>(0), tmp645) + node tmp647 = mux(tmp307, UInt<1>(0), tmp646) + node tmp648 = mux(tmp305, UInt<1>(0), tmp647) + node tmp649 = mux(tmp303, UInt<1>(0), tmp648) + node tmp650 = mux(tmp301, UInt<1>(0), tmp649) + node tmp651 = mux(tmp299, UInt<1>(0), tmp650) + node tmp652 = mux(tmp297, UInt<1>(0), tmp651) + node tmp653 = mux(tmp295, UInt<1>(0), tmp652) + node tmp654 = mux(tmp293, UInt<1>(0), tmp653) + node tmp655 = mux(tmp291, UInt<1>(0), tmp654) + node tmp656 = mux(tmp289, UInt<1>(0), tmp655) + node tmp657 = mux(tmp287, UInt<1>(0), tmp656) + node tmp658 = mux(tmp285, UInt<1>(0), tmp657) + node tmp659 = mux(tmp283, UInt<1>(1), tmp658) + node tmp660 = mux(tmp281, UInt<1>(1), tmp659) + node tmp661 = mux(tmp279, UInt<1>(0), tmp660) + node tmp662 = mux(tmp277, UInt<1>(0), tmp661) + node tmp663 = mux(tmp361, UInt<2>(3), UInt<2>(3)) + node tmp664 = mux(tmp359, UInt<2>(3), tmp663) + node tmp665 = mux(tmp357, UInt<2>(3), tmp664) + node tmp666 = mux(tmp355, UInt<2>(3), tmp665) + node tmp667 = mux(tmp353, UInt<2>(3), tmp666) + node tmp668 = mux(tmp351, UInt<2>(3), tmp667) + node tmp669 = mux(tmp349, UInt<2>(3), tmp668) + node tmp670 = mux(tmp347, UInt<2>(3), tmp669) + node tmp671 = mux(tmp345, UInt<2>(3), tmp670) + node tmp672 = mux(tmp343, UInt<2>(3), tmp671) + node tmp673 = mux(tmp341, UInt<2>(3), tmp672) + node tmp674 = mux(tmp339, UInt<2>(3), tmp673) + node tmp675 = mux(tmp337, UInt<2>(3), tmp674) + node tmp676 = mux(tmp335, UInt<2>(3), tmp675) + node tmp677 = mux(tmp333, UInt<2>(3), tmp676) + node tmp678 = mux(tmp331, UInt<2>(3), tmp677) + node tmp679 = mux(tmp329, UInt<2>(3), tmp678) + node tmp680 = mux(tmp327, UInt<2>(3), tmp679) + node tmp681 = mux(tmp325, UInt<2>(3), tmp680) + node tmp682 = mux(tmp323, UInt<2>(3), tmp681) + node tmp683 = mux(tmp321, UInt<2>(3), tmp682) + node tmp684 = mux(tmp319, UInt<2>(3), tmp683) + node tmp685 = mux(tmp317, UInt<2>(3), tmp684) + node tmp686 = mux(tmp315, UInt<2>(3), tmp685) + node tmp687 = mux(tmp313, UInt<2>(3), tmp686) + node tmp688 = mux(tmp311, UInt<2>(0), tmp687) + node tmp689 = mux(tmp309, UInt<2>(1), tmp688) + node tmp690 = mux(tmp307, UInt<2>(2), tmp689) + node tmp691 = mux(tmp305, UInt<2>(3), tmp690) + node tmp692 = mux(tmp303, UInt<2>(3), tmp691) + node tmp693 = mux(tmp301, UInt<2>(3), tmp692) + node tmp694 = mux(tmp299, UInt<2>(3), tmp693) + node tmp695 = mux(tmp297, UInt<2>(3), tmp694) + node tmp696 = mux(tmp295, UInt<2>(3), tmp695) + node tmp697 = mux(tmp293, UInt<2>(3), tmp696) + node tmp698 = mux(tmp291, UInt<2>(3), tmp697) + node tmp699 = mux(tmp289, UInt<2>(3), tmp698) + node tmp700 = mux(tmp287, UInt<2>(3), tmp699) + node tmp701 = mux(tmp285, UInt<2>(3), tmp700) + node tmp702 = mux(tmp283, UInt<2>(3), tmp701) + node tmp703 = mux(tmp281, UInt<2>(3), tmp702) + node tmp704 = mux(tmp279, UInt<2>(3), tmp703) + node tmp705 = mux(tmp277, UInt<2>(3), tmp704) + node tmp706 = mux(tmp361, UInt<3>(7), UInt<3>(7)) + node tmp707 = mux(tmp359, UInt<3>(7), tmp706) + node tmp708 = mux(tmp357, UInt<3>(7), tmp707) + node tmp709 = mux(tmp355, UInt<3>(7), tmp708) + node tmp710 = mux(tmp353, UInt<3>(7), tmp709) + node tmp711 = mux(tmp351, UInt<3>(7), tmp710) + node tmp712 = mux(tmp349, UInt<3>(7), tmp711) + node tmp713 = mux(tmp347, UInt<3>(7), tmp712) + node tmp714 = mux(tmp345, UInt<3>(7), tmp713) + node tmp715 = mux(tmp343, UInt<3>(7), tmp714) + node tmp716 = mux(tmp341, UInt<3>(7), tmp715) + node tmp717 = mux(tmp339, UInt<3>(7), tmp716) + node tmp718 = mux(tmp337, UInt<3>(7), tmp717) + node tmp719 = mux(tmp335, UInt<3>(7), tmp718) + node tmp720 = mux(tmp333, UInt<3>(7), tmp719) + node tmp721 = mux(tmp331, UInt<3>(7), tmp720) + node tmp722 = mux(tmp329, UInt<3>(7), tmp721) + node tmp723 = mux(tmp327, UInt<3>(7), tmp722) + node tmp724 = mux(tmp325, UInt<3>(7), tmp723) + node tmp725 = mux(tmp323, UInt<3>(7), tmp724) + node tmp726 = mux(tmp321, UInt<3>(7), tmp725) + node tmp727 = mux(tmp319, UInt<3>(7), tmp726) + node tmp728 = mux(tmp317, UInt<3>(7), tmp727) + node tmp729 = mux(tmp315, UInt<3>(7), tmp728) + node tmp730 = mux(tmp313, UInt<3>(7), tmp729) + node tmp731 = mux(tmp311, UInt<3>(7), tmp730) + node tmp732 = mux(tmp309, UInt<3>(7), tmp731) + node tmp733 = mux(tmp307, UInt<3>(7), tmp732) + node tmp734 = mux(tmp305, UInt<3>(3), tmp733) + node tmp735 = mux(tmp303, UInt<3>(4), tmp734) + node tmp736 = mux(tmp301, UInt<3>(0), tmp735) + node tmp737 = mux(tmp299, UInt<3>(1), tmp736) + node tmp738 = mux(tmp297, UInt<3>(2), tmp737) + node tmp739 = mux(tmp295, UInt<3>(7), tmp738) + node tmp740 = mux(tmp293, UInt<3>(7), tmp739) + node tmp741 = mux(tmp291, UInt<3>(7), tmp740) + node tmp742 = mux(tmp289, UInt<3>(7), tmp741) + node tmp743 = mux(tmp287, UInt<3>(7), tmp742) + node tmp744 = mux(tmp285, UInt<3>(7), tmp743) + node tmp745 = mux(tmp283, UInt<3>(7), tmp744) + node tmp746 = mux(tmp281, UInt<3>(7), tmp745) + node tmp747 = mux(tmp279, UInt<3>(7), tmp746) + node tmp748 = mux(tmp277, UInt<3>(7), tmp747) + node tmp749 = mux(tmp361, UInt<2>(3), UInt<2>(0)) + node tmp750 = mux(tmp359, UInt<2>(3), tmp749) + node tmp751 = mux(tmp357, UInt<2>(3), tmp750) + node tmp752 = mux(tmp355, UInt<2>(3), tmp751) + node tmp753 = mux(tmp353, UInt<2>(3), tmp752) + node tmp754 = mux(tmp351, UInt<2>(3), tmp753) + node tmp755 = mux(tmp349, UInt<2>(0), tmp754) + node tmp756 = mux(tmp347, UInt<2>(0), tmp755) + node tmp757 = mux(tmp345, UInt<2>(0), tmp756) + node tmp758 = mux(tmp343, UInt<2>(0), tmp757) + node tmp759 = mux(tmp341, UInt<2>(0), tmp758) + node tmp760 = mux(tmp339, UInt<2>(0), tmp759) + node tmp761 = mux(tmp337, UInt<2>(0), tmp760) + node tmp762 = mux(tmp335, UInt<2>(0), tmp761) + node tmp763 = mux(tmp333, UInt<2>(0), tmp762) + node tmp764 = mux(tmp331, UInt<2>(0), tmp763) + node tmp765 = mux(tmp329, UInt<2>(0), tmp764) + node tmp766 = mux(tmp327, UInt<2>(0), tmp765) + node tmp767 = mux(tmp325, UInt<2>(0), tmp766) + node tmp768 = mux(tmp323, UInt<2>(0), tmp767) + node tmp769 = mux(tmp321, UInt<2>(0), tmp768) + node tmp770 = mux(tmp319, UInt<2>(0), tmp769) + node tmp771 = mux(tmp317, UInt<2>(0), tmp770) + node tmp772 = mux(tmp315, UInt<2>(0), tmp771) + node tmp773 = mux(tmp313, UInt<2>(0), tmp772) + node tmp774 = mux(tmp311, UInt<2>(0), tmp773) + node tmp775 = mux(tmp309, UInt<2>(0), tmp774) + node tmp776 = mux(tmp307, UInt<2>(0), tmp775) + node tmp777 = mux(tmp305, UInt<2>(1), tmp776) + node tmp778 = mux(tmp303, UInt<2>(1), tmp777) + node tmp779 = mux(tmp301, UInt<2>(1), tmp778) + node tmp780 = mux(tmp299, UInt<2>(1), tmp779) + node tmp781 = mux(tmp297, UInt<2>(1), tmp780) + node tmp782 = mux(tmp295, UInt<2>(0), tmp781) + node tmp783 = mux(tmp293, UInt<2>(0), tmp782) + node tmp784 = mux(tmp291, UInt<2>(0), tmp783) + node tmp785 = mux(tmp289, UInt<2>(0), tmp784) + node tmp786 = mux(tmp287, UInt<2>(0), tmp785) + node tmp787 = mux(tmp285, UInt<2>(0), tmp786) + node tmp788 = mux(tmp283, UInt<2>(2), tmp787) + node tmp789 = mux(tmp281, UInt<2>(2), tmp788) + node tmp790 = mux(tmp279, UInt<2>(0), tmp789) + node tmp791 = mux(tmp277, UInt<2>(0), tmp790) + node tmp792 = mux(tmp361, UInt<1>(0), UInt<1>(0)) + node tmp793 = mux(tmp359, UInt<1>(0), tmp792) + node tmp794 = mux(tmp357, UInt<1>(0), tmp793) + node tmp795 = mux(tmp355, UInt<1>(0), tmp794) + node tmp796 = mux(tmp353, UInt<1>(0), tmp795) + node tmp797 = mux(tmp351, UInt<1>(0), tmp796) + node tmp798 = mux(tmp349, UInt<1>(1), tmp797) + node tmp799 = mux(tmp347, UInt<1>(1), tmp798) + node tmp800 = mux(tmp345, UInt<1>(1), tmp799) + node tmp801 = mux(tmp343, UInt<1>(1), tmp800) + node tmp802 = mux(tmp341, UInt<1>(1), tmp801) + node tmp803 = mux(tmp339, UInt<1>(1), tmp802) + node tmp804 = mux(tmp337, UInt<1>(1), tmp803) + node tmp805 = mux(tmp335, UInt<1>(1), tmp804) + node tmp806 = mux(tmp333, UInt<1>(1), tmp805) + node tmp807 = mux(tmp331, UInt<1>(1), tmp806) + node tmp808 = mux(tmp329, UInt<1>(1), tmp807) + node tmp809 = mux(tmp327, UInt<1>(1), tmp808) + node tmp810 = mux(tmp325, UInt<1>(1), tmp809) + node tmp811 = mux(tmp323, UInt<1>(1), tmp810) + node tmp812 = mux(tmp321, UInt<1>(1), tmp811) + node tmp813 = mux(tmp319, UInt<1>(1), tmp812) + node tmp814 = mux(tmp317, UInt<1>(1), tmp813) + node tmp815 = mux(tmp315, UInt<1>(1), tmp814) + node tmp816 = mux(tmp313, UInt<1>(1), tmp815) + node tmp817 = mux(tmp311, UInt<1>(0), tmp816) + node tmp818 = mux(tmp309, UInt<1>(0), tmp817) + node tmp819 = mux(tmp307, UInt<1>(0), tmp818) + node tmp820 = mux(tmp305, UInt<1>(1), tmp819) + node tmp821 = mux(tmp303, UInt<1>(1), tmp820) + node tmp822 = mux(tmp301, UInt<1>(1), tmp821) + node tmp823 = mux(tmp299, UInt<1>(1), tmp822) + node tmp824 = mux(tmp297, UInt<1>(1), tmp823) + node tmp825 = mux(tmp295, UInt<1>(0), tmp824) + node tmp826 = mux(tmp293, UInt<1>(0), tmp825) + node tmp827 = mux(tmp291, UInt<1>(0), tmp826) + node tmp828 = mux(tmp289, UInt<1>(0), tmp827) + node tmp829 = mux(tmp287, UInt<1>(0), tmp828) + node tmp830 = mux(tmp285, UInt<1>(0), tmp829) + node tmp831 = mux(tmp283, UInt<1>(1), tmp830) + node tmp832 = mux(tmp281, UInt<1>(1), tmp831) + node tmp833 = mux(tmp279, UInt<1>(1), tmp832) + node tmp834 = mux(tmp277, UInt<1>(1), tmp833) + node tmp835 = mux(tmp361, UInt<2>(3), UInt<2>(0)) + node tmp836 = mux(tmp359, UInt<2>(2), tmp835) + node tmp837 = mux(tmp357, UInt<2>(1), tmp836) + node tmp838 = mux(tmp355, UInt<2>(3), tmp837) + node tmp839 = mux(tmp353, UInt<2>(2), tmp838) + node tmp840 = mux(tmp351, UInt<2>(1), tmp839) + node tmp841 = mux(tmp349, UInt<2>(0), tmp840) + node tmp842 = mux(tmp347, UInt<2>(0), tmp841) + node tmp843 = mux(tmp345, UInt<2>(0), tmp842) + node tmp844 = mux(tmp343, UInt<2>(0), tmp843) + node tmp845 = mux(tmp341, UInt<2>(0), tmp844) + node tmp846 = mux(tmp339, UInt<2>(0), tmp845) + node tmp847 = mux(tmp337, UInt<2>(0), tmp846) + node tmp848 = mux(tmp335, UInt<2>(0), tmp847) + node tmp849 = mux(tmp333, UInt<2>(0), tmp848) + node tmp850 = mux(tmp331, UInt<2>(0), tmp849) + node tmp851 = mux(tmp329, UInt<2>(0), tmp850) + node tmp852 = mux(tmp327, UInt<2>(0), tmp851) + node tmp853 = mux(tmp325, UInt<2>(0), tmp852) + node tmp854 = mux(tmp323, UInt<2>(0), tmp853) + node tmp855 = mux(tmp321, UInt<2>(0), tmp854) + node tmp856 = mux(tmp319, UInt<2>(0), tmp855) + node tmp857 = mux(tmp317, UInt<2>(0), tmp856) + node tmp858 = mux(tmp315, UInt<2>(0), tmp857) + node tmp859 = mux(tmp313, UInt<2>(0), tmp858) + node tmp860 = mux(tmp311, UInt<2>(0), tmp859) + node tmp861 = mux(tmp309, UInt<2>(0), tmp860) + node tmp862 = mux(tmp307, UInt<2>(0), tmp861) + node tmp863 = mux(tmp305, UInt<2>(0), tmp862) + node tmp864 = mux(tmp303, UInt<2>(0), tmp863) + node tmp865 = mux(tmp301, UInt<2>(0), tmp864) + node tmp866 = mux(tmp299, UInt<2>(0), tmp865) + node tmp867 = mux(tmp297, UInt<2>(0), tmp866) + node tmp868 = mux(tmp295, UInt<2>(0), tmp867) + node tmp869 = mux(tmp293, UInt<2>(0), tmp868) + node tmp870 = mux(tmp291, UInt<2>(0), tmp869) + node tmp871 = mux(tmp289, UInt<2>(0), tmp870) + node tmp872 = mux(tmp287, UInt<2>(0), tmp871) + node tmp873 = mux(tmp285, UInt<2>(0), tmp872) + node tmp874 = mux(tmp283, UInt<2>(0), tmp873) + node tmp875 = mux(tmp281, UInt<2>(0), tmp874) + node tmp876 = mux(tmp279, UInt<2>(0), tmp875) + node tmp877 = mux(tmp277, UInt<2>(0), tmp876) + node tmp878 = bits(ctrl.ins, 19, 15) + node rs1_addr879 = tmp878 + node tmp880 = bits(ctrl.ins, 24, 20) + node rs2_addr881 = tmp880 + reg st_type882 : UInt<1> + st_type882 := ctrl.st_type + reg ld_type883 : UInt<1> + ld_type883 := tmp748 + reg wb_sel884 : UInt<1> + wb_sel884 := tmp791 + reg wb_en885 : UInt<1> + wb_en885 := tmp834 + reg csr_cmd886 : UInt<1> + csr_cmd886 := tmp877 + ctrl.pc_sel := tmp404 + node tmp887 = bit-not(ctrl.data_re) + node tmp888 = bit-and(ctrl.stall, tmp887) + node tmp889 = bit-not(tmp888) + ctrl.inst_re := tmp889 + node tmp890 = neq(tmp748, UInt<3>(7)) + wire tmp891 : UInt<1> + tmp891 := tmp662 + node tmp892 = bit-or(tmp890, tmp891) + node tmp893 = mux(tmp892, UInt<1>(1), UInt<1>(0)) + ctrl.inst_type := tmp893 + ctrl.A_sel := tmp447 + ctrl.B_sel := tmp490 + ctrl.imm_sel := tmp533 + ctrl.alu_op := tmp576 + ctrl.br_type := tmp619 + ctrl.st_type := tmp705 + node tmp894 = bit-not(ctrl.stall) + when tmp894 : + st_type882 := ctrl.st_type + ld_type883 := tmp748 + wb_sel884 := tmp791 + wb_en885 := tmp834 + csr_cmd886 := tmp877 + node tmp895 = neq(ctrl.ld_type, UInt<3>(7)) + node tmp896 = neq(tmp748, UInt<3>(7)) + node tmp897 = mux(ctrl.stall, tmp895, tmp896) + ctrl.data_re := tmp897 + ctrl.ld_type := ld_type883 + ctrl.wb_en := wb_en885 + ctrl.wb_sel := wb_sel884 + ctrl.csr_cmd := csr_cmd886 + module Core : + input stall : UInt<1> + output host : {flip hid : UInt<1>, tohost : UInt<32>, status : UInt<32>} + output icache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} + output dcache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} + inst dpath of Datapath + inst ctrl of Control + host := dpath.host + icache := dpath.icache + dcache := dpath.dcache + dpath.ctrl := ctrl.ctrl + dpath.stall := stall + module Fifo : + input enq : {valid : UInt<1>, bits : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}, flip ready : UInt<1>} + output deq : {valid : UInt<1>, bits : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}, flip ready : UInt<1>} + output count : UInt<3> + mem ram : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}[4] + reg cnt898 : UInt<2> + on-reset cnt898 := UInt<1>(0) + reg cnt899 : UInt<2> + on-reset cnt899 := UInt<1>(0) + reg maybe-full900 : UInt<1> + on-reset maybe-full900 := UInt<1>(0) + node tmp901 = eq(cnt898, cnt899) + node ptr-match902 = tmp901 + node tmp903 = bit-not(maybe-full900) + node tmp904 = bit-and(ptr-match902, tmp903) + node empty905 = tmp904 + node tmp906 = bit-and(ptr-match902, maybe-full900) + node full907 = tmp906 + node tmp908 = bit-and(UInt<1>(0), empty905) + node maybe-flow909 = tmp908 + node tmp910 = bit-and(maybe-flow909, deq.ready) + node do-flow911 = tmp910 + node tmp912 = bit-not(do-flow911) + node tmp913 = bit-and(enq.valid, tmp912) + node tmp914 = bit-and(enq.ready, tmp913) + node do-enq915 = tmp914 + node tmp916 = bit-not(do-flow911) + node tmp917 = bit-and(deq.valid, tmp916) + node tmp918 = bit-and(deq.ready, tmp917) + node do-deq919 = tmp918 + when do-enq915 : + accessor a920 = ram[cnt898] + a920 := enq.bits + node tmp921 = eq(cnt898, UInt<2>(3)) + node wrap922 = tmp921 + node tmp923 = bit-and(UInt<1>(0), wrap922) + node tmp924 = add-wrap(cnt898, UInt<1>(1)) + node tmp925 = mux(tmp923, UInt<1>(0), tmp924) + cnt898 := tmp925 + when do-deq919 : + node tmp926 = eq(cnt899, UInt<2>(3)) + node wrap927 = tmp926 + node tmp928 = bit-and(UInt<1>(0), wrap927) + node tmp929 = add-wrap(cnt899, UInt<1>(1)) + node tmp930 = mux(tmp928, UInt<1>(0), tmp929) + cnt899 := tmp930 + node tmp931 = neq(do-enq915, do-deq919) + when tmp931 : + maybe-full900 := do-enq915 + node tmp932 = bit-and(UInt<1>(0), enq.valid) + node tmp933 = bit-or(empty905, tmp932) + node tmp934 = bit-not(tmp933) + deq.valid := tmp934 + node tmp935 = bit-and(UInt<1>(0), deq.ready) + node tmp936 = bit-or(full907, tmp935) + node tmp937 = bit-not(tmp936) + enq.ready := tmp937 + accessor a938 = ram[cnt899] + node tmp939 = mux(maybe-flow909, enq.bits, a938) + deq.bits := tmp939 + node tmp940 = sub-wrap(cnt898, cnt899) + node ptr-diff941 = tmp940 + node tmp942 = bit-and(maybe-full900, ptr-match902) + node tmp943 = cat(tmp942, ptr-diff941) + count := tmp943 + module Fifo944 : + input enq : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>} + output deq : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>} + output count : UInt<3> + mem ram : {data : UInt<32>}[4] + reg cnt945 : UInt<2> + on-reset cnt945 := UInt<1>(0) + reg cnt946 : UInt<2> + on-reset cnt946 := UInt<1>(0) + reg maybe-full947 : UInt<1> + on-reset maybe-full947 := UInt<1>(0) + node tmp948 = eq(cnt945, cnt946) + node ptr-match949 = tmp948 + node tmp950 = bit-not(maybe-full947) + node tmp951 = bit-and(ptr-match949, tmp950) + node empty952 = tmp951 + node tmp953 = bit-and(ptr-match949, maybe-full947) + node full954 = tmp953 + node tmp955 = bit-and(UInt<1>(0), empty952) + node maybe-flow956 = tmp955 + node tmp957 = bit-and(maybe-flow956, deq.ready) + node do-flow958 = tmp957 + node tmp959 = bit-not(do-flow958) + node tmp960 = bit-and(enq.valid, tmp959) + node tmp961 = bit-and(enq.ready, tmp960) + node do-enq962 = tmp961 + node tmp963 = bit-not(do-flow958) + node tmp964 = bit-and(deq.valid, tmp963) + node tmp965 = bit-and(deq.ready, tmp964) + node do-deq966 = tmp965 + when do-enq962 : + accessor a967 = ram[cnt945] + a967 := enq.bits + node tmp968 = eq(cnt945, UInt<2>(3)) + node wrap969 = tmp968 + node tmp970 = bit-and(UInt<1>(0), wrap969) + node tmp971 = add-wrap(cnt945, UInt<1>(1)) + node tmp972 = mux(tmp970, UInt<1>(0), tmp971) + cnt945 := tmp972 + when do-deq966 : + node tmp973 = eq(cnt946, UInt<2>(3)) + node wrap974 = tmp973 + node tmp975 = bit-and(UInt<1>(0), wrap974) + node tmp976 = add-wrap(cnt946, UInt<1>(1)) + node tmp977 = mux(tmp975, UInt<1>(0), tmp976) + cnt946 := tmp977 + node tmp978 = neq(do-enq962, do-deq966) + when tmp978 : + maybe-full947 := do-enq962 + node tmp979 = bit-and(UInt<1>(0), enq.valid) + node tmp980 = bit-or(empty952, tmp979) + node tmp981 = bit-not(tmp980) + deq.valid := tmp981 + node tmp982 = bit-and(UInt<1>(0), deq.ready) + node tmp983 = bit-or(full954, tmp982) + node tmp984 = bit-not(tmp983) + enq.ready := tmp984 + accessor a985 = ram[cnt946] + node tmp986 = mux(maybe-flow956, enq.bits, a985) + deq.bits := tmp986 + node tmp987 = sub-wrap(cnt945, cnt946) + node ptr-diff988 = tmp987 + node tmp989 = bit-and(maybe-full947, ptr-match949) + node tmp990 = cat(tmp989, ptr-diff988) + count := tmp990 + module Memory : + output stall : UInt<1> + output memory : {req_cmd : {valid : UInt<1>, bits : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}, flip ready : UInt<1>}, req_data : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>}, flip resp : {valid : UInt<1>, bits : {data : UInt<32>, tag : UInt<5>}, flip ready : UInt<1>}} + input icache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} + input dcache : {addr : UInt<32>, din : UInt<32>, flip dout : UInt<32>, re : UInt<1>, we : UInt<4>} + inst memReqCmdQueue of Fifo + inst memReqDataQueue of Fifo944 + reg state991 : UInt<?> + on-reset state991 := UInt<1>(0) + reg tag992 : UInt<5> + on-reset tag992 := UInt<1>(0) + node tmp993 = eq(state991, UInt<1>(0)) + node tmp994 = eq(dcache.we, UInt<1>(0)) + node tmp995 = bit-not(tmp994) + node tmp996 = bit-or(dcache.re, tmp995) + node tmp997 = bit-or(icache.re, tmp996) + node tmp998 = bit-and(tmp993, tmp997) + node cpuReq999 = tmp998 + node tmp1000 = bits(icache.addr, 31, 2) + node tmp1001 = cat(tmp1000, UInt<2>(0)) + node iaddr1002 = tmp1001 + node tmp1003 = bits(dcache.addr, 31, 2) + node tmp1004 = cat(tmp1003, UInt<2>(0)) + node daddr1005 = tmp1004 + reg idata1006 : UInt<?> + reg ddata1007 : UInt<?> + reg ire1008 : UInt<1> + reg dre1009 : UInt<1> + icache.dout := idata1006 + dcache.dout := ddata1007 + memory.req_cmd := memReqCmdQueue.deq + memory.req_data := memReqDataQueue.deq + memory.resp.ready := UInt<1>(0) + node tmp1010 = eq(state991, UInt<1>(1)) + node tmp1011 = bit-not(memReqDataQueue.enq.ready) + node tmp1012 = bit-or(memReqCmdQueue.enq.ready, tmp1011) + node tmp1013 = bit-not(tmp1012) + node tmp1014 = bit-or(tmp1010, tmp1013) + stall := tmp1014 + node tmp1015 = eq(dcache.we, UInt<1>(0)) + node tmp1016 = bit-not(tmp1015) + memReqCmdQueue.enq.bits.rw := tmp1016 + memReqCmdQueue.enq.bits.tag := tag992 + node tmp1017 = eq(dcache.we, UInt<1>(0)) + node tmp1018 = bit-not(tmp1017) + node tmp1019 = bit-not(icache.re) + node tmp1020 = bit-or(tmp1018, tmp1019) + node tmp1021 = mux(tmp1020, daddr1005, iaddr1002) + memReqCmdQueue.enq.bits.addr := tmp1021 + memReqCmdQueue.enq.bits.mask := dcache.we + node tmp1022 = bit-and(memReqDataQueue.enq.ready, cpuReq999) + memReqCmdQueue.enq.valid := tmp1022 + memReqDataQueue.enq.bits.data := dcache.din + node tmp1023 = eq(dcache.we, UInt<1>(0)) + node tmp1024 = bit-not(tmp1023) + node tmp1025 = bit-and(cpuReq999, tmp1024) + node tmp1026 = bit-and(memReqCmdQueue.enq.ready, tmp1025) + memReqDataQueue.enq.valid := tmp1026 + node tmp1027 = eq(state991, UInt<1>(0)) + when tmp1027 : + node tmp1028 = bit-or(icache.re, dcache.re) + node tmp1029 = eq(dcache.we, UInt<1>(0)) + node tmp1030 = bit-not(tmp1029) + node tmp1031 = bit-and(tmp1030, memReqCmdQueue.enq.ready) + node tmp1032 = bit-not(tmp1031) + node tmp1033 = bit-and(tmp1028, tmp1032) + when tmp1033 : + ire1008 := icache.re + dre1009 := dcache.re + state991 := UInt<1>(1) + node tmp1034 = eq(state991, UInt<1>(1)) + when tmp1034 : + memory.resp.ready := UInt<1>(1) + node tmp1035 = eq(memory.resp.bits.tag, tag992) + node tmp1036 = bit-and(memory.resp.valid, tmp1035) + when tmp1036 : + state991 := UInt<1>(0) + node tmp1037 = add-wrap(tag992, UInt<1>(1)) + tag992 := tmp1037 + memory.resp.ready := UInt<1>(0) + when ire1008 : + idata1006 := memory.resp.bits.data + when dre1009 : + ddata1007 := memory.resp.bits.data + module Tile : + output htif : {host : {flip hid : UInt<1>, tohost : UInt<32>, status : UInt<32>}} + output memory : {req_cmd : {valid : UInt<1>, bits : {rw : UInt<1>, addr : UInt<32>, tag : UInt<5>, mask : UInt<4>}, flip ready : UInt<1>}, req_data : {valid : UInt<1>, bits : {data : UInt<32>}, flip ready : UInt<1>}, flip resp : {valid : UInt<1>, bits : {data : UInt<32>, tag : UInt<5>}, flip ready : UInt<1>}} + inst core of Core + inst memmod of Memory + htif.host := core.host + memory := memmod.memory + core.stall := memmod.stall + memmod.icache := core.icache + memmod.dcache := core.dcache + |