diff options
| author | Carlos Eduardo | 2021-03-09 15:49:37 -0300 |
|---|---|---|
| committer | GitHub | 2021-03-09 18:49:37 +0000 |
| commit | efdefde2a5fa13de8faa8c141f852391909225df (patch) | |
| tree | f9b16501a688feedc8bcebff611148bc12f39de3 /.gitignore | |
| parent | 8a4c156f401c8bfab5f2d595c32c20534f0722d7 (diff) | |
Create annotation to allow inline readmem in Verilog (#2107)
This PR adds a new annotation allowing inline loading for memory files
in Verilog code.
Diffstat (limited to '.gitignore')
| -rw-r--r-- | .gitignore | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -66,3 +66,4 @@ project/metals.sbt *~ *#*# +.vscode |