| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-12-19 | Fix width inferencing issue (#952) | Jack Koenig | |
| * Fix width propagation of non-literals in WireInit and RegInit * Change .getWidth to throw an exception instead of calling .get * Add utilities for checking inferred vs. known widths * Add tests for Wire, WireInit, Reg, and RegInit width inference * Add ScalaDoc for Reg, Wire, RegInit, and WireInit | |||
| 2018-02-28 | Refactor Annotations (#767) | Jack Koenig | |
| * Generalize ChiselAnnotation This allows us to delay creation of Annotations till elaboration is complete. Also update all annotation-related code. * Add RunFirrtlTransform Use a Chisel-specific RunFirrtlTransform API to preserve behavior of old ChiselAnnotation (now called ChiselLegacyAnnotation) * Use unique test directories in ChiselRunners.compile | |||
| 2017-05-25 | Support updated scalatest/scalacheck; bump sbt and Scala versions. (#605) | Jim Lawson | |
| bump scoverage version | |||
| 2017-04-13 | Module Hierarchy Refactor (#469) | Richard Lin | |
| 2017-02-28 | Use test_run_dir for more tests. (#534) | Jim Lawson | |
| * Use test_run_dir for more tests. * Use official option and DRY. Make "test_run_dir" the default for ChiselSpec. Verify output files are created in DriverSpec tests. | |||
| 2017-02-07 | Add generateFirrtl() method to ChiselSpec.scala (#423) | Jim Lawson | |
| 2017-01-31 | Add compile [to Verilog] to ChiselRunners | Jack | |
| 2016-11-14 | Add checks for misuse or omission of Module() | Jack | |
| Implemented by adding a Boolean to check for alternating invocations of object Module.apply and the constructor of abstract class Module. Fixes #192 | |||
| 2016-06-20 | Rename "package", "import", and explicit references to "chisel3". | Jim Lawson | |
| 2016-06-08 | Rename Chisel -> chisel in tests | ducky | |
| 2016-05-04 | Multiple assign tester | ducky | |
| Closes #90 | |||
| 2016-01-30 | Add BlackBox support and test, refactor execute => assertTesterPasses | ducky | |
| 2015-12-06 | Split internal and FIRRTL packages | ducky | |
| 2015-11-04 | Supply smaller values for generatorDrivenConfig to reduce test time. | Henry Cook | |
| 2015-11-04 | Remove Parameters library and refactor Driver. | Henry Cook | |
| In addition to removing all the extraneous Driver invocations that created various top-level Parameters instances, this commit also lays the groundwork for stanza-firrtl/verilator based testing of Modules that extend BasicTester. The execution-based tests have been updated accordingly. They will only succeed if firrtl and verilator binaries have been installed. Further work is needed on individual tests to use assertions instead of .io.error. | |||
| 2015-10-23 | Fix stylistic issues and document standard Chisel generators | ducky | |
| 2015-10-23 | Add Scalaland unit tests for Reg | ducky | |
| 2015-10-23 | Whitespace scalastyle fixes for tests | ducky | |
| 2015-08-14 | more tests | Henry Cook | |
| 2015-08-14 | Add Vec tests. Do a better job of generating widths. | Henry Cook | |
| 2015-08-14 | added MulLookup and Tbl tests | Henry Cook | |
| 2015-08-13 | add decoder test | Henry Cook | |
| 2015-08-13 | Counter tests | Henry Cook | |
| 2015-08-13 | complexassign test | Henry Cook | |
| 2015-08-13 | testing improvements | Henry Cook | |
| 2015-08-13 | minor tweaks | Henry Cook | |
| 2015-08-13 | Use chiselTests package; add copyright notice. | Jim Lawson | |
| 2015-08-13 | rename package (lowercase) | Jim Lawson | |
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index : chiselX | |
| Chisel with SFC compatibility |
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