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path: root/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala
AgeCommit message (Expand)Author
2022-01-10Apply scalafmtJack Koenig
2021-03-11Import memory files inline for Verilog generation (#1805)Carlos Eduardo
2020-10-01Move Chisel3 to SPDX license conventions (#1604)Chick Markley
2020-09-09Fix load memory from file to work with binary (#1583)HappyQuark
2020-07-21Delete outdated scalastyle configuration comments from sourceAlbert Magyar
2019-05-20Repackagecore rebase (#1078)Jim Lawson
2019-05-12Cleanup loadMemoryFromFile documentationSchuyler Eldridge
2019-03-14Decouple implementation details from LoadMemoryAnnotation. (#1034)Jim Lawson
2018-10-29Fix LoadMemoryTransform for Instance Annotations (#914)Schuyler Eldridge
2018-08-31Support for verilog memory loading. (#840)Chick Markley