| Age | Commit message (Collapse) | Author |
|---|
|
|
|
This would ultimately get DCE'd, but it's easy enough to not
generate the dead code in the first place.
|
|
- Remove power-of-2 restriction on count
- Avoid redundancy between lockIdx and chosen signals, reducing area
- Infer locked from lockCount, rather than maintaining separate state
- Reduce FIRRTL node count in several places
- Special-case simple Arbiter, which avoids serializing the computation
of io.chosen with io.out.valid/bits. This lops off a few FO4 delays
at no area cost, and actually reduces area if io.chosen isn't used.
|
|
It was never meant to be a public API, and the implementation left
something to be desired.
|
|
It doesn't really make sense to create a one-hot result then follow it
with a decoder. It's more performant to use a PriorityEncoder followed
by a comparator. Discourage the former by returning Seq, not Vec.
In Chisel2, it seems the return type was originally Seq, but was at some
point inadvertently changed to Vec.
|
|
for DeqIO and EnqIO initialization is likely to change.
|
|
Make the corresponding test run faster by giving it a Counter.
|
|
|
|
|
|
|
|
Gate assert, printf, stop by reset
Fix testbenches that never worked
Change simulation prints to display cycle at which test was signaled to end, not when simulator stops
Better documentation for Counter
|
|
|
|
|
|
|
|
|
