chiselX - Chisel with SFC compatibility

Age	Commit message (Expand)	Author
2016-05-05	Move Chisel API into separate chiselFrontend compilation unit in preparation ...	ducky
2016-04-13	Remove underscores from constant creation	Colin Schmidt
2016-03-15	Add =/= to SInt	jackkoenig
2016-02-23	Emit no width instead of <?> for unknown width UInt and SInt literals and types	jackkoenig
2016-01-27	Use FIRRTL nodes add+tail instead of addw	Andrew Waterman
2016-01-27	Use FIRRTL node rem, not mod, for %	Andrew Waterman
2016-01-27	Remove unsupported FIRRTL node bit(); use bits()	Andrew Waterman
2016-01-27	In FIRRTL, bitwise operators return UInt	Andrew Waterman
2016-01-25	Emit FIRRTL muxes for aggregates	Andrew Waterman
2016-01-23	Don't use deprecated constructs	Andrew Waterman
2016-01-23	Move firrtl subpackage to inside internal subpackage.	jackkoenig
2016-01-17	Add =/= operator to BitPat	Andrew Waterman
2016-01-16	Disallow Muxing between bundles whose fields have different widths	Andrew Waterman
2016-01-15	flatten should return Seq[Bits], not Seq[UInt]	Andrew Waterman
2015-12-30	Add '=/=' to bits, which does the same as '!='	Palmer Dabbelt
2015-12-06	Split internal and FIRRTL packages	ducky
2015-11-02	Remove implementation details from scaladoc.	ducky
2015-11-02	Add Scalastyle rule to check lines ending with a ;, fix some instances	ducky
2015-10-30	Merge pull request #47 from ucb-bar/corebitsfix	Andrew Waterman
2015-10-30	Fix whitespace	ducky
2015-10-30	Move Cat into utils	ducky
2015-10-30	Resolve some review todos in Bits	ducky
2015-10-26	Break Core.scala into bite-sized pieces	ducky