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Referenced to: chipsalliance/chisel3#2728
(cherry picked from commit a4dae9c340c71c063cf0fdec290a6e011b82746d)
Co-authored-by: Marco Origlia <30799310+moriglia@users.noreply.github.com>
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(cherry picked from commit 255c56c3955a8c16191a6751e7d547cfcfd96705)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
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#2534) (#2559)
* Deprecate .U() and .S() syntax for literal bit extracts (#2534)
(cherry picked from commit cadaf33a650ef898fdab2f81244e4ad6a07a9ea8)
# Conflicts:
# macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala
* Fix backport conflict (#2560)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
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(cherry picked from commit 52165fe2796d08c664069c148868aedc64ea3777)
Co-authored-by: Lucheng Zhang <79909456+geekLucian@users.noreply.github.com>
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* Issue errors on out-of-range extracts when width is known
Firrtl will catch this later on, but better to error early if possible.
* Test that errors are generated on OOB extracts when width is known
(cherry picked from commit 462def429aa87becb544533880a3075a806c53e4)
Co-authored-by: Andrew Waterman <andrew@sifive.com>
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Command:
sbt scalafmtAll
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Provides a more intuitive implementation of toString for Data.
Utilizes the fact that the compiler plugin provides names earlier than
Chisel had in the past so we can accurately guess the name of
signals even in the currently elaborating module.
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>
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In `Bits.scala`, `FixedPoint` and `Interval` did not defeine the `do_unary_-` methods (the `do_`) was missing
The recent PR #2124 combined with the above fact made DspTools break. This fix is necessary to get
that repo to build.
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* change static shift behavior to mod width when width is known
* add dynamic shift
* basic tests that actually do something
* MatchedRotateLeftAndRight based on the idea from @chick
* BasicRotate rotate "b001" and compare with known values
* Fix check for KnownWidth(0|1) as suggested by @aswaterman
* Add dontTouch to UIntOps.io (other tests were also optimized out)
Co-authored-by: Chick Markley <chick@qrhino.com>
Co-authored-by: Andrew Waterman <andrew@sifive.com>
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functions (#2124)
* Migrate nullary funcs to parameterless versions
* Make deprecation message and dummy arguments clear and consistent
Co-authored-by: Megan Wachs <megan@sifive.com>
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This has been legal in FIRRTL since v1.2.3 (when reset inference started
using a unification-style algorithm) but was never exposed in the Chisel
API.
Also delete the overridden connects in AsyncReset and ResetType which
just duplicate logic from MonoConnect.
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* Update reported width from div/rem to match FIRRTL results
* Add tests for width of % and / on UInt and SInt
* Add loop-based test for known UInt/SInt op result widths
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Change source and other relevant files to use SPDX license
LICENSE file moved from src/ to ./
Changed license file to refer to this per recommendation
using_spdx_license_list_short_identifiers
WARNING: Tests fail with as of yet undiagnosed error
```
[error] Failed: Total 691, Failed 19, Errors 0, Passed 672, Ignored 15
[error] Failed tests:
[error] chiselTests.QueueSpec
[error] examples.VendingMachineGeneratorSpec
[error] chiselTests.HarnessSpec
[error] chiselTests.ConnectSpec
[error] chiselTests.aop.SelectSpec
[error] chiselTests.PopCountSpec
[error] chiselTests.CloneModuleSpec
[error] (Test / test) sbt.TestsFailedException: Tests unsuccessful
[error] Total time: 379 s (06:19), completed Sep 30, 2020 12:38:17 AM
sbt:chisel3>
```
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* Rename coreMacros to macros
* Rename chiselFrontend to core
Also make each subproject publish with "chisel3-" as a prefix
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