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path: root/core/src/main/scala/chisel3/Bits.scala
AgeCommit message (Expand)Author
2022-09-15Change description for SInt unary negation (#2729) (#2734)mergify[bot]
2022-06-07Add single argument Bits.extract (#2566) (#2568)mergify[bot]
2022-06-03Deprecate implicit .U() and .S() syntax for literal bit extracts (backport #2...mergify[bot]
2022-04-18Fix small typos in doc comment (#2490) (#2492)mergify[bot]
2022-03-04Issue errors on out-of-range extracts when width is known (#2428) (#2429)mergify[bot]
2022-01-10Apply scalafmtJack Koenig
2021-12-02Refactor Data.toString (#2197)Aditya Naik
2021-11-14remove_toBoolsJiuyang Liu
2021-10-07Fixed bug with unary minus on FixedPoint and Interval (#2154)Chick Markley
2021-10-05Circular-shift (rotate) operations for UInt (#1140)Kamyar Mohajerani
2021-10-05Deprecate auto-application of empty argument lists to parameterless functions...Jared Barocsi
2021-07-08Make it legal for concrete resets to drive abstract reset (#2018)Jack Koenig
2021-04-29Scala 2.13 support (#1751)Jack Koenig
2021-02-03Remove Deprecated APIs (#1730)Jiuyang Liu
2021-02-01Update reported width from div/rem to match FIRRTL results (#1748)Albert Magyar
2020-10-01Move Chisel3 to SPDX license conventions (#1604)Chick Markley
2020-07-21Delete outdated scalastyle configuration comments from sourceAlbert Magyar
2020-03-25Rename subprojects to more canonical namesJack Koenig
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