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2020-06-08Grouping Chisel API (#1073)Adam Izraelevitz
* Added group chisel API * Removed println * Added scaladoc * Added more tests * Cleaned spacing and removed println Co-authored-by: Chick Markley <chick@qrhino.com> Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-06-05verilator_4_016 --> v4.016 (#1459)apaj
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-06-05Restore backporting to 3.2.x (#1460)Jack Koenig
2020-06-02Bump SNAPSHOT version. (#1458)Jim Lawson
2020-05-13Update scalatest to 3.1.2 (#1441)Jim Lawson
Co-authored-by: Scala Steward <me@scala-steward.org> Co-authored-by: Scala Steward <43047562+scala-steward@users.noreply.github.com>
2020-05-13Update sbt to 1.3.10 (#1415)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-05-13Update scalacheck-1-14 to 3.1.1.1 (#1413)Scala Steward
* Update scalacheck-1-14 to 3.1.1.1 * Update scalacheck-1-14 to 3.1.1.1 Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-05-13Update sbt-site to 1.4.0 (#1395)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-05-06Merge pull request #1426 from freechipsproject/1412-2Schuyler Eldridge
Fix Double Elaboration Backportably
2020-05-06Fix double elaborationSchuyler Eldridge
Remove the requirement that FirrtlStage runs elaboration (this should be implicit) and remove the unneeded invalidation of elaboration by the Emitter. Due to Convert currently NOT invalidating Elaborate (when it should), add an optionalPrerequisiteOf to ensure that the Emitter runs before the Convert phase. Co-authored-by: David Biancolin <david.biancolin@gmail.com> Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-05-06Test that Elaborate only runs onceSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-05-06Expose ChiselStage's PhaseManager, rm extra wrapsSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-05-05Update scalatest 3.1.1 (#1430)Jim Lawson
* Update scalatest to 3.1.1 * Update scalatest to 3.1.1 * Update scalatest to 3.1.1 * Add missing org.scalatest.flatspec.AnyFlatSpec import. Co-authored-by: Scala Steward <me@scala-steward.org> Co-authored-by: Scala Steward <43047562+scala-steward@users.noreply.github.com>
2020-05-05Update Mergify rules to backport to 3.3.x (#1429)Jack Koenig
This replaces the rules for 3.2.x
2020-05-04README: add link to website source (#1420)Megan Wachs
2020-04-20Mux1H: note results unspecified unless exactly one select signal is high (#1397)John Ingalls
Co-authored-by: Adam Izraelevitz <azidar@gmail.com>
2020-04-16Revert "Make uselessly public fields in utils private" (#1417)Adam Izraelevitz
This reverts commit c279860c36a73984cd1b7b0ac6c213e8b44a7143.
2020-04-16Add tests for async reset regs of non-UInt types (#1414)Jack Koenig
2020-04-13Update scalatest to 3.1.0 (#1394)Jim Lawson
Co-authored-by: Scala Steward <me@scala-steward.org>
2020-04-10Make Counter emit valid FIRRTL (#1408)Jack Koenig
Remove var from object Counter.apply, using a Wire instead. Also improve some ScalaDoc and the class Counter require message.
2020-04-10Expose checkTypeEquivalence as a public API (#1402)Sequencer
2020-04-08Use thread local storage for ChiselContext. (#1404)Jim Lawson
2020-04-06enable Lit for Record. (#1400)Sequencer
2020-04-04Fix mill build (#1399)Sequencer
Fix bug introduced in #1384
2020-04-02Update paradise to 2.1.1 (#1342)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-03-31Update junit to 4.13 (#1341)Scala Steward
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-03-31Update sbt-site to 1.3.3 (#1340)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-03-30Java API Documents Linking (#1367)Schuyler Eldridge
* Show linking against Javadoc Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Add sbt-api-mappings plugin This adds the sbt-api-mappings plugin which enables auto-linking (properly setting the apiMappings for the sbt project) so that Scaldoc/unidoc generation will now automatically link against Java and Scala API docs (and use the right version). Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Show linking against Scala APIs Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-28Add pubishSettings to subprojects. (#1390)Jim Lawson
2020-03-26Bump to Scala 2.12.11 (#1389)Jack Koenig
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-03-26Set StageError cause in ChiselStage (#1382)Schuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-03-25Merge pull request #1384 from freechipsproject/no-more-compile-internalJack Koenig
No more compile internal
2020-03-25Rename subprojects to more canonical namesJack Koenig
* Rename coreMacros to macros * Rename chiselFrontend to core Also make each subproject publish with "chisel3-" as a prefix
2020-03-25Remove compile-internal from build.sbtJack Koenig
This has the effect of causing the coreMacros and chiselFrontend projects to be published separately
2020-03-24Propagate user compile options for Chisel.Module (#1387)Jack Koenig
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-03-24Merge pull request #1213 from freechipsproject/driver-deprecationsSchuyler Eldridge
Deprecate Driver methods in favor of ChiselStage
2020-03-24Update README.md to reference ChiselStageSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-24Add ChiselStageSpec for string/circuit emissionSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-24Add helper methods to ChiselStage for Driver migrationSchuyler Eldridge
This adds three new methods to ChiselStage to replace deprecated methods in the Driver for converting a Chisel circuit to a string: - emitChirrtl - emitFirrtl - emitVerilog This also adds a ChiselStage companion object that lets you generated a Chisel Circuit or a FIRRTL Circuit from a Chisel module: - elaborate - convert Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> squash! Add string emission helper methods to ChiselStage
2020-03-24Deprecate Driver methods in favor of ChiselStageSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-23Remove toNamed (and friends) deprecation. (#1377)Jim Lawson
* Remove toNamed (and friends) deprecation. * Add inadvertently deleted leading double quote. * Remove commented out deprecations.
2020-03-23Add NoChiselNamePrefix to ignore instances in @chiselName (#1383)Jack Koenig
Add trait chisel3.experimental.NoChiselNamePrefix which causes @chiselName to skip naming of the instance effectively preventing it from prefixing any vals inside the instance. It can be applied to classes such that all instances of that class have this property, or to individual instances (via creating an anonymous class inline). Also add basic ScalaDoc for NoChiselNamePrefix and chiselName.
2020-03-21Use innermost builder cause to trim stack trace (#1380)Schuyler Eldridge
Change the logic for determining which nested ChiselException cause to use for a trimmed stack trace. Previously, this would use the outermost. This commit changes this to use the innermost. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-19Merge pull request #1374 from freechipsproject/dont-wrap-elaboration-annotationsSchuyler Eldridge
Don't wrap elaboration annotations
2020-03-19Add Scaladoc to ChiselExceptionSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-19Safer generation of ChiselException.builderNameSchuyler Eldridge
Change ChiselException.builderName to compute the name of Chisel's internal Builder as opposed to hard-coding this with a string. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-19Code style improvementSchuyler Eldridge
Co-authored-by: Jack Koenig <koenig@sifive.com> Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-19Test nested ChiselException in ChiselMainSchuyler Eldridge
Adds two tests: 1. Test that an internal requirement failure (a bare exception) inside a Builder is properly reported/trimmed by ChsielStage/ChiselMain 2. Test that the full stack trace includes the ChiselException Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-19Report trimmed stack trace of Builder causeSchuyler Eldridge
Changes the behavior of ChiselException stack trace trimming to use either the first exception that includes a method from the Builder or the outer exception. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-03-11Wrap elaboration in ChiselExceptionSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> squash! Wrap elaboration in ChiselException
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