Merge pull request #1426 from freechipsproject/1412-2

Fix Double Elaboration Backportably

3 files changed, 21 insertions, 9 deletions

diff --git a/src/main/scala/chisel3/stage/ChiselStage.scala b/src/main/scala/chisel3/stage/ChiselStage.scala
index 0068d86f..2dbb5b9d 100644
--- a/src/main/scala/chisel3/stage/ChiselStage.scala
+++ b/src/main/scala/chisel3/stage/ChiselStage.scala
@@ -20,7 +20,6 @@ class ChiselStage extends Stage with PreservesAll[Phase] {
 
   val targets: Seq[Dependency[Phase]] =
     Seq( Dependency[chisel3.stage.phases.Checks],
-         Dependency[chisel3.stage.phases.Elaborate],
          Dependency[chisel3.stage.phases.AddImplicitOutputFile],
          Dependency[chisel3.stage.phases.AddImplicitOutputAnnotationFile],
          Dependency[chisel3.stage.phases.MaybeAspectPhase],
@@ -28,11 +27,12 @@ class ChiselStage extends Stage with PreservesAll[Phase] {
          Dependency[chisel3.stage.phases.Convert],
          Dependency[chisel3.stage.phases.MaybeFirrtlStage] )
 
+  final lazy val phaseManager = new PhaseManager(targets) {
+    override val wrappers = Seq( (a: Phase) => DeletedWrapper(a) )
+  }
+
   def run(annotations: AnnotationSeq): AnnotationSeq = try {
-    new PhaseManager(targets) { override val wrappers = Seq( (a: Phase) => DeletedWrapper(a) ) }
-      .transformOrder
-      .map(firrtl.options.phases.DeletedWrapper(_))
-      .foldLeft(annotations)( (a, f) => f.transform(a) )
+    phaseManager.transform(annotations)
   } catch {
     case ce: ChiselException =>
       val stackTrace = if (!view[ChiselOptions](annotations).printFullStackTrace) {
diff --git a/src/main/scala/chisel3/stage/phases/Emitter.scala b/src/main/scala/chisel3/stage/phases/Emitter.scala
index 31e21542..7fb9ef91 100644
--- a/src/main/scala/chisel3/stage/phases/Emitter.scala
+++ b/src/main/scala/chisel3/stage/phases/Emitter.scala
@@ -30,10 +30,9 @@ class Emitter extends Phase {
          Dependency[AddImplicitOutputAnnotationFile],
          Dependency[MaybeAspectPhase] )
 
-  override def invalidates(phase: Phase): Boolean = phase match {
-    case _: Elaborate => true
-    case _ => false
-  }
+  override def optionalPrerequisiteOf = Seq(Dependency[Convert])
+
+  override def invalidates(phase: Phase): Boolean = false
 
   def transform(annotations: AnnotationSeq): AnnotationSeq = {
     val copts = view[ChiselOptions](annotations)
diff --git a/src/test/scala/chiselTests/stage/ChiselStageSpec.scala b/src/test/scala/chiselTests/stage/ChiselStageSpec.scala
index a7a405f1..21beb48f 100644
--- a/src/test/scala/chiselTests/stage/ChiselStageSpec.scala
+++ b/src/test/scala/chiselTests/stage/ChiselStageSpec.scala
@@ -8,6 +8,8 @@ import chisel3.stage.ChiselStage
 import org.scalatest.flatspec.AnyFlatSpec
 import org.scalatest.matchers.should.Matchers
 
+import firrtl.options.Dependency
+
 object ChiselStageSpec {
 
   class Foo extends MultiIOModule {
@@ -57,4 +59,15 @@ class ChiselStageSpec extends AnyFlatSpec with Matchers {
     ChiselStage.convert(new Foo)
   }
 
+  behavior of "ChiselStage phase ordering"
+
+  it should "only run elaboration once" in new ChiselStageFixture {
+    info("Phase order is:\n" + stage.phaseManager.prettyPrint("    "))
+
+    val order = stage.phaseManager.flattenedTransformOrder.map(Dependency.fromTransform)
+
+    info("Elaborate only runs once")
+    exactly (1, order) should be (Dependency[chisel3.stage.phases.Elaborate])
+  }
+
 }