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authorJack Koenig2020-03-25 19:51:46 -0700
committerGitHub2020-03-25 19:51:46 -0700
commitdbb024a9adee6d82f37e357cf8b55456674ff65c (patch)
tree578858ab6d219ca6daf44cf87b73f75054989097
parent6263fcc56b630b7181eb30680cadcdbb2bdf91dc (diff)
parentfbf5e6f1a0e8bf535d465b748ad554575fe62156 (diff)
Merge pull request #1384 from freechipsproject/no-more-compile-internal
No more compile internal
-rw-r--r--build.sbt36
-rw-r--r--core/src/main/scala/chisel3/Aggregate.scala (renamed from chiselFrontend/src/main/scala/chisel3/Aggregate.scala)0
-rw-r--r--core/src/main/scala/chisel3/Annotation.scala (renamed from chiselFrontend/src/main/scala/chisel3/Annotation.scala)0
-rw-r--r--core/src/main/scala/chisel3/Assert.scala (renamed from chiselFrontend/src/main/scala/chisel3/Assert.scala)0
-rw-r--r--core/src/main/scala/chisel3/Attach.scala (renamed from chiselFrontend/src/main/scala/chisel3/Attach.scala)0
-rw-r--r--core/src/main/scala/chisel3/Bits.scala (renamed from chiselFrontend/src/main/scala/chisel3/Bits.scala)0
-rw-r--r--core/src/main/scala/chisel3/BlackBox.scala (renamed from chiselFrontend/src/main/scala/chisel3/BlackBox.scala)0
-rw-r--r--core/src/main/scala/chisel3/BoolFactory.scala (renamed from chiselFrontend/src/main/scala/chisel3/BoolFactory.scala)0
-rw-r--r--core/src/main/scala/chisel3/Clock.scala (renamed from chiselFrontend/src/main/scala/chisel3/Clock.scala)0
-rw-r--r--core/src/main/scala/chisel3/CompileOptions.scala (renamed from chiselFrontend/src/main/scala/chisel3/CompileOptions.scala)0
-rw-r--r--core/src/main/scala/chisel3/Data.scala (renamed from chiselFrontend/src/main/scala/chisel3/Data.scala)0
-rw-r--r--core/src/main/scala/chisel3/Element.scala (renamed from chiselFrontend/src/main/scala/chisel3/Element.scala)0
-rw-r--r--core/src/main/scala/chisel3/Mem.scala (renamed from chiselFrontend/src/main/scala/chisel3/Mem.scala)0
-rw-r--r--core/src/main/scala/chisel3/Module.scala (renamed from chiselFrontend/src/main/scala/chisel3/Module.scala)0
-rw-r--r--core/src/main/scala/chisel3/ModuleAspect.scala (renamed from chiselFrontend/src/main/scala/chisel3/ModuleAspect.scala)0
-rw-r--r--core/src/main/scala/chisel3/MultiClock.scala (renamed from chiselFrontend/src/main/scala/chisel3/MultiClock.scala)0
-rw-r--r--core/src/main/scala/chisel3/Mux.scala (renamed from chiselFrontend/src/main/scala/chisel3/Mux.scala)0
-rw-r--r--core/src/main/scala/chisel3/Num.scala (renamed from chiselFrontend/src/main/scala/chisel3/Num.scala)0
-rw-r--r--core/src/main/scala/chisel3/Printable.scala (renamed from chiselFrontend/src/main/scala/chisel3/Printable.scala)0
-rw-r--r--core/src/main/scala/chisel3/Printf.scala (renamed from chiselFrontend/src/main/scala/chisel3/Printf.scala)0
-rw-r--r--core/src/main/scala/chisel3/RawModule.scala (renamed from chiselFrontend/src/main/scala/chisel3/RawModule.scala)0
-rw-r--r--core/src/main/scala/chisel3/Reg.scala (renamed from chiselFrontend/src/main/scala/chisel3/Reg.scala)0
-rw-r--r--core/src/main/scala/chisel3/SIntFactory.scala (renamed from chiselFrontend/src/main/scala/chisel3/SIntFactory.scala)0
-rw-r--r--core/src/main/scala/chisel3/SeqUtils.scala (renamed from chiselFrontend/src/main/scala/chisel3/SeqUtils.scala)0
-rw-r--r--core/src/main/scala/chisel3/StrongEnum.scala (renamed from chiselFrontend/src/main/scala/chisel3/StrongEnum.scala)0
-rw-r--r--core/src/main/scala/chisel3/UIntFactory.scala (renamed from chiselFrontend/src/main/scala/chisel3/UIntFactory.scala)0
-rw-r--r--core/src/main/scala/chisel3/When.scala (renamed from chiselFrontend/src/main/scala/chisel3/When.scala)0
-rw-r--r--core/src/main/scala/chisel3/aop/Aspect.scala (renamed from chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala)0
-rw-r--r--core/src/main/scala/chisel3/core/package.scala (renamed from chiselFrontend/src/main/scala/chisel3/core/package.scala)0
-rw-r--r--core/src/main/scala/chisel3/dontTouch.scala (renamed from chiselFrontend/src/main/scala/chisel3/dontTouch.scala)0
-rw-r--r--core/src/main/scala/chisel3/experimental/Analog.scala (renamed from chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala)0
-rw-r--r--core/src/main/scala/chisel3/experimental/package.scala (renamed from chiselFrontend/src/main/scala/chisel3/experimental/package.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/BiConnect.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/BiConnect.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/Binding.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/Binding.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/Builder.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/Builder.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/Error.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/Error.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/MonoConnect.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/MonoConnect.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/Namer.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/Namer.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/SourceInfo.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/SourceInfo.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/firrtl/Converter.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/firrtl/Converter.scala)0
-rw-r--r--core/src/main/scala/chisel3/internal/firrtl/IR.scala (renamed from chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala)0
-rw-r--r--core/src/main/scala/chisel3/package.scala (renamed from chiselFrontend/src/main/scala/chisel3/package.scala)0
-rw-r--r--macros/src/main/scala/chisel3/SourceInfoDoc.scala (renamed from coreMacros/src/main/scala/chisel3/SourceInfoDoc.scala)0
-rw-r--r--macros/src/main/scala/chisel3/internal/RangeTransform.scala (renamed from coreMacros/src/main/scala/chisel3/internal/RangeTransform.scala)0
-rw-r--r--macros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala (renamed from coreMacros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala)0
-rw-r--r--macros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala (renamed from coreMacros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala)0
-rw-r--r--macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala (renamed from coreMacros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala)0
47 files changed, 10 insertions, 26 deletions
diff --git a/build.sbt b/build.sbt
index be265361..64520fa1 100644
--- a/build.sbt
+++ b/build.sbt
@@ -122,16 +122,14 @@ lazy val chiselSettings = Seq (
}
)
-lazy val coreMacros = (project in file("coreMacros")).
- settings(commonSettings: _*).
- // Prevent separate JARs from being generated for coreMacros.
- settings(skip in publish := true)
+lazy val macros = (project in file("macros")).
+ settings(name := "chisel3-macros").
+ settings(commonSettings: _*)
-lazy val chiselFrontend = (project in file("chiselFrontend")).
+lazy val core = (project in file("core")).
settings(commonSettings: _*).
- // Prevent separate JARs from being generated for chiselFrontend.
- settings(skip in publish := true).
settings(
+ name := "chisel3-core",
scalacOptions := scalacOptions.value ++ Seq(
"-deprecation",
"-explaintypes",
@@ -143,7 +141,7 @@ lazy val chiselFrontend = (project in file("chiselFrontend")).
// "-Xlint:missing-interpolator"
)
).
- dependsOn(coreMacros)
+ dependsOn(macros)
// This will always be the root project, even if we are a sub-project.
lazy val root = RootProject(file("."))
@@ -159,15 +157,9 @@ lazy val chisel = (project in file(".")).
settings(commonSettings: _*).
settings(chiselSettings: _*).
settings(publishSettings: _*).
- dependsOn(coreMacros % "compile-internal;test-internal").
- dependsOn(chiselFrontend % "compile-internal;test-internal").
- // We used to have to disable aggregation in general in order to suppress
- // creation of subproject JARs (coreMacros and chiselFrontend) during publishing.
- // This had the unfortunate side-effect of suppressing coverage tests and scaladoc generation in subprojects.
- // The "skip in publish := true" setting in subproject settings seems to be
- // sufficient to suppress subproject JAR creation, so we can restore
- // general aggregation, and thus get coverage tests and scaladoc for subprojects.
- aggregate(coreMacros, chiselFrontend).
+ dependsOn(macros).
+ dependsOn(core).
+ aggregate(macros, core).
settings(
scalacOptions in Test ++= Seq("-language:reflectiveCalls"),
scalacOptions in Compile in doc ++= Seq(
@@ -189,13 +181,5 @@ lazy val chisel = (project in file(".")).
}
s"https://github.com/freechipsproject/chisel3/tree/$branch/€{FILE_PATH}.scala"
}
- ),
- // Include macro classes, resources, and sources main JAR since we don't create subproject JARs.
- mappings in (Compile, packageBin) ++= (mappings in (coreMacros, Compile, packageBin)).value,
- mappings in (Compile, packageSrc) ++= (mappings in (coreMacros, Compile, packageSrc)).value,
- mappings in (Compile, packageBin) ++= (mappings in (chiselFrontend, Compile, packageBin)).value,
- mappings in (Compile, packageSrc) ++= (mappings in (chiselFrontend, Compile, packageSrc)).value,
- // Export the packaged JAR so projects that depend directly on Chisel project (rather than the
- // published artifact) also see the stuff in coreMacros and chiselFrontend.
- exportJars := true
+ )
)
diff --git a/chiselFrontend/src/main/scala/chisel3/Aggregate.scala b/core/src/main/scala/chisel3/Aggregate.scala
index 6c1e8dfb..6c1e8dfb 100644
--- a/chiselFrontend/src/main/scala/chisel3/Aggregate.scala
+++ b/core/src/main/scala/chisel3/Aggregate.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Annotation.scala b/core/src/main/scala/chisel3/Annotation.scala
index e54b1bf9..e54b1bf9 100644
--- a/chiselFrontend/src/main/scala/chisel3/Annotation.scala
+++ b/core/src/main/scala/chisel3/Annotation.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Assert.scala b/core/src/main/scala/chisel3/Assert.scala
index af58bce6..af58bce6 100644
--- a/chiselFrontend/src/main/scala/chisel3/Assert.scala
+++ b/core/src/main/scala/chisel3/Assert.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Attach.scala b/core/src/main/scala/chisel3/Attach.scala
index 25c83d9a..25c83d9a 100644
--- a/chiselFrontend/src/main/scala/chisel3/Attach.scala
+++ b/core/src/main/scala/chisel3/Attach.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Bits.scala b/core/src/main/scala/chisel3/Bits.scala
index 43c34d9d..43c34d9d 100644
--- a/chiselFrontend/src/main/scala/chisel3/Bits.scala
+++ b/core/src/main/scala/chisel3/Bits.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/BlackBox.scala b/core/src/main/scala/chisel3/BlackBox.scala
index f29962d7..f29962d7 100644
--- a/chiselFrontend/src/main/scala/chisel3/BlackBox.scala
+++ b/core/src/main/scala/chisel3/BlackBox.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/BoolFactory.scala b/core/src/main/scala/chisel3/BoolFactory.scala
index bccd6414..bccd6414 100644
--- a/chiselFrontend/src/main/scala/chisel3/BoolFactory.scala
+++ b/core/src/main/scala/chisel3/BoolFactory.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Clock.scala b/core/src/main/scala/chisel3/Clock.scala
index d7975b1e..d7975b1e 100644
--- a/chiselFrontend/src/main/scala/chisel3/Clock.scala
+++ b/core/src/main/scala/chisel3/Clock.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/CompileOptions.scala b/core/src/main/scala/chisel3/CompileOptions.scala
index ed410c6e..ed410c6e 100644
--- a/chiselFrontend/src/main/scala/chisel3/CompileOptions.scala
+++ b/core/src/main/scala/chisel3/CompileOptions.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Data.scala b/core/src/main/scala/chisel3/Data.scala
index 6574a39d..6574a39d 100644
--- a/chiselFrontend/src/main/scala/chisel3/Data.scala
+++ b/core/src/main/scala/chisel3/Data.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Element.scala b/core/src/main/scala/chisel3/Element.scala
index fccae9ab..fccae9ab 100644
--- a/chiselFrontend/src/main/scala/chisel3/Element.scala
+++ b/core/src/main/scala/chisel3/Element.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Mem.scala b/core/src/main/scala/chisel3/Mem.scala
index 24ab4b8e..24ab4b8e 100644
--- a/chiselFrontend/src/main/scala/chisel3/Mem.scala
+++ b/core/src/main/scala/chisel3/Mem.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Module.scala b/core/src/main/scala/chisel3/Module.scala
index f1c4e30a..f1c4e30a 100644
--- a/chiselFrontend/src/main/scala/chisel3/Module.scala
+++ b/core/src/main/scala/chisel3/Module.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/ModuleAspect.scala b/core/src/main/scala/chisel3/ModuleAspect.scala
index 20793cd7..20793cd7 100644
--- a/chiselFrontend/src/main/scala/chisel3/ModuleAspect.scala
+++ b/core/src/main/scala/chisel3/ModuleAspect.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/MultiClock.scala b/core/src/main/scala/chisel3/MultiClock.scala
index 239e745a..239e745a 100644
--- a/chiselFrontend/src/main/scala/chisel3/MultiClock.scala
+++ b/core/src/main/scala/chisel3/MultiClock.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Mux.scala b/core/src/main/scala/chisel3/Mux.scala
index 960424bf..960424bf 100644
--- a/chiselFrontend/src/main/scala/chisel3/Mux.scala
+++ b/core/src/main/scala/chisel3/Mux.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Num.scala b/core/src/main/scala/chisel3/Num.scala
index 7a6b0744..7a6b0744 100644
--- a/chiselFrontend/src/main/scala/chisel3/Num.scala
+++ b/core/src/main/scala/chisel3/Num.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Printable.scala b/core/src/main/scala/chisel3/Printable.scala
index 7add9166..7add9166 100644
--- a/chiselFrontend/src/main/scala/chisel3/Printable.scala
+++ b/core/src/main/scala/chisel3/Printable.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Printf.scala b/core/src/main/scala/chisel3/Printf.scala
index 0478e889..0478e889 100644
--- a/chiselFrontend/src/main/scala/chisel3/Printf.scala
+++ b/core/src/main/scala/chisel3/Printf.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/RawModule.scala b/core/src/main/scala/chisel3/RawModule.scala
index 218022cc..218022cc 100644
--- a/chiselFrontend/src/main/scala/chisel3/RawModule.scala
+++ b/core/src/main/scala/chisel3/RawModule.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/Reg.scala b/core/src/main/scala/chisel3/Reg.scala
index 7129c389..7129c389 100644
--- a/chiselFrontend/src/main/scala/chisel3/Reg.scala
+++ b/core/src/main/scala/chisel3/Reg.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/SIntFactory.scala b/core/src/main/scala/chisel3/SIntFactory.scala
index c1c6b1db..c1c6b1db 100644
--- a/chiselFrontend/src/main/scala/chisel3/SIntFactory.scala
+++ b/core/src/main/scala/chisel3/SIntFactory.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/SeqUtils.scala b/core/src/main/scala/chisel3/SeqUtils.scala
index 28f753b1..28f753b1 100644
--- a/chiselFrontend/src/main/scala/chisel3/SeqUtils.scala
+++ b/core/src/main/scala/chisel3/SeqUtils.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/StrongEnum.scala b/core/src/main/scala/chisel3/StrongEnum.scala
index 8edce4d8..8edce4d8 100644
--- a/chiselFrontend/src/main/scala/chisel3/StrongEnum.scala
+++ b/core/src/main/scala/chisel3/StrongEnum.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/UIntFactory.scala b/core/src/main/scala/chisel3/UIntFactory.scala
index 3868962b..3868962b 100644
--- a/chiselFrontend/src/main/scala/chisel3/UIntFactory.scala
+++ b/core/src/main/scala/chisel3/UIntFactory.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/When.scala b/core/src/main/scala/chisel3/When.scala
index ea243bbe..ea243bbe 100644
--- a/chiselFrontend/src/main/scala/chisel3/When.scala
+++ b/core/src/main/scala/chisel3/When.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala b/core/src/main/scala/chisel3/aop/Aspect.scala
index 9f10a0dd..9f10a0dd 100644
--- a/chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala
+++ b/core/src/main/scala/chisel3/aop/Aspect.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/core/package.scala b/core/src/main/scala/chisel3/core/package.scala
index 92c4617b..92c4617b 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/package.scala
+++ b/core/src/main/scala/chisel3/core/package.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/dontTouch.scala b/core/src/main/scala/chisel3/dontTouch.scala
index 5dfd9f19..5dfd9f19 100644
--- a/chiselFrontend/src/main/scala/chisel3/dontTouch.scala
+++ b/core/src/main/scala/chisel3/dontTouch.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala b/core/src/main/scala/chisel3/experimental/Analog.scala
index 37eb578d..37eb578d 100644
--- a/chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala
+++ b/core/src/main/scala/chisel3/experimental/Analog.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/experimental/package.scala b/core/src/main/scala/chisel3/experimental/package.scala
index 985f7715..985f7715 100644
--- a/chiselFrontend/src/main/scala/chisel3/experimental/package.scala
+++ b/core/src/main/scala/chisel3/experimental/package.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/BiConnect.scala b/core/src/main/scala/chisel3/internal/BiConnect.scala
index 6b4c1070..6b4c1070 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/BiConnect.scala
+++ b/core/src/main/scala/chisel3/internal/BiConnect.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Binding.scala b/core/src/main/scala/chisel3/internal/Binding.scala
index 07c44f9f..07c44f9f 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/Binding.scala
+++ b/core/src/main/scala/chisel3/internal/Binding.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala b/core/src/main/scala/chisel3/internal/Builder.scala
index 773a9ad1..773a9ad1 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala
+++ b/core/src/main/scala/chisel3/internal/Builder.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Error.scala b/core/src/main/scala/chisel3/internal/Error.scala
index 369da52e..369da52e 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/Error.scala
+++ b/core/src/main/scala/chisel3/internal/Error.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/MonoConnect.scala b/core/src/main/scala/chisel3/internal/MonoConnect.scala
index 41402021..41402021 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/MonoConnect.scala
+++ b/core/src/main/scala/chisel3/internal/MonoConnect.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Namer.scala b/core/src/main/scala/chisel3/internal/Namer.scala
index 999971a4..999971a4 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/Namer.scala
+++ b/core/src/main/scala/chisel3/internal/Namer.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/SourceInfo.scala b/core/src/main/scala/chisel3/internal/SourceInfo.scala
index f1130db4..f1130db4 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/SourceInfo.scala
+++ b/core/src/main/scala/chisel3/internal/SourceInfo.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/Converter.scala b/core/src/main/scala/chisel3/internal/firrtl/Converter.scala
index 5c1d6935..5c1d6935 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/Converter.scala
+++ b/core/src/main/scala/chisel3/internal/firrtl/Converter.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala b/core/src/main/scala/chisel3/internal/firrtl/IR.scala
index d98bebcd..d98bebcd 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala
+++ b/core/src/main/scala/chisel3/internal/firrtl/IR.scala
diff --git a/chiselFrontend/src/main/scala/chisel3/package.scala b/core/src/main/scala/chisel3/package.scala
index 65bfdeb7..65bfdeb7 100644
--- a/chiselFrontend/src/main/scala/chisel3/package.scala
+++ b/core/src/main/scala/chisel3/package.scala
diff --git a/coreMacros/src/main/scala/chisel3/SourceInfoDoc.scala b/macros/src/main/scala/chisel3/SourceInfoDoc.scala
index c44da915..c44da915 100644
--- a/coreMacros/src/main/scala/chisel3/SourceInfoDoc.scala
+++ b/macros/src/main/scala/chisel3/SourceInfoDoc.scala
diff --git a/coreMacros/src/main/scala/chisel3/internal/RangeTransform.scala b/macros/src/main/scala/chisel3/internal/RangeTransform.scala
index 0fdbff81..0fdbff81 100644
--- a/coreMacros/src/main/scala/chisel3/internal/RangeTransform.scala
+++ b/macros/src/main/scala/chisel3/internal/RangeTransform.scala
diff --git a/coreMacros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala b/macros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala
index e1f528b3..e1f528b3 100644
--- a/coreMacros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala
+++ b/macros/src/main/scala/chisel3/internal/RuntimeDeprecationTransform.scala
diff --git a/coreMacros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala b/macros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala
index bf4879ec..bf4879ec 100644
--- a/coreMacros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala
+++ b/macros/src/main/scala/chisel3/internal/naming/NamingAnnotations.scala
diff --git a/coreMacros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala b/macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala
index 6d7c3411..6d7c3411 100644
--- a/coreMacros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala
+++ b/macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala