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Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/chiselTests/util/experimental/PlaSpec.scala | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/util/experimental/PlaSpec.scala b/src/test/scala/chiselTests/util/experimental/PlaSpec.scala index 45ac012e..8af5c936 100644 --- a/src/test/scala/chiselTests/util/experimental/PlaSpec.scala +++ b/src/test/scala/chiselTests/util/experimental/PlaSpec.scala @@ -49,6 +49,21 @@ class PlaSpec extends ChiselFlatSpec { }) } + "#2112" should "be generated correctly" in { + assertTesterPasses(new BasicTester { + val table = Seq( + (BitPat("b000"), BitPat("b?01")), + (BitPat("b111"), BitPat("b?01")), + ) + table.foreach { case (i, o) => + val (plaIn, plaOut) = pla(table) + plaIn := WireDefault(i.value.U(3.W)) + chisel3.assert(o === plaOut, "Input " + i.toString + " produced incorrect output BitPat(%b)", plaOut) + } + stop() + }) + } + "A simple PLA" should "be generated correctly" in { assertTesterPasses(new BasicTester { val table = Seq( |