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authorJiuyang Liu2021-09-07 14:14:47 +0800
committerGitHub2021-09-07 14:14:47 +0800
commit9964857e2ddd97fc14ac63d1a8a04223a19a15c3 (patch)
tree0fe70f239e7adf2412127a86d5c0cbd6b01ee96e /src/test
parent7cd821f5a975ff97694d39893af1d89952d37c69 (diff)
parent189da9828b1990e360fe521598dc340a260d05d5 (diff)
Merge pull request #2113 from yqszxx/fix-pla-dcto1
Fix a bug causes incorrect pla generation when input is `?`
Diffstat (limited to 'src/test')
-rw-r--r--src/test/scala/chiselTests/util/experimental/PlaSpec.scala15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/util/experimental/PlaSpec.scala b/src/test/scala/chiselTests/util/experimental/PlaSpec.scala
index 45ac012e..8af5c936 100644
--- a/src/test/scala/chiselTests/util/experimental/PlaSpec.scala
+++ b/src/test/scala/chiselTests/util/experimental/PlaSpec.scala
@@ -49,6 +49,21 @@ class PlaSpec extends ChiselFlatSpec {
})
}
+ "#2112" should "be generated correctly" in {
+ assertTesterPasses(new BasicTester {
+ val table = Seq(
+ (BitPat("b000"), BitPat("b?01")),
+ (BitPat("b111"), BitPat("b?01")),
+ )
+ table.foreach { case (i, o) =>
+ val (plaIn, plaOut) = pla(table)
+ plaIn := WireDefault(i.value.U(3.W))
+ chisel3.assert(o === plaOut, "Input " + i.toString + " produced incorrect output BitPat(%b)", plaOut)
+ }
+ stop()
+ })
+ }
+
"A simple PLA" should "be generated correctly" in {
assertTesterPasses(new BasicTester {
val table = Seq(