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-rw-r--r--src/test/scala/chiselTests/ChiselSpec.scala5
-rw-r--r--src/test/scala/chiselTests/Vec.scala4
2 files changed, 6 insertions, 3 deletions
diff --git a/src/test/scala/chiselTests/ChiselSpec.scala b/src/test/scala/chiselTests/ChiselSpec.scala
index 6f560b94..e00afcf6 100644
--- a/src/test/scala/chiselTests/ChiselSpec.scala
+++ b/src/test/scala/chiselTests/ChiselSpec.scala
@@ -38,7 +38,10 @@ trait ChiselRunners extends Assertions with BackendCompilationUtilities {
annotations: AnnotationSeq = Seq()
): Boolean = {
// Change this to enable Treadle as a backend
- val defaultBackend = chisel3.testers.TesterDriver.defaultBackend
+ val defaultBackend = {
+ val useTreadle = sys.env.get("CHISEL3_CI_USE_TREADLE").isDefined
+ if (useTreadle) chisel3.testers.TreadleBackend else chisel3.testers.TesterDriver.defaultBackend
+ }
val hasBackend = TestUtils.containsBackend(annotations)
val annos: Seq[Annotation] = if (hasBackend) annotations else defaultBackend +: annotations
TesterDriver.execute(() => t, additionalVResources, annos)
diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala
index 02743187..4a871890 100644
--- a/src/test/scala/chiselTests/Vec.scala
+++ b/src/test/scala/chiselTests/Vec.scala
@@ -6,7 +6,7 @@ import org.scalacheck._
import chisel3._
import chisel3.stage.ChiselStage
-import chisel3.testers.BasicTester
+import chisel3.testers.{BasicTester, TesterDriver}
import chisel3.util._
import org.scalacheck.Shrink
import scala.annotation.tailrec
@@ -456,7 +456,7 @@ class VecSpec extends ChiselPropSpec with Utils {
}
property("Infering widths on huge Vecs should not cause a stack overflow") {
- assertTesterPasses { new HugeVecTester(10000) }
+ assertTesterPasses(new HugeVecTester(10000), annotations = TesterDriver.verilatorOnly)
}
property("A Reg of a Vec of a single 1 bit element should compile and work") {