diff options
Diffstat (limited to 'src/test/scala/chiselTests/experimental')
5 files changed, 154 insertions, 7 deletions
diff --git a/src/test/scala/chiselTests/experimental/DataView.scala b/src/test/scala/chiselTests/experimental/DataView.scala index 5ef062fa..0285a524 100644 --- a/src/test/scala/chiselTests/experimental/DataView.scala +++ b/src/test/scala/chiselTests/experimental/DataView.scala @@ -103,8 +103,8 @@ class DataViewSpec extends ChiselFlatSpec { buzz.viewAs[MyBundle] := in } val chirrtl = ChiselStage.emitChirrtl(new MyModule) - chirrtl should include("fizz.foo <= in.foo") - chirrtl should include("buzz.foo <= in.foo") + chirrtl should include("fizz <= in") + chirrtl should include("buzz <= in") } it should "handle viewing Vecs as their same concrete type" in { @@ -116,8 +116,8 @@ class DataViewSpec extends ChiselFlatSpec { buzz.viewAs[Vec[UInt]] := in } val chirrtl = ChiselStage.emitChirrtl(new MyModule) - chirrtl should include("fizz[0] <= in[0]") - chirrtl should include("buzz[0] <= in[0]") + chirrtl should include("fizz <= in") + chirrtl should include("buzz <= in") } it should "handle viewing Vecs as Bundles and vice versa" in { diff --git a/src/test/scala/chiselTests/experimental/hierarchy/Annotations.scala b/src/test/scala/chiselTests/experimental/hierarchy/Annotations.scala index 2c1d2e9e..ec71fe09 100644 --- a/src/test/scala/chiselTests/experimental/hierarchy/Annotations.scala +++ b/src/test/scala/chiselTests/experimental/hierarchy/Annotations.scala @@ -4,10 +4,11 @@ package chiselTests.experimental.hierarchy import _root_.firrtl.annotations._ import chisel3.experimental.{annotate, BaseModule} -import chisel3.Data +import chisel3.{Data, MemBase} import chisel3.experimental.hierarchy.{Definition, Hierarchy, Instance} -object Annotations { +// These annotations exist purely for testing purposes +private[hierarchy] object Annotations { case class MarkAnnotation(target: IsMember, tag: String) extends SingleTargetAnnotation[IsMember] { def duplicate(n: IsMember): Annotation = this.copy(target = n) } @@ -19,7 +20,12 @@ object Annotations { extends chisel3.experimental.ChiselAnnotation { def toFirrtl = if (isAbsolute) MarkAnnotation(d.toAbsoluteTarget, tag) else MarkAnnotation(d.toTarget, tag) } + case class MarkChiselMemAnnotation[T <: Data](m: MemBase[T], tag: String, isAbsolute: Boolean) + extends chisel3.experimental.ChiselAnnotation { + def toFirrtl = if (isAbsolute) MarkAnnotation(m.toAbsoluteTarget, tag) else MarkAnnotation(m.toTarget, tag) + } def mark(d: Data, tag: String): Unit = annotate(MarkChiselAnnotation(d, tag, false)) + def mark[T <: Data](d: MemBase[T], tag: String): Unit = annotate(MarkChiselMemAnnotation(d, tag, false)) def mark[B <: BaseModule](d: Hierarchy[B], tag: String): Unit = annotate(MarkChiselHierarchyAnnotation(d, tag, true)) def amark(d: Data, tag: String): Unit = annotate(MarkChiselAnnotation(d, tag, true)) def amark[B <: BaseModule](d: Hierarchy[B], tag: String): Unit = annotate(MarkChiselHierarchyAnnotation(d, tag, true)) diff --git a/src/test/scala/chiselTests/experimental/hierarchy/DefinitionSpec.scala b/src/test/scala/chiselTests/experimental/hierarchy/DefinitionSpec.scala index 63beb394..6ff4a3eb 100644 --- a/src/test/scala/chiselTests/experimental/hierarchy/DefinitionSpec.scala +++ b/src/test/scala/chiselTests/experimental/hierarchy/DefinitionSpec.scala @@ -329,6 +329,39 @@ class DefinitionSpec extends ChiselFunSpec with Utils { annos should contain(MarkAnnotation("~Top|HasEither>x".rt, "xright")) annos should contain(MarkAnnotation("~Top|HasEither>y".rt, "yleft")) } + it("3.12: should work on tuple2") { + class Top() extends Module { + val i = Definition(new HasTuple2()) + mark(i.xy._1, "x") + mark(i.xy._2, "y") + } + val (_, annos) = getFirrtlAndAnnos(new Top) + annos should contain(MarkAnnotation("~Top|HasTuple2>x".rt, "x")) + annos should contain(MarkAnnotation("~Top|HasTuple2>y".rt, "y")) + } + it("3.13: should work on Mems/SyncReadMems") { + class Top() extends Module { + val i = Definition(new HasMems()) + mark(i.mem, "Mem") + mark(i.syncReadMem, "SyncReadMem") + } + val (_, annos) = getFirrtlAndAnnos(new Top) + annos should contain(MarkAnnotation("~Top|HasMems>mem".rt, "Mem")) + annos should contain(MarkAnnotation("~Top|HasMems>syncReadMem".rt, "SyncReadMem")) + } + it("3.14: should not create memory ports") { + class Top() extends Module { + val i = Definition(new HasMems()) + i.mem(0) := 100.U // should be illegal! + } + val failure = intercept[ChiselException] { + getFirrtlAndAnnos(new Top) + } + assert( + failure.getMessage == + "Cannot create a memory port in a different module (Top) than where the memory is (HasMems)." + ) + } } describe("4: toDefinition") { it("4.0: should work on modules") { diff --git a/src/test/scala/chiselTests/experimental/hierarchy/Examples.scala b/src/test/scala/chiselTests/experimental/hierarchy/Examples.scala index 5b78b7cc..fa26cbde 100644 --- a/src/test/scala/chiselTests/experimental/hierarchy/Examples.scala +++ b/src/test/scala/chiselTests/experimental/hierarchy/Examples.scala @@ -47,6 +47,13 @@ object Examples { val addOneDef = Seq.fill(3)(Definition(new AddOne)) out := in + 1.U } + @instantiable + class AddOneBlackBox extends BlackBox { + @public val io = IO(new Bundle { + val in = Input(UInt(32.W)) + val out = Output(UInt(32.W)) + }) + } @instantiable class AddTwo extends Module { @@ -200,6 +207,12 @@ object Examples { @public val y: Either[Bool, UInt] = Left(Wire(Bool()).suggestName("y")) } @instantiable + class HasTuple2() extends Module { + val x = Wire(UInt(3.W)) + val y = Wire(Bool()) + @public val xy = (x, y) + } + @instantiable class HasVec() extends Module { @public val x = VecInit(1.U, 2.U, 3.U) } @@ -252,4 +265,10 @@ object Examples { val i10 = Instance(tpDef1) val i11 = Instance(tpDef1) } + + @instantiable + class HasMems() extends Module { + @public val mem = Mem(8, UInt(32.W)) + @public val syncReadMem = SyncReadMem(8, UInt(32.W)) + } } diff --git a/src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala b/src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala index 45d1f85f..8d8f7ea5 100644 --- a/src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala +++ b/src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala @@ -43,6 +43,29 @@ class InstanceSpec extends ChiselFunSpec with Utils { val (chirrtl, _) = getFirrtlAndAnnos(new Top) chirrtl.serialize should include("inst i0 of AddOne") } + it("0.3: BlackBoxes should be supported") { + class Top extends Module { + val in = IO(Input(UInt(32.W))) + val out = IO(Output(UInt(32.W))) + val io = IO(new Bundle { + val in = Input(UInt(32.W)) + val out = Output(UInt(32.W)) + }) + val definition = Definition(new AddOneBlackBox) + val i0 = Instance(definition) + val i1 = Instance(definition) + i0.io.in := in + out := i0.io.out + io <> i1.io + } + val chirrtl = getFirrtlAndAnnos(new Top)._1.serialize + chirrtl should include("inst i0 of AddOneBlackBox") + chirrtl should include("inst i1 of AddOneBlackBox") + chirrtl should include("i0.in <= in") + chirrtl should include("out <= i0.out") + chirrtl should include("i1.in <= io.in") + chirrtl should include("io.out <= i1.out") + } } describe("1: Annotations on instances in same chisel compilation") { it("1.0: should work on a single instance, annotating the instance") { @@ -298,7 +321,18 @@ class InstanceSpec extends ChiselFunSpec with Utils { annos should contain(MarkAnnotation("~Top|Top/i:HasEither>x".rt, "xright")) annos should contain(MarkAnnotation("~Top|Top/i:HasEither>y".rt, "yleft")) } - it("3.12: should properly support val modifiers") { + it("3.12: should work on tuple2") { + class Top() extends Module { + val i = Instance(Definition(new HasTuple2())) + mark(i.xy._1, "x") + mark(i.xy._2, "y") + } + val (_, annos) = getFirrtlAndAnnos(new Top) + annos should contain(MarkAnnotation("~Top|Top/i:HasTuple2>x".rt, "x")) + annos should contain(MarkAnnotation("~Top|Top/i:HasTuple2>y".rt, "y")) + } + + it("3.13: should properly support val modifiers") { class SupClass extends Module { val value = 10 val overriddenVal = 10 @@ -320,6 +354,16 @@ class InstanceSpec extends ChiselFunSpec with Utils { @public override final lazy val y: Int = 4 } } + it("3.13: should work with Mems/SyncReadMems") { + class Top() extends Module { + val i = Instance(Definition(new HasMems())) + mark(i.mem, "Mem") + mark(i.syncReadMem, "SyncReadMem") + } + val (_, annos) = getFirrtlAndAnnos(new Top) + annos should contain(MarkAnnotation("~Top|Top/i:HasMems>mem".rt, "Mem")) + annos should contain(MarkAnnotation("~Top|Top/i:HasMems>syncReadMem".rt, "SyncReadMem")) + } } describe("4: toInstance") { it("4.0: should work on modules") { @@ -695,6 +739,51 @@ class InstanceSpec extends ChiselFunSpec with Utils { annos should contain(e) } } + + it("7.4: should work on Views of BlackBoxes") { + @instantiable + class MyBlackBox extends BlackBox { + @public val io = IO(new Bundle { + val in = Input(UInt(8.W)) + val out = Output(UInt(8.W)) + }) + @public val innerView = io.viewAs + @public val foo = io.in.viewAs[UInt] + @public val bar = io.out.viewAs[UInt] + } + class Top extends RawModule { + val foo = IO(Input(UInt(8.W))) + val bar = IO(Output(UInt(8.W))) + val i = Instance(Definition(new MyBlackBox)) + val outerView = i.io.viewAs + i.foo := foo + bar := i.bar + mark(i.foo, "i.foo") + mark(i.bar, "i.bar") + mark(i.innerView.in, "i.innerView.in") + mark(outerView.out, "outerView.out") + } + val inst = "~Top|Top/i:MyBlackBox" + val expectedAnnos = List( + s"$inst>in".rt -> "i.foo", + s"$inst>out".rt -> "i.bar", + s"$inst>in".rt -> "i.innerView.in", + s"$inst>out".rt -> "outerView.out" + ) + val expectedLines = List( + "i.in <= foo", + "bar <= i.out" + ) + val (chirrtl, annos) = getFirrtlAndAnnos(new Top) + val text = chirrtl.serialize + for (line <- expectedLines) { + text should include(line) + } + for (e <- expectedAnnos.map(MarkAnnotation.tupled)) { + annos should contain(e) + } + } + } describe("8: @instantiable and @public should compose with CloneModuleAsRecord") { |