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Diffstat (limited to 'src/test/scala/chiselTests/Stack.scala')
| -rw-r--r-- | src/test/scala/chiselTests/Stack.scala | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/test/scala/chiselTests/Stack.scala b/src/test/scala/chiselTests/Stack.scala index df1e68bf..3cdb68eb 100644 --- a/src/test/scala/chiselTests/Stack.scala +++ b/src/test/scala/chiselTests/Stack.scala @@ -17,8 +17,8 @@ class ChiselStack(val depth: Int) extends Module { }) val stack_mem = Mem(depth, UInt(32.W)) - val sp = Reg(init = 0.U(log2Ceil(depth+1).W)) - val out = Reg(init = 0.U(32.W)) + val sp = RegInit(0.U(log2Ceil(depth+1).W)) + val out = RegInit(0.U(32.W)) when (io.en) { when(io.push && (sp < depth.asUInt)) { |