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Diffstat (limited to 'src/main/scala/Chisel/Module.scala')
| -rw-r--r-- | src/main/scala/Chisel/Module.scala | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/main/scala/Chisel/Module.scala b/src/main/scala/Chisel/Module.scala index 463c2f81..22c1f9c3 100644 --- a/src/main/scala/Chisel/Module.scala +++ b/src/main/scala/Chisel/Module.scala @@ -53,8 +53,6 @@ abstract class Module(_clock: Clock = null, _reset: Bool = null) extends HasId { val reset = Bool(INPUT) private[Chisel] def addId(d: HasId) { _ids += d } - private[Chisel] def ref = Builder.globalRefMap(this) - private[Chisel] def lref = ref private def ports = (clock, "clk") :: (reset, "reset") :: (io, "io") :: Nil |