diff options
Diffstat (limited to 'chiselFrontend')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/Bits.scala | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala index 0550a72c..adf97dbe 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala @@ -95,7 +95,11 @@ sealed abstract class Bits(width: Width) // provide bits-specific literal handling functionality here override private[chisel3] def ref: Arg = topBindingOpt match { - case Some(binding: LitBinding) => binding.asInstanceOf[ElementLitBinding].litArg + case Some(ElementLitBinding(litArg)) => litArg + case Some(BundleLitBinding(litMap)) => litMap.get(this) match { + case Some(litArg) => litArg + case _ => throwException(s"internal error: DontCare should be caught before connect") + } case _ => super.ref } |