diff options
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3')
3 files changed, 15 insertions, 17 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala index 77a1b57a..8fdcb260 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala @@ -261,14 +261,14 @@ trait VecLike[T <: Data] extends collection.IndexedSeq[T] with HasId { def forall(p: T => Bool): Bool = macro SourceInfoTransform.pArg def do_forall(p: T => Bool)(implicit sourceInfo: SourceInfo): Bool = - (this map p).fold(Bool(true))(_ && _) + (this map p).fold(true.B)(_ && _) /** Outputs true if p outputs true for at least one element. */ def exists(p: T => Bool): Bool = macro SourceInfoTransform.pArg def do_exists(p: T => Bool)(implicit sourceInfo: SourceInfo): Bool = - (this map p).fold(Bool(false))(_ || _) + (this map p).fold(false.B)(_ || _) /** Outputs true if the vector contains at least one element equal to x (using * the === operator). diff --git a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala index aa73abf5..b81679b6 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala @@ -92,7 +92,7 @@ sealed abstract class Bits(width: Width, override val litArg: Option[LitArg]) Builder.error(s"Negative bit indices are illegal (got $x)") } if (isLit()) { - Bool(((litValue() >> x.toInt) & 1) == 1) + (((litValue() >> x.toInt) & 1) == 1).asBool } else { Binding.checkSynthesizable(this, s"'this' ($this)") pushOp(DefPrim(sourceInfo, Bool(), BitsExtractOp, this.ref, ILit(x), ILit(x))) @@ -698,7 +698,7 @@ sealed class Bool(lit: Option[ULit] = None) extends UInt(Width(1), lit) { override private[chisel3] def fromInt(value: BigInt, width: Int): this.type = { require((value == 0 || value == 1) && width == 1) - Bool(value == 1).asInstanceOf[this.type] + (value == 1).asBool.asInstanceOf[this.type] } // REVIEW TODO: Why does this need to exist and have different conventions @@ -736,31 +736,23 @@ sealed class Bool(lit: Option[ULit] = None) extends UInt(Width(1), lit) { def do_asClock(implicit sourceInfo: SourceInfo): Clock = pushOp(DefPrim(sourceInfo, Clock(), AsClockOp, ref)) } -object Bool { +trait BoolFactory { /** Creates an empty Bool. */ def apply(): Bool = new Bool() /** Creates Bool literal. */ - def apply(x: Boolean): Bool = Lit(x) - def Lit(x: Boolean): Bool = { + protected[chisel3] def Lit(x: Boolean): Bool = { val result = new Bool(Some(ULit(if (x) 1 else 0, Width(1)))) // Bind result to being an Literal result.binding = LitBinding() result } - /** Create a UInt with a specified direction and width - compatibility with Chisel2. */ - def apply(dir: Direction): Bool = { - val result = apply() - dir match { - case Direction.Input => Input(result) - case Direction.Output => Output(result) - case Direction.Unspecified => result - } - } } +object Bool extends BoolFactory + object Mux { /** Creates a mux, whose output is one of the inputs depending on the * value of the condition. diff --git a/chiselFrontend/src/main/scala/chisel3/core/package.scala b/chiselFrontend/src/main/scala/chisel3/core/package.scala index 7fb05c75..ac10a140 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/package.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/package.scala @@ -104,7 +104,13 @@ package chisel3 { } implicit class fromBooleanToLiteral(val x: Boolean) { - def B: Bool = Bool(x) // scalastyle:ignore method.name + /** Boolean to Bool conversion, recommended style for constants. + */ + def B: Bool = Bool.Lit(x) // scalastyle:ignore method.name + + /** Boolean to Bool conversion, recommended style for variables. + */ + def asBool: Bool = Bool.Lit(x) } implicit class fromDoubleToLiteral(val x: Double) { |