diff options
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala | 4 | ||||
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/Data.scala | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala b/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala index 6d8e85a4..410f8cb4 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala @@ -75,7 +75,7 @@ abstract class ExtModule(val params: Map[String, Param] = Map.empty[String, Para } val firrtlPorts = getModulePorts map {port => Port(port, port.userDirection)} - val component = DefBlackBox(this, name, firrtlPorts, params) + val component = DefBlackBox(this, name, firrtlPorts, UserDirection.Unspecified, params) _component = Some(component) component } @@ -160,7 +160,7 @@ abstract class BlackBox(val params: Map[String, Param] = Map.empty[String, Param } val firrtlPorts = namedPorts map {namedPort => Port(namedPort._2, namedPort._2.userDirection)} - val component = DefBlackBox(this, name, firrtlPorts, params) + val component = DefBlackBox(this, name, firrtlPorts, io.userDirection, params) _component = Some(component) component } diff --git a/chiselFrontend/src/main/scala/chisel3/core/Data.scala b/chiselFrontend/src/main/scala/chisel3/core/Data.scala index 41e09a5b..74e41895 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Data.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Data.scala @@ -19,7 +19,7 @@ object UserDirection { /** Node and its children are forced as output */ case object Output extends UserDirection - /** Node and ites children are forced as inputs + /** Node and its children are forced as inputs */ case object Input extends UserDirection /** Mainly for containers, children are flipped. |