Update scalatest to 3.1.0 (#1394)

Co-authored-by: Scala Steward <me@scala-steward.org>

34 files changed, 90 insertions, 50 deletions

diff --git a/src/test/scala/chisel3/stage/phases/DriverCompatibilitySpec.scala b/src/test/scala/chisel3/stage/phases/DriverCompatibilitySpec.scala
index c478db27..a8f34dd3 100644
--- a/src/test/scala/chisel3/stage/phases/DriverCompatibilitySpec.scala
+++ b/src/test/scala/chisel3/stage/phases/DriverCompatibilitySpec.scala
@@ -2,15 +2,16 @@
 
 package chisel3.stage.phases
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import chisel3.stage.{NoRunFirrtlCompilerAnnotation, ChiselOutputFileAnnotation}
 
 import firrtl.options.{OutputAnnotationFileAnnotation, StageOptions}
 import firrtl.options.Viewer.view
 import firrtl.stage.phases.DriverCompatibility.TopNameAnnotation
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
-class DriverCompatibilitySpec extends FlatSpec with Matchers {
+class DriverCompatibilitySpec extends AnyFlatSpec with Matchers {
 
   behavior of classOf[DriverCompatibility.AddImplicitOutputFile].toString
 
diff --git a/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala b/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
index b8a0a5ef..f63fcb3d 100644
--- a/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
+++ b/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
@@ -13,6 +13,8 @@ import firrtl.annotations.{
   Named
 }
 import org.scalatest._
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 /** These annotations and the IdentityTransform class serve as an example of how to write a
   * Chisel/Firrtl library
@@ -129,7 +131,7 @@ class DiamondTester extends BasicTester {
   stop()
 }
 
-class AnnotatingDiamondSpec extends FreeSpec with Matchers {
+class AnnotatingDiamondSpec extends AnyFreeSpec with Matchers {
 
   """
     |Diamond is an example of a module that has two sub-modules A and B who both instantiate their
diff --git a/src/test/scala/chiselTests/AnnotationNoDedup.scala b/src/test/scala/chiselTests/AnnotationNoDedup.scala
index 3cb457eb..d9cf6110 100644
--- a/src/test/scala/chiselTests/AnnotationNoDedup.scala
+++ b/src/test/scala/chiselTests/AnnotationNoDedup.scala
@@ -5,7 +5,8 @@ package chiselTests
 import chisel3._
 import chisel3.experimental.doNotDedup
 import firrtl.FirrtlExecutionSuccess
-import org.scalatest.{FreeSpec, Matchers}
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 
 class MuchUsedModule extends Module {
@@ -39,7 +40,7 @@ class UsesMuchUsedModule(addAnnos: Boolean) extends Module {
   }
 }
 
-class AnnotationNoDedup extends FreeSpec with Matchers {
+class AnnotationNoDedup extends AnyFreeSpec with Matchers {
   // scalastyle:off line.size.limit
   "Firrtl provides transform that reduces identical modules to a single instance" - {
     "Annotations can be added which will prevent this deduplication for specific modules instances" in {
diff --git a/src/test/scala/chiselTests/AutoNestedCloneSpec.scala b/src/test/scala/chiselTests/AutoNestedCloneSpec.scala
index 7533b873..743440bf 100644
--- a/src/test/scala/chiselTests/AutoNestedCloneSpec.scala
+++ b/src/test/scala/chiselTests/AutoNestedCloneSpec.scala
@@ -4,6 +4,7 @@ package chiselTests
 import Chisel.ChiselException
 import org.scalatest._
 import chisel3._
+import org.scalatest.matchers.should.Matchers
 
 class BundleWithAnonymousInner(val w: Int) extends Bundle {
   val inner = new Bundle {
diff --git a/src/test/scala/chiselTests/BlackBoxImpl.scala b/src/test/scala/chiselTests/BlackBoxImpl.scala
index fbfce58b..9871f251 100644
--- a/src/test/scala/chiselTests/BlackBoxImpl.scala
+++ b/src/test/scala/chiselTests/BlackBoxImpl.scala
@@ -8,7 +8,9 @@ import chisel3._
 import chisel3.util.{HasBlackBoxInline, HasBlackBoxResource, HasBlackBoxPath}
 import firrtl.FirrtlExecutionSuccess
 import org.scalacheck.Test.Failed
-import org.scalatest.{FreeSpec, Matchers, Succeeded}
+import org.scalatest.Succeeded
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 //scalastyle:off magic.number
 
@@ -87,7 +89,7 @@ class UsesBlackBoxMinusViaPath extends Module {
   io.out := mod0.io.out
 }
 
-class BlackBoxImplSpec extends FreeSpec with Matchers {
+class BlackBoxImplSpec extends AnyFreeSpec with Matchers {
   val targetDir = "test_run_dir"
   "BlackBox can have verilator source implementation" - {
     "Implementations can be contained in-line" in {
diff --git a/src/test/scala/chiselTests/ChiselSpec.scala b/src/test/scala/chiselTests/ChiselSpec.scala
index be1b2d60..31d6d322 100644
--- a/src/test/scala/chiselTests/ChiselSpec.scala
+++ b/src/test/scala/chiselTests/ChiselSpec.scala
@@ -11,6 +11,7 @@ import firrtl.{AnnotationSeq, CommonOptions, ExecutionOptionsManager, FirrtlExec
 import firrtl.util.BackendCompilationUtilities
 import java.io.ByteArrayOutputStream
 import java.security.Permission
+import org.scalatestplus.scalacheck.ScalaCheckPropertyChecks
 
 /** Common utility functions for Chisel unit tests. */
 trait ChiselRunners extends Assertions with BackendCompilationUtilities {
@@ -150,7 +151,7 @@ class ChiselTestUtilitiesSpec extends ChiselFlatSpec {
 }
 
 /** Spec base class for property-based testers. */
-class ChiselPropSpec extends PropSpec with ChiselRunners with PropertyChecks with Matchers {
+class ChiselPropSpec extends PropSpec with ChiselRunners with ScalaCheckPropertyChecks with Matchers {
 
   // Constrain the default number of instances generated for every use of forAll.
   implicit override val generatorDrivenConfig: PropertyCheckConfiguration =
diff --git a/src/test/scala/chiselTests/CompatibilitySpec.scala b/src/test/scala/chiselTests/CompatibilitySpec.scala
index b055890b..9d509cf3 100644
--- a/src/test/scala/chiselTests/CompatibilitySpec.scala
+++ b/src/test/scala/chiselTests/CompatibilitySpec.scala
@@ -5,7 +5,7 @@ package chiselTests
 import chisel3.testers.BasicTester
 
 import org.scalacheck.Gen
-import org.scalatest.prop.GeneratorDrivenPropertyChecks
+import org.scalatestplus.scalacheck.ScalaCheckDrivenPropertyChecks
 
 // Need separate import to override compile options from Chisel._
 object CompatibilityCustomCompileOptions {
@@ -17,7 +17,7 @@ object CompatibilityCustomCompileOptions {
   }
 }
 
-class CompatibiltySpec extends ChiselFlatSpec with GeneratorDrivenPropertyChecks {
+class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyChecks {
   import Chisel._
 
   behavior of "Chisel compatibility layer"
diff --git a/src/test/scala/chiselTests/DataPrint.scala b/src/test/scala/chiselTests/DataPrint.scala
index 894d4798..caf6e159 100644
--- a/src/test/scala/chiselTests/DataPrint.scala
+++ b/src/test/scala/chiselTests/DataPrint.scala
@@ -7,6 +7,7 @@ import org.scalatest._
 import chisel3._
 import chisel3.experimental.{ChiselEnum, FixedPoint}
 import chisel3.experimental.BundleLiterals._
+import org.scalatest.matchers.should.Matchers
 
 class DataPrintSpec extends ChiselFlatSpec with Matchers {
   object EnumTest extends ChiselEnum {
diff --git a/src/test/scala/chiselTests/Direction.scala b/src/test/scala/chiselTests/Direction.scala
index b27eadd4..f3c50829 100644
--- a/src/test/scala/chiselTests/Direction.scala
+++ b/src/test/scala/chiselTests/Direction.scala
@@ -4,6 +4,7 @@ package chiselTests
 
 import org.scalatest._
 import chisel3._
+import org.scalatest.matchers.should.Matchers
 
 class DirectionedBundle extends Bundle {
   val in = Input(UInt(32.W))
diff --git a/src/test/scala/chiselTests/DriverSpec.scala b/src/test/scala/chiselTests/DriverSpec.scala
index 7190261c..05c6cad4 100644
--- a/src/test/scala/chiselTests/DriverSpec.scala
+++ b/src/test/scala/chiselTests/DriverSpec.scala
@@ -7,7 +7,9 @@ import java.io.File
 import chisel3._
 import firrtl.FirrtlExecutionSuccess
 import org.scalacheck.Test.Failed
-import org.scalatest.{FreeSpec, Matchers, Succeeded}
+import org.scalatest.Succeeded
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 class DummyModule extends Module {
   val io = IO(new Bundle {
@@ -23,7 +25,7 @@ class TypeErrorModule extends chisel3.MultiIOModule {
   out := in
 }
 
-class DriverSpec extends FreeSpec with Matchers with chiselTests.Utils {
+class DriverSpec extends AnyFreeSpec with Matchers with chiselTests.Utils {
   "Driver's execute methods are used to run chisel and firrtl" - {
     "options can be picked up from comand line with no args" in {
       // NOTE: Since we don't provide any arguments (notably, "--target-dir"),
diff --git a/src/test/scala/chiselTests/FixedPointSpec.scala b/src/test/scala/chiselTests/FixedPointSpec.scala
index e97c6be7..7d6ec6a3 100644
--- a/src/test/scala/chiselTests/FixedPointSpec.scala
+++ b/src/test/scala/chiselTests/FixedPointSpec.scala
@@ -7,9 +7,11 @@ import chisel3.experimental.FixedPoint
 import chisel3.internal.firrtl.{BinaryPoint, Width}
 import chisel3.testers.BasicTester
 import org.scalatest._
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
 //scalastyle:off magic.number
-class FixedPointLiteralSpec extends FlatSpec with Matchers {
+class FixedPointLiteralSpec extends AnyFlatSpec with Matchers {
   behavior of "fixed point utilities"
 
   they should "allow conversion between doubles and the bigints needed to represent them" in {
diff --git a/src/test/scala/chiselTests/IOCompatibility.scala b/src/test/scala/chiselTests/IOCompatibility.scala
index 55d9e947..488842d4 100644
--- a/src/test/scala/chiselTests/IOCompatibility.scala
+++ b/src/test/scala/chiselTests/IOCompatibility.scala
@@ -4,6 +4,7 @@ package chiselTests
 
 import chisel3._
 import org.scalatest._
+import org.scalatest.matchers.should.Matchers
 
 class IOCSimpleIO extends Bundle {
   val in  = Input(UInt(32.W))
diff --git a/src/test/scala/chiselTests/InlineSpec.scala b/src/test/scala/chiselTests/InlineSpec.scala
index 3cc83bb9..a7d95fad 100644
--- a/src/test/scala/chiselTests/InlineSpec.scala
+++ b/src/test/scala/chiselTests/InlineSpec.scala
@@ -9,9 +9,10 @@ import firrtl.passes.InlineAnnotation
 import firrtl.transforms.FlattenAnnotation
 import firrtl.analyses.InstanceGraph
 import firrtl.{ir => fir}
-import org.scalatest.{FreeSpec, Matchers}
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
-class InlineSpec extends FreeSpec with ChiselRunners with Matchers {
+class InlineSpec extends AnyFreeSpec with ChiselRunners with Matchers {
 
   trait Internals { this: Module =>
     val io = IO(new Bundle{ val a = Input(Bool()) })
diff --git a/src/test/scala/chiselTests/IntervalRangeSpec.scala b/src/test/scala/chiselTests/IntervalRangeSpec.scala
index f1daa228..3aaedb1d 100644
--- a/src/test/scala/chiselTests/IntervalRangeSpec.scala
+++ b/src/test/scala/chiselTests/IntervalRangeSpec.scala
@@ -6,10 +6,11 @@ import chisel3._
 import chisel3.experimental._
 import _root_.firrtl.{ir => firrtlir}
 import chisel3.internal.firrtl.{BinaryPoint, IntervalRange, KnownBinaryPoint, UnknownBinaryPoint}
-import org.scalatest.{FreeSpec, Matchers}
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 //scalastyle:off method.name magic.number
-class IntervalRangeSpec extends FreeSpec with Matchers {
+class IntervalRangeSpec extends AnyFreeSpec with Matchers {
 
   "IntervalRanges" - {
     def C(b: BigDecimal): firrtlir.Bound = firrtlir.Closed(b)
diff --git a/src/test/scala/chiselTests/IntervalSpec.scala b/src/test/scala/chiselTests/IntervalSpec.scala
index ee704c83..d7b77e09 100644
--- a/src/test/scala/chiselTests/IntervalSpec.scala
+++ b/src/test/scala/chiselTests/IntervalSpec.scala
@@ -16,7 +16,8 @@ import firrtl.passes.CheckWidths.{DisjointSqueeze, InvalidRange}
 import firrtl.passes.{PassExceptions, WrapWithRemainder}
 import firrtl.stage.{CompilerAnnotation, FirrtlCircuitAnnotation}
 import firrtl.{FIRRTLException, HighFirrtlCompiler, LowFirrtlCompiler, MiddleFirrtlCompiler, MinimumVerilogCompiler, NoneCompiler, SystemVerilogCompiler, VerilogCompiler}
-import org.scalatest.{FreeSpec, Matchers}
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 //scalastyle:off magic.number
 //noinspection TypeAnnotation
@@ -423,7 +424,7 @@ class IntervalChainedSubTester extends BasicTester {
 }
 
 //TODO: need tests for dynamic shifts on intervals
-class IntervalSpec extends FreeSpec with Matchers with ChiselRunners {
+class IntervalSpec extends AnyFreeSpec with Matchers with ChiselRunners {
 
   type TempFirrtlException = Exception
 
diff --git a/src/test/scala/chiselTests/InvalidateAPISpec.scala b/src/test/scala/chiselTests/InvalidateAPISpec.scala
index a285b4c8..574fc88b 100644
--- a/src/test/scala/chiselTests/InvalidateAPISpec.scala
+++ b/src/test/scala/chiselTests/InvalidateAPISpec.scala
@@ -7,6 +7,7 @@ import chisel3.util.Counter
 import firrtl.passes.CheckInitialization.RefNotInitializedException
 import firrtl.util.BackendCompilationUtilities
 import org.scalatest._
+import org.scalatest.matchers.should.Matchers
 
 class InvalidateAPISpec extends ChiselPropSpec with Matchers with BackendCompilationUtilities {
 
diff --git a/src/test/scala/chiselTests/LoadMemoryFromFileSpec.scala b/src/test/scala/chiselTests/LoadMemoryFromFileSpec.scala
index 330cdd3e..9835ba10 100644
--- a/src/test/scala/chiselTests/LoadMemoryFromFileSpec.scala
+++ b/src/test/scala/chiselTests/LoadMemoryFromFileSpec.scala
@@ -9,7 +9,8 @@ import chisel3.util.experimental.loadMemoryFromFile
 import chisel3.util.log2Ceil
 import firrtl.FirrtlExecutionSuccess
 import firrtl.annotations.MemoryLoadFileType
-import org.scalatest.{FreeSpec, Matchers}
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 class UsesThreeMems(memoryDepth: Int, memoryType: Data) extends Module {
   val io = IO(new Bundle {
@@ -110,7 +111,7 @@ class HasComplexMemory(memoryDepth: Int) extends Module {
   * For more complete working examples
   * @see <a href="https://github.com/freechipsproject/chisel-testers">Chisel Testers</a> LoadMemoryFromFileSpec.scala
   */
-class LoadMemoryFromFileSpec extends FreeSpec with Matchers {
+class LoadMemoryFromFileSpec extends AnyFreeSpec with Matchers {
   def fileExistsWithMem(file: File, mem: Option[String] = None): Unit = {
     info(s"$file exists")
     file.exists() should be (true)
diff --git a/src/test/scala/chiselTests/MissingCloneBindingExceptionSpec.scala b/src/test/scala/chiselTests/MissingCloneBindingExceptionSpec.scala
index c2c69bbf..50dbb341 100644
--- a/src/test/scala/chiselTests/MissingCloneBindingExceptionSpec.scala
+++ b/src/test/scala/chiselTests/MissingCloneBindingExceptionSpec.scala
@@ -3,6 +3,7 @@
 package chiselTests
 import Chisel.ChiselException
 import org.scalatest._
+import org.scalatest.matchers.should.Matchers
 
 class MissingCloneBindingExceptionSpec extends ChiselFlatSpec with Matchers {
   behavior of "missing cloneType in Chisel3"
diff --git a/src/test/scala/chiselTests/OneHotMuxSpec.scala b/src/test/scala/chiselTests/OneHotMuxSpec.scala
index e6c9add4..78ae5a66 100644
--- a/src/test/scala/chiselTests/OneHotMuxSpec.scala
+++ b/src/test/scala/chiselTests/OneHotMuxSpec.scala
@@ -8,10 +8,12 @@ import chisel3.internal.ChiselException
 import chisel3.testers.BasicTester
 import chisel3.util.{Mux1H, UIntToOH}
 import org.scalatest._
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 //scalastyle:off magic.number
 
-class OneHotMuxSpec extends FreeSpec with Matchers with ChiselRunners {
+class OneHotMuxSpec extends AnyFreeSpec with Matchers with ChiselRunners {
   "simple one hot mux with uint should work" in {
     assertTesterPasses(new SimpleOneHotTester)
   }
diff --git a/src/test/scala/chiselTests/PrintableSpec.scala b/src/test/scala/chiselTests/PrintableSpec.scala
index 4ecc073e..3fa77072 100644
--- a/src/test/scala/chiselTests/PrintableSpec.scala
+++ b/src/test/scala/chiselTests/PrintableSpec.scala
@@ -2,12 +2,13 @@
 
 package chiselTests
 
-import org.scalatest.{FlatSpec, Matchers}
 import chisel3._
 import chisel3.testers.BasicTester
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
 /* Printable Tests */
-class PrintableSpec extends FlatSpec with Matchers {
+class PrintableSpec extends AnyFlatSpec with Matchers {
   // This regex is brittle, it specifically finds the clock and enable signals followed by commas
   private val PrintfRegex = """\s*printf\(\w+, [^,]+,(.*)\).*""".r
   private val StringRegex = """([^"]*)"(.*?)"(.*)""".r
diff --git a/src/test/scala/chiselTests/RangeSpec.scala b/src/test/scala/chiselTests/RangeSpec.scala
index e85a477d..84a6e16a 100644
--- a/src/test/scala/chiselTests/RangeSpec.scala
+++ b/src/test/scala/chiselTests/RangeSpec.scala
@@ -6,7 +6,8 @@ import chisel3._
 import chisel3.experimental.ChiselRange
 import chisel3.internal.firrtl._
 import firrtl.ir.{Closed, Open}
-import org.scalatest.{FreeSpec, Matchers}
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
-class RangeSpec extends FreeSpec with Matchers {
+class RangeSpec extends AnyFreeSpec with Matchers {
 }
diff --git a/src/test/scala/chiselTests/ScalaIntervalSimulatorTest.scala b/src/test/scala/chiselTests/ScalaIntervalSimulatorTest.scala
index 0bf8741e..e138ed3a 100644
--- a/src/test/scala/chiselTests/ScalaIntervalSimulatorTest.scala
+++ b/src/test/scala/chiselTests/ScalaIntervalSimulatorTest.scala
@@ -4,9 +4,10 @@ package chiselTests
 
 import chisel3._
 import chisel3.experimental._
-import org.scalatest.{FreeSpec, Matchers}
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
-class ScalaIntervalSimulatorSpec extends FreeSpec with Matchers {
+class ScalaIntervalSimulatorSpec extends AnyFreeSpec with Matchers {
   "clip tests" - {
     "Should work for closed ranges" in {
       val sim = ScalaIntervalSimulator(range"[2,4]")
diff --git a/src/test/scala/chiselTests/StrongEnum.scala b/src/test/scala/chiselTests/StrongEnum.scala
index 40fcfbed..0ebabe16 100644
--- a/src/test/scala/chiselTests/StrongEnum.scala
+++ b/src/test/scala/chiselTests/StrongEnum.scala
@@ -8,7 +8,9 @@ import chisel3.internal.firrtl.UnknownWidth
 import chisel3.internal.naming.chiselName
 import chisel3.util._
 import chisel3.testers.BasicTester
-import org.scalatest.{Assertion, FreeSpec, Matchers}
+import org.scalatest.Assertion
+import org.scalatest.freespec.AnyFreeSpec
+import org.scalatest.matchers.should.Matchers
 
 object EnumExample extends ChiselEnum {
   val e0, e1, e2 = Value
@@ -495,7 +497,7 @@ class StrongEnumAnnotatorWithChiselName extends Module {
   val indexed2 = vec_of_bundles(cycle)
 }
 
-class StrongEnumAnnotationSpec extends FreeSpec with Matchers {
+class StrongEnumAnnotationSpec extends AnyFreeSpec with Matchers {
   import chisel3.experimental.EnumAnnotations._
   import firrtl.annotations.{ComponentName, Annotation}
 
diff --git a/src/test/scala/chiselTests/TransitNameSpec.scala b/src/test/scala/chiselTests/TransitNameSpec.scala
index 7c5f0578..b729f244 100644
--- a/src/test/scala/chiselTests/TransitNameSpec.scala
+++ b/src/test/scala/chiselTests/TransitNameSpec.scala
@@ -1,14 +1,15 @@
 // See LICENSE for license details.
 package chiselTests
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import chisel3._
 import chisel3.util.TransitName
 
 import firrtl.FirrtlExecutionSuccess
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
-class TransitNameSpec extends FlatSpec with Matchers {
+class TransitNameSpec extends AnyFlatSpec with Matchers {
 
   class MyModule extends RawModule {
     val io = IO(new Bundle{})
diff --git a/src/test/scala/chiselTests/UIntOps.scala b/src/test/scala/chiselTests/UIntOps.scala
index e5ab706f..0c7e2dcd 100644
--- a/src/test/scala/chiselTests/UIntOps.scala
+++ b/src/test/scala/chiselTests/UIntOps.scala
@@ -6,6 +6,7 @@ import chisel3._
 import org.scalatest._
 import chisel3.testers.BasicTester
 import org.scalacheck.Shrink
+import org.scalatest.matchers.should.Matchers
 
 class UIntOps extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/stage/ChiselAnnotationsSpec.scala b/src/test/scala/chiselTests/stage/ChiselAnnotationsSpec.scala
index dd0dd09a..16d56db6 100644
--- a/src/test/scala/chiselTests/stage/ChiselAnnotationsSpec.scala
+++ b/src/test/scala/chiselTests/stage/ChiselAnnotationsSpec.scala
@@ -2,10 +2,11 @@
 
 package chiselTests.stage
 
-import org.scalatest.{FlatSpec, Matchers}
 import chisel3._
 import chisel3.stage.{ChiselCircuitAnnotation, ChiselGeneratorAnnotation, DesignAnnotation}
 import firrtl.options.OptionsException
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
 class ChiselAnnotationsSpecFoo extends RawModule {
   val in = IO(Input(Bool()))
@@ -24,7 +25,7 @@ class ChiselAnnotationsSpecQux extends ChiselAnnotationsSpecFoo {
 
 class ChiselAnnotation
 
-class ChiselAnnotationsSpec extends FlatSpec with Matchers {
+class ChiselAnnotationsSpec extends AnyFlatSpec with Matchers {
 
   behavior of "ChiselGeneratorAnnotation elaboration"
 
diff --git a/src/test/scala/chiselTests/stage/ChiselMainSpec.scala b/src/test/scala/chiselTests/stage/ChiselMainSpec.scala
index f5b47982..e2c3dccc 100644
--- a/src/test/scala/chiselTests/stage/ChiselMainSpec.scala
+++ b/src/test/scala/chiselTests/stage/ChiselMainSpec.scala
@@ -7,7 +7,9 @@ import chisel3.stage.ChiselMain
 import java.io.File
 
 import chisel3.aop.inspecting.{InspectingAspect, InspectorAspect}
-import org.scalatest.{FeatureSpec, GivenWhenThen, Matchers}
+import org.scalatest.GivenWhenThen
+import org.scalatest.featurespec.AnyFeatureSpec
+import org.scalatest.matchers.should.Matchers
 
 object ChiselMainSpec {
 
@@ -40,7 +42,7 @@ case object TestObjectAspect extends InspectorAspect[RawModule] ({
   _: RawModule => println("Ran inspectingAspect")
 })
 
-class ChiselMainSpec extends FeatureSpec with GivenWhenThen with Matchers with chiselTests.Utils {
+class ChiselMainSpec extends AnyFeatureSpec with GivenWhenThen with Matchers with chiselTests.Utils {
 
   import ChiselMainSpec._
 
diff --git a/src/test/scala/chiselTests/stage/ChiselOptionsViewSpec.scala b/src/test/scala/chiselTests/stage/ChiselOptionsViewSpec.scala
index 7dbeb9fa..5ea9a39c 100644
--- a/src/test/scala/chiselTests/stage/ChiselOptionsViewSpec.scala
+++ b/src/test/scala/chiselTests/stage/ChiselOptionsViewSpec.scala
@@ -2,14 +2,15 @@
 
 package chiselTests.stage
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import firrtl.options.Viewer.view
 
 import chisel3.stage._
 import chisel3.internal.firrtl.Circuit
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
-class ChiselOptionsViewSpec extends FlatSpec with Matchers {
+class ChiselOptionsViewSpec extends AnyFlatSpec with Matchers {
 
   behavior of ChiselOptionsView.getClass.getName
 
diff --git a/src/test/scala/chiselTests/stage/phases/AddImplicitOutputAnnotationFileSpec.scala b/src/test/scala/chiselTests/stage/phases/AddImplicitOutputAnnotationFileSpec.scala
index 734f571a..178158bf 100644
--- a/src/test/scala/chiselTests/stage/phases/AddImplicitOutputAnnotationFileSpec.scala
+++ b/src/test/scala/chiselTests/stage/phases/AddImplicitOutputAnnotationFileSpec.scala
@@ -2,7 +2,6 @@
 
 package chiselTests.stage.phases
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import chisel3.RawModule
 import chisel3.stage.ChiselGeneratorAnnotation
@@ -10,8 +9,10 @@ import chisel3.stage.phases.{AddImplicitOutputAnnotationFile, Elaborate}
 
 import firrtl.AnnotationSeq
 import firrtl.options.{OutputAnnotationFileAnnotation, Phase}
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
-class AddImplicitOutputAnnotationFileSpec extends FlatSpec with Matchers {
+class AddImplicitOutputAnnotationFileSpec extends AnyFlatSpec with Matchers {
 
   class Foo extends RawModule { override val desiredName = "Foo" }
 
diff --git a/src/test/scala/chiselTests/stage/phases/AddImplicitOutputFileSpec.scala b/src/test/scala/chiselTests/stage/phases/AddImplicitOutputFileSpec.scala
index 1a667365..277147bd 100644
--- a/src/test/scala/chiselTests/stage/phases/AddImplicitOutputFileSpec.scala
+++ b/src/test/scala/chiselTests/stage/phases/AddImplicitOutputFileSpec.scala
@@ -2,7 +2,6 @@
 
 package chiselTests.stage.phases
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import chisel3.RawModule
 import chisel3.stage.{ChiselGeneratorAnnotation, ChiselOutputFileAnnotation}
@@ -11,8 +10,10 @@ import chisel3.stage.phases.{AddImplicitOutputFile, Elaborate}
 import firrtl.AnnotationSeq
 import firrtl.options.{Phase, StageOptions, TargetDirAnnotation}
 import firrtl.options.Viewer.view
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
-class AddImplicitOutputFileSpec extends FlatSpec with Matchers {
+class AddImplicitOutputFileSpec extends AnyFlatSpec with Matchers {
 
   class Foo extends RawModule { override val desiredName = "Foo" }
 
diff --git a/src/test/scala/chiselTests/stage/phases/ChecksSpec.scala b/src/test/scala/chiselTests/stage/phases/ChecksSpec.scala
index 6d01e38e..31c651b9 100644
--- a/src/test/scala/chiselTests/stage/phases/ChecksSpec.scala
+++ b/src/test/scala/chiselTests/stage/phases/ChecksSpec.scala
@@ -2,7 +2,6 @@
 
 package chiselTests.stage.phases
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import chisel3.stage.{ChiselOutputFileAnnotation, NoRunFirrtlCompilerAnnotation, PrintFullStackTraceAnnotation}
 import chisel3.stage.phases.Checks
@@ -10,8 +9,10 @@ import chisel3.stage.phases.Checks
 import firrtl.AnnotationSeq
 import firrtl.annotations.NoTargetAnnotation
 import firrtl.options.{OptionsException, Phase}
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
-class ChecksSpec extends FlatSpec with Matchers {
+class ChecksSpec extends AnyFlatSpec with Matchers {
 
   def checkExceptionMessage(phase: Phase, annotations: AnnotationSeq, messageStart: String): Unit =
     intercept[OptionsException]{ phase.transform(annotations) }.getMessage should startWith(messageStart)
diff --git a/src/test/scala/chiselTests/stage/phases/ConvertSpec.scala b/src/test/scala/chiselTests/stage/phases/ConvertSpec.scala
index 1eefcdb6..d7fbada4 100644
--- a/src/test/scala/chiselTests/stage/phases/ConvertSpec.scala
+++ b/src/test/scala/chiselTests/stage/phases/ConvertSpec.scala
@@ -2,7 +2,6 @@
 
 package chiselTests.stage.phases
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import chisel3._
 import chisel3.experimental.{ChiselAnnotation, RunFirrtlTransform}
@@ -13,6 +12,8 @@ import firrtl.{AnnotationSeq, CircuitForm, CircuitState, Transform, UnknownForm}
 import firrtl.annotations.{Annotation, NoTargetAnnotation}
 import firrtl.options.Phase
 import firrtl.stage.{FirrtlCircuitAnnotation, RunFirrtlTransformAnnotation}
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
 class ConvertSpecFirrtlTransform extends Transform {
   def inputForm: CircuitForm = UnknownForm
@@ -36,7 +37,7 @@ class ConvertSpecFoo extends RawModule {
   experimental.annotate(ConvertSpecChiselAnnotation("bar"))
 }
 
-class ConvertSpec extends FlatSpec with Matchers {
+class ConvertSpec extends AnyFlatSpec with Matchers {
 
   class Fixture { val phase: Phase = new Convert }
 
diff --git a/src/test/scala/chiselTests/stage/phases/ElaborateSpec.scala b/src/test/scala/chiselTests/stage/phases/ElaborateSpec.scala
index 4d99b24c..b84d40f1 100644
--- a/src/test/scala/chiselTests/stage/phases/ElaborateSpec.scala
+++ b/src/test/scala/chiselTests/stage/phases/ElaborateSpec.scala
@@ -2,15 +2,16 @@
 
 package chiselTests.stage.phases
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import chisel3._
 import chisel3.stage.{ChiselCircuitAnnotation, ChiselGeneratorAnnotation}
 import chisel3.stage.phases.Elaborate
 
 import firrtl.options.Phase
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
-class ElaborateSpec extends FlatSpec with Matchers {
+class ElaborateSpec extends AnyFlatSpec with Matchers {
 
   class Foo extends Module {
     override def desiredName: String = "Foo"
diff --git a/src/test/scala/chiselTests/stage/phases/EmitterSpec.scala b/src/test/scala/chiselTests/stage/phases/EmitterSpec.scala
index a421e9cc..416ca9cb 100644
--- a/src/test/scala/chiselTests/stage/phases/EmitterSpec.scala
+++ b/src/test/scala/chiselTests/stage/phases/EmitterSpec.scala
@@ -2,7 +2,6 @@
 
 package chiselTests.stage.phases
 
-import org.scalatest.{FlatSpec, Matchers}
 
 import chisel3.RawModule
 import chisel3.stage.{ChiselCircuitAnnotation, ChiselGeneratorAnnotation, ChiselOutputFileAnnotation}
@@ -13,8 +12,10 @@ import firrtl.annotations.DeletedAnnotation
 import firrtl.options.{Phase, TargetDirAnnotation}
 
 import java.io.File
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
 
-class EmitterSpec extends FlatSpec with Matchers {
+class EmitterSpec extends AnyFlatSpec with Matchers {
 
   class FooModule extends RawModule { override val desiredName = "Foo" }
   class BarModule extends RawModule { override val desiredName = "Bar" }