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-rw-r--r--src/test/scala/chiselTests/PrintableSpec.scala5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/test/scala/chiselTests/PrintableSpec.scala b/src/test/scala/chiselTests/PrintableSpec.scala
index 4ecc073e..3fa77072 100644
--- a/src/test/scala/chiselTests/PrintableSpec.scala
+++ b/src/test/scala/chiselTests/PrintableSpec.scala
@@ -2,12 +2,13 @@
package chiselTests
-import org.scalatest.{FlatSpec, Matchers}
import chisel3._
import chisel3.testers.BasicTester
+import org.scalatest.flatspec.AnyFlatSpec
+import org.scalatest.matchers.should.Matchers
/* Printable Tests */
-class PrintableSpec extends FlatSpec with Matchers {
+class PrintableSpec extends AnyFlatSpec with Matchers {
// This regex is brittle, it specifically finds the clock and enable signals followed by commas
private val PrintfRegex = """\s*printf\(\w+, [^,]+,(.*)\).*""".r
private val StringRegex = """([^"]*)"(.*?)"(.*)""".r