diff options
| author | Richard Lin | 2019-01-21 21:31:06 -0800 |
|---|---|---|
| committer | GitHub | 2019-01-21 21:31:06 -0800 |
| commit | 99bb15f13491637f1c7ce58edb5ba494efc810dc (patch) | |
| tree | b257572551776759c29876fff68aa9f079498eb1 /src | |
| parent | 9e992816e570284193e121cd9c24503fd8cb4427 (diff) | |
Support DontCare in Mux and cloneSupertype (#995)
Diffstat (limited to 'src')
| -rw-r--r-- | src/test/scala/chiselTests/MuxSpec.scala | 25 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/Vec.scala | 9 |
2 files changed, 34 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/MuxSpec.scala b/src/test/scala/chiselTests/MuxSpec.scala new file mode 100644 index 00000000..d06c00af --- /dev/null +++ b/src/test/scala/chiselTests/MuxSpec.scala @@ -0,0 +1,25 @@ +package chiselTests + +import chisel3._ +import chisel3.testers.BasicTester + +class MuxTester extends BasicTester { + assert(Mux(0.B, 1.U, 2.U) === 2.U) + assert(Mux(1.B, 1.U, 2.U) === 1.U) + val dontCareMux1 = Wire(UInt()) + dontCareMux1 := Mux(0.B, DontCare, 4.U) // note: Mux output of type Element + assert(dontCareMux1 === 4.U) + + val dontCareMux2 = Wire(UInt()) + dontCareMux2 := Mux(1.B, 3.U, DontCare) // note: Mux output of type Element + assert(dontCareMux2 === 3.U) + + Mux(0.B, 3.U, DontCare) // just to make sure nothing crashes, any result is valid + stop() +} + +class MuxSpec extends ChiselFlatSpec { + "Mux" should "pass basic checks" in { + assertTesterPasses { new MuxTester } + } +}
\ No newline at end of file diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala index 395624f7..d8e3be10 100644 --- a/src/test/scala/chiselTests/Vec.scala +++ b/src/test/scala/chiselTests/Vec.scala @@ -265,4 +265,13 @@ class VecSpec extends ChiselPropSpec { }) } } + + property("It should be possible to initialize a Vec with DontCare") { + elaborate(new Module { + val io = IO(new Bundle { + val out = Output(Vec(4, UInt(8.W))) + }) + io.out := VecInit(Seq(4.U, 5.U, DontCare, 2.U)) + }) + } } |
