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authorAndrew Waterman2017-02-24 00:33:42 -0800
committerJack Koenig2017-03-08 11:27:04 -0600
commit5f846792824cdb467691d929d64de117bb3cffcb (patch)
treeeb4abdb7c3079ab6188300d081bea17a8e9c83c7 /src
parent94c507b1dab33b7b5f4ca864d6b97cbd1682fc7f (diff)
Avoid log2Up in tests
Diffstat (limited to 'src')
-rw-r--r--src/test/scala/chiselTests/BlackBox.scala4
-rw-r--r--src/test/scala/chiselTests/Stack.scala2
-rw-r--r--src/test/scala/chiselTests/Tbl.scala4
-rw-r--r--src/test/scala/examples/VendingMachineGenerator.scala2
4 files changed, 6 insertions, 6 deletions
diff --git a/src/test/scala/chiselTests/BlackBox.scala b/src/test/scala/chiselTests/BlackBox.scala
index 21153962..164c7b6f 100644
--- a/src/test/scala/chiselTests/BlackBox.scala
+++ b/src/test/scala/chiselTests/BlackBox.scala
@@ -86,10 +86,10 @@ class BlackBoxWithClockTester extends BasicTester {
}
class BlackBoxConstant(value: Int) extends BlackBox(
- Map("VALUE" -> value, "WIDTH" -> log2Up(value + 1))) {
+ Map("VALUE" -> value, "WIDTH" -> log2Ceil(value + 1))) {
require(value >= 0, "value must be a UInt!")
val io = IO(new Bundle {
- val out = UInt(log2Up(value + 1).W).asOutput
+ val out = UInt(log2Ceil(value + 1).W).asOutput
})
}
diff --git a/src/test/scala/chiselTests/Stack.scala b/src/test/scala/chiselTests/Stack.scala
index 58a05937..df1e68bf 100644
--- a/src/test/scala/chiselTests/Stack.scala
+++ b/src/test/scala/chiselTests/Stack.scala
@@ -17,7 +17,7 @@ class ChiselStack(val depth: Int) extends Module {
})
val stack_mem = Mem(depth, UInt(32.W))
- val sp = Reg(init = 0.U(log2Up(depth+1).W))
+ val sp = Reg(init = 0.U(log2Ceil(depth+1).W))
val out = Reg(init = 0.U(32.W))
when (io.en) {
diff --git a/src/test/scala/chiselTests/Tbl.scala b/src/test/scala/chiselTests/Tbl.scala
index 03b08709..b938361f 100644
--- a/src/test/scala/chiselTests/Tbl.scala
+++ b/src/test/scala/chiselTests/Tbl.scala
@@ -11,8 +11,8 @@ import chisel3.util._
class Tbl(w: Int, n: Int) extends Module {
val io = IO(new Bundle {
- val wi = Input(UInt(log2Up(n).W))
- val ri = Input(UInt(log2Up(n).W))
+ val wi = Input(UInt(log2Ceil(n).W))
+ val ri = Input(UInt(log2Ceil(n).W))
val we = Input(Bool())
val d = Input(UInt(w.W))
val o = Output(UInt(w.W))
diff --git a/src/test/scala/examples/VendingMachineGenerator.scala b/src/test/scala/examples/VendingMachineGenerator.scala
index fc44a47e..ab5e53d1 100644
--- a/src/test/scala/examples/VendingMachineGenerator.scala
+++ b/src/test/scala/examples/VendingMachineGenerator.scala
@@ -52,7 +52,7 @@ class VendingMachineGenerator(
val maxCoin = io.coins.last.value
val maxValue = (sodaCost + maxCoin - minCoin) / minCoin // normalize to minimum value
- val width = log2Up(maxValue + 1).W
+ val width = log2Ceil(maxValue + 1).W
val value = Reg(init = 0.asUInt(width))
val incValue = Wire(init = 0.asUInt(width))
val doDispense = value >= (sodaCost / minCoin).U