fix a bug in setModName

1 files changed, 1 insertions, 1 deletions

diff --git a/src/main/scala/chisel3/internal/firrtl/Emitter.scala b/src/main/scala/chisel3/internal/firrtl/Emitter.scala
index 79f86ae9..8b94c68f 100644
--- a/src/main/scala/chisel3/internal/firrtl/Emitter.scala
+++ b/src/main/scala/chisel3/internal/firrtl/Emitter.scala
@@ -87,7 +87,7 @@ private class Emitter(circuit: Circuit) {
         ""
       case None =>
         defnMap((m.id.desiredName, defn)) = m
-        m.id setModName m.id.name
+        m.id setModName m.name
         moduleDecl(m) + defn
     }
   }