Final steps for annotations getting from chisel to firrtl (#405)

Pass transforms along with Annotations when calling firrtl compiler
This introduces new requirement that firrtl.Transform subclasses (that are associated with an annotation) do not have parameters in their default constructor
Add new test for NoDedup annotation that shows how to annotate a module instance

3 files changed, 87 insertions, 2 deletions

diff --git a/src/main/scala/chisel3/Driver.scala b/src/main/scala/chisel3/Driver.scala
index 646702c3..40c94b54 100644
--- a/src/main/scala/chisel3/Driver.scala
+++ b/src/main/scala/chisel3/Driver.scala
@@ -247,9 +247,17 @@ object Driver extends BackendCompilationUtilities {
     af.write(circuit.annotations.toArray.toYaml.prettyPrint)
     af.close()
 
+    /* create custom transforms by finding the set of transform classes associated with annotations
+     * then instantiate them into actual transforms
+     */
+    val transforms = circuit.annotations.map(_.transform).toSet.map { transformClass: Class[_ <: Transform] =>
+      transformClass.newInstance()
+    }
     /* This passes the firrtl source and annotations directly to firrtl */
     optionsManager.firrtlOptions = optionsManager.firrtlOptions.copy(
-      firrtlSource = Some(firrtlString), annotations = circuit.annotations.toList)
+      firrtlSource = Some(firrtlString),
+      annotations = circuit.annotations.toList,
+      customTransforms = transforms.toList)
 
     val firrtlExecutionResult = if(chiselOptions.runFirrtlCompiler) {
       Some(firrtl.Driver.execute(optionsManager))
diff --git a/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala b/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
index 3886ddd6..ff9f8e67 100644
--- a/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
+++ b/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
@@ -32,7 +32,6 @@ class IdentityTransform extends Transform {
     getMyAnnotations(state) match {
       case Nil => state
       case myAnnotations =>
-        /* Do something useful with annotations here */
         state
     }
   }
diff --git a/src/test/scala/chiselTests/AnnotationNoDedup.scala b/src/test/scala/chiselTests/AnnotationNoDedup.scala
new file mode 100644
index 00000000..024b5a7a
--- /dev/null
+++ b/src/test/scala/chiselTests/AnnotationNoDedup.scala
@@ -0,0 +1,78 @@
+// See LICENSE for license details.
+
+package chiselTests
+
+import chisel3._
+import firrtl.FirrtlExecutionSuccess
+import firrtl.transforms.DedupModules
+import org.scalatest.{FreeSpec, Matchers}
+
+trait NoDedupAnnotator {
+  self: Module =>
+
+  def doNotDedup(module: Module): Unit = {
+    annotate(ChiselAnnotation(module, classOf[DedupModules], "nodedup!"))
+  }
+}
+
+class MuchUsedModule extends Module {
+  val io = IO(new Bundle {
+    val in = Input(UInt(16.W))
+    val out = Output(UInt(16.W))
+  })
+  io.out := io.in +% 1.U
+}
+
+class UsesMuchUsedModule(addAnnos: Boolean) extends Module with NoDedupAnnotator{
+  val io = IO(new Bundle {
+    val in = Input(UInt(16.W))
+    val out = Output(UInt(16.W))
+  })
+
+  val mod0 = Module(new MuchUsedModule)
+  val mod1 = Module(new MuchUsedModule)
+  val mod2 = Module(new MuchUsedModule)
+  val mod3 = Module(new MuchUsedModule)
+
+  mod0.io.in := io.in
+  mod1.io.in := mod0.io.out
+  mod2.io.in := mod1.io.out
+  mod3.io.in := mod2.io.out
+  io.out := mod3.io.out
+
+  if(addAnnos) {
+    doNotDedup(mod1)
+    doNotDedup(mod3)
+  }
+}
+
+class AnnotationNoDedup extends FreeSpec with Matchers {
+  "Firrtl provides transform that reduces identical modules to a single instance" - {
+    "Annotations can be added which will defeat this deduplication for specific modules instances" in {
+      Driver.execute(Array("-X", "low"), () => new UsesMuchUsedModule(addAnnos = true)) match {
+        case ChiselExecutionSucccess(_, _, Some(firrtlResult: FirrtlExecutionSuccess)) =>
+          val lowFirrtl = firrtlResult.emitted
+
+          lowFirrtl should include ("module MuchUsedModule :")
+          lowFirrtl should include ("module MuchUsedModule_1 :")
+          lowFirrtl should include ("module MuchUsedModule_3 :")
+          lowFirrtl should not include "module MuchUsedModule_2 :"
+          lowFirrtl should not include "module MuchUsedModule_4 :"
+        case _ =>
+      }
+    }
+    "Turning off these nnotations dedup all the occurrences" in {
+      Driver.execute(Array("-X", "low"), () => new UsesMuchUsedModule(addAnnos = false)) match {
+        case ChiselExecutionSucccess(_, _, Some(firrtlResult: FirrtlExecutionSuccess)) =>
+          val lowFirrtl = firrtlResult.emitted
+
+          lowFirrtl should include ("module MuchUsedModule :")
+          lowFirrtl should not include "module MuchUsedModule_1 :"
+          lowFirrtl should not include "module MuchUsedModule_3 :"
+          lowFirrtl should not include "module MuchUsedModule_2 :"
+          lowFirrtl should not include "module MuchUsedModule_4 :"
+        case _ =>
+      }
+    }
+  }
+}