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authorAndrew Waterman2015-08-10 17:33:41 -0700
committerAndrew Waterman2015-08-10 17:33:41 -0700
commit39a66ea4eec9cc99da9dd332017a879cd21a405b (patch)
tree450cbcdcba9109ba423b1eb1e0a04593bb9a1f96 /src
parentec98099598bacc4baf7e6e19e17aed3e1eb95467 (diff)
Remove redundant cast
Diffstat (limited to 'src')
-rw-r--r--src/main/scala/Chisel/Core.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/Chisel/Core.scala b/src/main/scala/Chisel/Core.scala
index 76796374..65c52015 100644
--- a/src/main/scala/Chisel/Core.scala
+++ b/src/main/scala/Chisel/Core.scala
@@ -348,7 +348,7 @@ abstract class Data(dirArg: Direction) extends Id {
}
def toBits(): UInt = {
val elts = this.flatten.reverse
- Cat(elts.head, elts.tail:_*).asUInt
+ Cat(elts.head, elts.tail:_*)
}
def toPort: Port = Port(this, toType)