Delete outdated scalastyle configuration comments from source

20 files changed, 18 insertions, 41 deletions

diff --git a/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala b/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
index 70a62555..aa1ca7f5 100644
--- a/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
+++ b/src/test/scala/chiselTests/AnnotatingDiamondSpec.scala
@@ -31,7 +31,7 @@ case class IdentityChiselAnnotation(target: InstanceId, value: String)
   def toFirrtl: IdentityAnnotation = IdentityAnnotation(target.toNamed, value)
   def transformClass: Class[IdentityTransform] = classOf[IdentityTransform]
 }
-object identify { // scalastyle:ignore object.name
+object identify {
   def apply(component: InstanceId, value: String): Unit = {
     val anno = IdentityChiselAnnotation(component, value)
     annotate(anno)
diff --git a/src/test/scala/chiselTests/AnnotationNoDedup.scala b/src/test/scala/chiselTests/AnnotationNoDedup.scala
index ff0005b4..5515f740 100644
--- a/src/test/scala/chiselTests/AnnotationNoDedup.scala
+++ b/src/test/scala/chiselTests/AnnotationNoDedup.scala
@@ -43,7 +43,6 @@ class UsesMuchUsedModule(addAnnos: Boolean) extends Module {
 
 class AnnotationNoDedup extends AnyFreeSpec with Matchers {
   val stage = new ChiselStage
-  // scalastyle:off line.size.limit
   "Firrtl provides transform that reduces identical modules to a single instance" - {
     "Annotations can be added which will prevent this deduplication for specific modules instances" in {
       val lowFirrtl = stage
@@ -72,5 +71,4 @@ class AnnotationNoDedup extends AnyFreeSpec with Matchers {
       lowFirrtl should not include "module MuchUsedModule_4 :"
     }
   }
-  // scalastyle:on line.size.limit
 }
diff --git a/src/test/scala/chiselTests/BlackBoxImpl.scala b/src/test/scala/chiselTests/BlackBoxImpl.scala
index da89a326..b88db8f4 100644
--- a/src/test/scala/chiselTests/BlackBoxImpl.scala
+++ b/src/test/scala/chiselTests/BlackBoxImpl.scala
@@ -13,7 +13,6 @@ import org.scalatest.Succeeded
 import org.scalatest.freespec.AnyFreeSpec
 import org.scalatest.matchers.should.Matchers
 
-//scalastyle:off magic.number
 
 class BlackBoxAdd(n : Int) extends HasBlackBoxInline {
   val io = IO(new Bundle {
@@ -21,7 +20,6 @@ class BlackBoxAdd(n : Int) extends HasBlackBoxInline {
     val out = Output(UInt(16.W))
   })
 
-  //scalastyle:off regex
   setInline("BlackBoxAdd.v",
     s"""
       |module BlackBoxAdd(
diff --git a/src/test/scala/chiselTests/CompatibilitySpec.scala b/src/test/scala/chiselTests/CompatibilitySpec.scala
index 09ec40ee..183540af 100644
--- a/src/test/scala/chiselTests/CompatibilitySpec.scala
+++ b/src/test/scala/chiselTests/CompatibilitySpec.scala
@@ -60,7 +60,7 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck
     val value: Int = Gen.choose(2, 2048).sample.get
     log2Up(value) shouldBe (1 max BigInt(value - 1).bitLength)
     log2Ceil(value) shouldBe (BigInt(value - 1).bitLength)
-    log2Down(value) shouldBe ((1 max BigInt(value - 1).bitLength) - (if (value > 0 && ((value & (value - 1)) == 0)) 0 else 1)) // scalastyle:ignore line.size.limit
+    log2Down(value) shouldBe ((1 max BigInt(value - 1).bitLength) - (if (value > 0 && ((value & (value - 1)) == 0)) 0 else 1))
     log2Floor(value) shouldBe (BigInt(value - 1).bitLength - (if (value > 0 && ((value & (value - 1)) == 0)) 0 else 1))
     isPow2(BigInt(1) << value) shouldBe true
     isPow2((BigInt(1) << value) - 1) shouldBe false
@@ -201,7 +201,6 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck
     override def cloneType: this.type = (new BigBundle).asInstanceOf[this.type]
   }
 
-  // scalastyle:off line.size.limit
   "A Module with missing bundle fields when compiled with the Chisel compatibility package" should "not throw an exception" in {
 
     class ConnectFieldMismatchModule extends Module {
@@ -348,7 +347,6 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck
       Chisel.assert(io.bar.dir == INPUT)
     })
   }
-  // scalastyle:on line.size.limit
 
   behavior of "BitPat"
 
diff --git a/src/test/scala/chiselTests/CompileOptionsTest.scala b/src/test/scala/chiselTests/CompileOptionsTest.scala
index 1bd0327a..092e6f11 100644
--- a/src/test/scala/chiselTests/CompileOptionsTest.scala
+++ b/src/test/scala/chiselTests/CompileOptionsTest.scala
@@ -21,7 +21,6 @@ class CompileOptionsSpec extends ChiselFlatSpec with Utils {
     override def cloneType: this.type = (new BigBundle).asInstanceOf[this.type]
   }
 
-  // scalastyle:off line.size.limit
   "A Module with missing bundle fields when compiled with implicit Strict.CompileOption " should "throw an exception" in {
     a [ChiselException] should be thrownBy extractCause[ChiselException] {
       import chisel3.ExplicitCompileOptions.Strict
@@ -185,5 +184,4 @@ class CompileOptionsSpec extends ChiselFlatSpec with Utils {
     }
     ChiselStage.elaborate { new DirectionLessConnectionModule() }
   }
-  // scalastyle:on line.size.limit
 }
diff --git a/src/test/scala/chiselTests/EnableShiftRegister.scala b/src/test/scala/chiselTests/EnableShiftRegister.scala
index 5f023df8..fd3249fd 100644
--- a/src/test/scala/chiselTests/EnableShiftRegister.scala
+++ b/src/test/scala/chiselTests/EnableShiftRegister.scala
@@ -23,14 +23,13 @@ class EnableShiftRegister extends Module {
   io.out := r3
 }
 
-// scalastyle:off regex
 /*
 class EnableShiftRegisterTester(c: EnableShiftRegister) extends Tester(c) {
   val reg = Array.fill(4){ 0 }
   for (t <- 0 until 16) {
     val in    = rnd.nextInt(16)
     val shift = rnd.nextInt(2)
-    println("SHIFT " + shift + " IN " + in)   // scalastyle:ignore regex
+    println("SHIFT " + shift + " IN " + in)
     poke(c.io.in,    in)
     poke(c.io.shift, shift)
     step(1)
@@ -43,7 +42,6 @@ class EnableShiftRegisterTester(c: EnableShiftRegister) extends Tester(c) {
   }
 }
 */
-// scalastyle:on regex
 
 class EnableShiftRegisterSpec extends ChiselPropSpec {
 
diff --git a/src/test/scala/chiselTests/FixedPointSpec.scala b/src/test/scala/chiselTests/FixedPointSpec.scala
index c5aab7e4..35d7f786 100644
--- a/src/test/scala/chiselTests/FixedPointSpec.scala
+++ b/src/test/scala/chiselTests/FixedPointSpec.scala
@@ -11,7 +11,6 @@ import org.scalatest._
 import org.scalatest.flatspec.AnyFlatSpec
 import org.scalatest.matchers.should.Matchers
 
-//scalastyle:off magic.number
 class FixedPointLiteralSpec extends AnyFlatSpec with Matchers {
   behavior of "fixed point utilities"
 
diff --git a/src/test/scala/chiselTests/IntegerMathSpec.scala b/src/test/scala/chiselTests/IntegerMathSpec.scala
index e78a780c..945ea8c5 100644
--- a/src/test/scala/chiselTests/IntegerMathSpec.scala
+++ b/src/test/scala/chiselTests/IntegerMathSpec.scala
@@ -5,7 +5,6 @@ package chiselTests
 import chisel3._
 import chisel3.testers.BasicTester
 
-//scalastyle:off magic.number
 class IntegerMathTester extends BasicTester {
 
   //TODO: Add more operators
diff --git a/src/test/scala/chiselTests/IntervalRangeSpec.scala b/src/test/scala/chiselTests/IntervalRangeSpec.scala
index 3aaedb1d..a1f4ed02 100644
--- a/src/test/scala/chiselTests/IntervalRangeSpec.scala
+++ b/src/test/scala/chiselTests/IntervalRangeSpec.scala
@@ -9,7 +9,6 @@ import chisel3.internal.firrtl.{BinaryPoint, IntervalRange, KnownBinaryPoint, Un
 import org.scalatest.freespec.AnyFreeSpec
 import org.scalatest.matchers.should.Matchers
 
-//scalastyle:off method.name magic.number
 class IntervalRangeSpec extends AnyFreeSpec with Matchers {
 
   "IntervalRanges" - {
diff --git a/src/test/scala/chiselTests/IntervalSpec.scala b/src/test/scala/chiselTests/IntervalSpec.scala
index 1f813442..0babed41 100644
--- a/src/test/scala/chiselTests/IntervalSpec.scala
+++ b/src/test/scala/chiselTests/IntervalSpec.scala
@@ -19,7 +19,6 @@ import firrtl.{FIRRTLException, HighFirrtlCompiler, LowFirrtlCompiler, MiddleFir
 import org.scalatest.freespec.AnyFreeSpec
 import org.scalatest.matchers.should.Matchers
 
-//scalastyle:off magic.number
 //noinspection TypeAnnotation
 
 object IntervalTestHelper {
@@ -30,7 +29,6 @@ object IntervalTestHelper {
     * @param gen the generator for the module
     * @return the Verilog code as a string.
     */
-  //scalastyle:off cyclomatic.complexity
   def makeFirrtl[T <: RawModule](compilerName: String)(gen: () => T): String = {
     (new ChiselStage)
       .execute(Array("--compiler", compilerName,
diff --git a/src/test/scala/chiselTests/InvalidateAPISpec.scala b/src/test/scala/chiselTests/InvalidateAPISpec.scala
index f0841ef0..5890310e 100644
--- a/src/test/scala/chiselTests/InvalidateAPISpec.scala
+++ b/src/test/scala/chiselTests/InvalidateAPISpec.scala
@@ -24,7 +24,6 @@ class InvalidateAPISpec extends ChiselPropSpec with Matchers with BackendCompila
     val out = Output(Bool())
   }
 
-  // scalastyle:off line.size.limit
   property("an output connected to DontCare should emit a Firrtl \"is invalid\" with Strict CompileOptions") {
     import chisel3.ExplicitCompileOptions.Strict
     class ModuleWithDontCare extends Module {
@@ -215,5 +214,4 @@ class InvalidateAPISpec extends ChiselPropSpec with Matchers with BackendCompila
     val firrtlOutput = myGenerateFirrtl(new ModuleWithoutDontCare)
     firrtlOutput should include("is invalid")
   }
-  // scalastyle:on line.size.limit
 }
diff --git a/src/test/scala/chiselTests/LiteralExtractorSpec.scala b/src/test/scala/chiselTests/LiteralExtractorSpec.scala
index 0c485368..864f2d9f 100644
--- a/src/test/scala/chiselTests/LiteralExtractorSpec.scala
+++ b/src/test/scala/chiselTests/LiteralExtractorSpec.scala
@@ -110,7 +110,7 @@ class LiteralExtractorSpec extends ChiselFlatSpec {
 
       // the following errors with "assertion failed"
 
-      println(outsideLiteral === insideLiteral) // scalastyle:ignore regex
+      println(outsideLiteral === insideLiteral)
       // chisel3.assert(outsideLiteral === insideLiteral)
 
       // the following lines of code error
diff --git a/src/test/scala/chiselTests/Module.scala b/src/test/scala/chiselTests/Module.scala
index f4b51927..f91b6293 100644
--- a/src/test/scala/chiselTests/Module.scala
+++ b/src/test/scala/chiselTests/Module.scala
@@ -72,7 +72,7 @@ class ModuleWrapper(gen: => Module) extends Module {
 class NullModuleWrapper extends Module {
   val io = IO(new Bundle{})
   override lazy val desiredName = s"${child.desiredName}Wrapper"
-  println(s"My name is ${name}") // scalastyle:ignore regex
+  println(s"My name is ${name}")
   val child = Module(new ModuleWire)
 }
 
diff --git a/src/test/scala/chiselTests/NamingAnnotationTest.scala b/src/test/scala/chiselTests/NamingAnnotationTest.scala
index 41cba1de..e77d3d70 100644
--- a/src/test/scala/chiselTests/NamingAnnotationTest.scala
+++ b/src/test/scala/chiselTests/NamingAnnotationTest.scala
@@ -67,7 +67,7 @@ class NonModule {
 @chiselName
 class NamedModule extends NamedModuleTester {
   @chiselName
-  def FunctionMockupInner(): UInt = { // scalastyle:ignore method.name
+  def FunctionMockupInner(): UInt = {
     val my2A = 1.U
     val my2B = expectName(my2A +& 2.U, "test_myNested_my2B")
     val my2C = my2B +& 3.U  // should get named at enclosing scope
@@ -75,7 +75,7 @@ class NamedModule extends NamedModuleTester {
   }
 
   @chiselName
-  def FunctionMockup(): UInt = { // scalastyle:ignore method.name
+  def FunctionMockup(): UInt = {
     val myNested = expectName(FunctionMockupInner(), "test_myNested")
     val myA = expectName(1.U + myNested, "test_myA")
     val myB = expectName(myA +& 2.U, "test_myB")
@@ -89,14 +89,14 @@ class NamedModule extends NamedModuleTester {
   }
 
   // chiselName "implicitly" applied
-  def ImplicitlyNamed(): UInt = { // scalastyle:ignore method.name
+  def ImplicitlyNamed(): UInt = {
     val implicitA = expectName(1.U + 2.U, "test3_implicitA")
     val implicitB = expectName(implicitA + 3.U, "test3_implicitB")
     implicitB + 2.U  // named at enclosing scope
   }
 
   // Ensure this applies a partial name if there is no return value
-  def NoReturnFunction() { // scalastyle:ignore method.name
+  def NoReturnFunction() {
     val noreturn = expectName(1.U + 2.U, "noreturn")
   }
 
@@ -149,7 +149,7 @@ class NameCollisionModule extends NamedModuleTester {
   */
 class NonNamedModule extends NamedModuleTester {
   @chiselName
-  def NamedFunction(): UInt = { // scalastyle:ignore method.name
+  def NamedFunction(): UInt = {
     val myVal = 1.U + 2.U
     myVal
   }
@@ -162,18 +162,18 @@ class NonNamedModule extends NamedModuleTester {
   */
 object NonNamedHelper {
   @chiselName
-  def NamedFunction(): UInt = { // scalastyle:ignore method.name
+  def NamedFunction(): UInt = {
     val myVal = 1.U + 2.U
     myVal
   }
 
-  def NonNamedFunction() : UInt = { // scalastyle:ignore method.name
+  def NonNamedFunction() : UInt = {
     val myVal = NamedFunction()
     myVal
   }
 
   @chiselName
-  def NonBuilderFunction(): Int = { // scalastyle:ignore method.name
+  def NonBuilderFunction(): Int = {
     1 + 1
   }
 }
diff --git a/src/test/scala/chiselTests/OneHotMuxSpec.scala b/src/test/scala/chiselTests/OneHotMuxSpec.scala
index 78ae5a66..cc359e8e 100644
--- a/src/test/scala/chiselTests/OneHotMuxSpec.scala
+++ b/src/test/scala/chiselTests/OneHotMuxSpec.scala
@@ -11,7 +11,6 @@ import org.scalatest._
 import org.scalatest.freespec.AnyFreeSpec
 import org.scalatest.matchers.should.Matchers
 
-//scalastyle:off magic.number
 
 class OneHotMuxSpec extends AnyFreeSpec with Matchers with ChiselRunners {
   "simple one hot mux with uint should work" in {
diff --git a/src/test/scala/chiselTests/PrintableSpec.scala b/src/test/scala/chiselTests/PrintableSpec.scala
index 8e39d405..2ac2ad5d 100644
--- a/src/test/scala/chiselTests/PrintableSpec.scala
+++ b/src/test/scala/chiselTests/PrintableSpec.scala
@@ -128,7 +128,7 @@ class PrintableSpec extends AnyFlatSpec with Matchers {
       printf(p"${FullName(myInst.io.fizz)}")
     }
     val firrtl = (new ChiselStage).emitChirrtl(new MyModule)
-    println(firrtl) // scalastyle:ignore regex
+    println(firrtl)
     getPrintfs(firrtl) match {
       case Seq(Printf("foo", Seq()),
                Printf("myWire.foo", Seq()),
diff --git a/src/test/scala/chiselTests/Risc.scala b/src/test/scala/chiselTests/Risc.scala
index de39e723..765e1e56 100644
--- a/src/test/scala/chiselTests/Risc.scala
+++ b/src/test/scala/chiselTests/Risc.scala
@@ -55,7 +55,6 @@ class Risc extends Module {
   }
 }
 
-// scalastyle:off regex
 /*
 class RiscTester(c: Risc) extends Tester(c) {
   def wr(addr: BigInt, data: BigInt)  = {
@@ -77,7 +76,7 @@ class RiscTester(c: Risc) extends Tester(c) {
   def I (op: UInt, rc: Int, ra: Int, rb: Int) = {
     // val cr = Cat(op, rc.asUInt(8.W), ra.asUInt(8.W), rb.asUInt(8.W)).litValue()
     val cr = op.litValue() << 24 | rc << 16 | ra << 8 | rb
-    println("I = " + cr)    // scalastyle:ignore regex
+    println("I = " + cr)
     cr
   }
 
@@ -89,7 +88,7 @@ class RiscTester(c: Risc) extends Tester(c) {
   for (addr <- 0 until app.length)
     wr(addr, app(addr))
   def dump(k: Int) {
-    println("K = " + k)  // scalastyle:ignore regex
+    println("K = " + k)
     peek(c.ra)
     peek(c.rb)
     peek(c.rc)
@@ -113,7 +112,6 @@ class RiscTester(c: Risc) extends Tester(c) {
   expect(c.io.out, 4)
 }
 */
-// scalastyle:on regex
 
 class RiscSpec extends ChiselPropSpec {
 
diff --git a/src/test/scala/chiselTests/StrongEnum.scala b/src/test/scala/chiselTests/StrongEnum.scala
index f052e783..e71a0461 100644
--- a/src/test/scala/chiselTests/StrongEnum.scala
+++ b/src/test/scala/chiselTests/StrongEnum.scala
@@ -255,7 +255,7 @@ class StrongEnumFSMTester extends BasicTester {
 
   // Inputs and expected results
   val inputs: Vec[Bool] = VecInit(false.B, true.B, false.B, true.B, true.B, true.B, false.B, true.B, true.B, false.B)
-  val expected: Vec[Bool] = VecInit(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B) // scalastyle:ignore line.size.limit
+  val expected: Vec[Bool] = VecInit(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B)
   val expected_state = VecInit(sNone, sNone, sOne1, sNone, sOne1, sTwo1s, sTwo1s, sNone, sOne1, sTwo1s)
 
   val cntr = Counter(inputs.length)
@@ -538,7 +538,6 @@ class StrongEnumAnnotationSpec extends AnyFreeSpec with Matchers {
     CorrectVecAnno("bund.inner_bundle1.v", enumExampleName, Set())
   )
 
-  // scalastyle:off regex
   def printAnnos(annos: Seq[Annotation]) {
     println("Enum definitions:")
     annos.foreach {
@@ -556,7 +555,6 @@ class StrongEnumAnnotationSpec extends AnyFreeSpec with Matchers {
       case _ =>
     }
   }
-  // scalastyle:on regex
 
   def isCorrect(anno: EnumDefAnnotation, correct: CorrectDefAnno): Boolean = {
     (anno.typeName == correct.typeName ||
diff --git a/src/test/scala/chiselTests/util/random/LFSRSpec.scala b/src/test/scala/chiselTests/util/random/LFSRSpec.scala
index 90986637..4bd5b2ed 100644
--- a/src/test/scala/chiselTests/util/random/LFSRSpec.scala
+++ b/src/test/scala/chiselTests/util/random/LFSRSpec.scala
@@ -38,7 +38,6 @@ class LFSRMaxPeriod(gen: => UInt) extends BasicTester {
   * Each cycle it adds them together and adds a count to the bin corresponding to that value
   * The asserts check that the bins show the correct distribution.
   */
-//scalastyle:off magic.number
 class LFSRDistribution(gen: => UInt, cycles: Int = 10000) extends BasicTester {
 
   val rv = gen
diff --git a/src/test/scala/cookbook/FSM.scala b/src/test/scala/cookbook/FSM.scala
index f33bfee4..170d110f 100644
--- a/src/test/scala/cookbook/FSM.scala
+++ b/src/test/scala/cookbook/FSM.scala
@@ -53,7 +53,7 @@ class DetectTwoOnesTester extends CookbookTester(10) {
 
   // Inputs and expected results
   val inputs: Vec[Bool] = VecInit(false.B, true.B, false.B, true.B, true.B, true.B, false.B, true.B, true.B, false.B)
-  val expected: Vec[Bool] = VecInit(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B) // scalastyle:ignore line.size.limit
+  val expected: Vec[Bool] = VecInit(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B)
 
   dut.io.in := inputs(cycle)
   assert(dut.io.out === expected(cycle))