Merge branch 'master' into big-decimal-methods-for-num-types

# Conflicts:
#	src/test/scala/chiselTests/IntervalSpec.scala

3 files changed, 28 insertions, 4 deletions

diff --git a/src/test/scala/chiselTests/Decoder.scala b/src/test/scala/chiselTests/Decoder.scala
index 59ad6324..44cacccc 100644
--- a/src/test/scala/chiselTests/Decoder.scala
+++ b/src/test/scala/chiselTests/Decoder.scala
@@ -36,8 +36,18 @@ class DecoderSpec extends ChiselPropSpec {
   val bitpatPair = for(seed <- Arbitrary.arbitrary[Int]) yield {
     val rnd = new scala.util.Random(seed)
     val bs = seed.toBinaryString
-    val bp = bs.map(if(rnd.nextBoolean) _ else "?").mkString
-    ("b" + bs, "b" + bp)
+    val bp = bs.map(if(rnd.nextBoolean) _ else "?")
+
+    // The following randomly throws in white space and underscores which are legal and ignored.
+    val bpp = bp.map { a =>
+      if (rnd.nextBoolean) {
+        a
+      } else {
+        a + (if (rnd.nextBoolean) "_" else " ")
+      }
+    }.mkString
+
+    ("b" + bs, "b" + bpp)
   }
   private def nPairs(n: Int) = Gen.containerOfN[List, (String,String)](n,bitpatPair)
 
diff --git a/src/test/scala/chiselTests/IntervalSpec.scala b/src/test/scala/chiselTests/IntervalSpec.scala
index ae7fdabf..ee704c83 100644
--- a/src/test/scala/chiselTests/IntervalSpec.scala
+++ b/src/test/scala/chiselTests/IntervalSpec.scala
@@ -456,7 +456,7 @@ class IntervalSpec extends FreeSpec with Matchers with ChiselRunners {
           () =>
             new BasicTester {
               val x = 5.I(range"[0,4]")
-            }
+          }
         ).elaborate
       }
     }
diff --git a/src/test/scala/chiselTests/aop/SelectSpec.scala b/src/test/scala/chiselTests/aop/SelectSpec.scala
index f3c756ab..80ab518f 100644
--- a/src/test/scala/chiselTests/aop/SelectSpec.scala
+++ b/src/test/scala/chiselTests/aop/SelectSpec.scala
@@ -7,7 +7,9 @@ import chiselTests.ChiselFlatSpec
 import chisel3._
 import chisel3.aop.Select.{PredicatedConnect, When, WhenNot}
 import chisel3.aop.{Aspect, Select}
-import firrtl.{AnnotationSeq}
+import chisel3.experimental.ExtModule
+import chisel3.stage.{ChiselGeneratorAnnotation, DesignAnnotation}
+import firrtl.AnnotationSeq
 
 import scala.reflect.runtime.universe.TypeTag
 
@@ -139,5 +141,17 @@ class SelectSpec extends ChiselFlatSpec {
     )
   }
 
+  "Blackboxes" should "be supported in Select.instances" in {
+    class BB extends ExtModule { }
+    class Top extends RawModule {
+      val bb = Module(new BB)
+    }
+    val top = ChiselGeneratorAnnotation(() => {
+      new Top()
+    }).elaborate(1).asInstanceOf[DesignAnnotation[Top]].design
+    val bbs = Select.collectDeep(top) { case b: BB => b }
+    assert(bbs.size == 1)
+  }
+
 }