diff options
| author | Schuyler Eldridge | 2019-01-14 14:29:46 -0500 |
|---|---|---|
| committer | Schuyler Eldridge | 2019-05-22 16:17:17 -0400 |
| commit | 121e3d87598f2056b76846472970620d046c2487 (patch) | |
| tree | 7810b9719a024e90dd2eeab6e45d39928faf0263 /src/test | |
| parent | 0e6eb5b35a442edf70ad37f963526609f2ba1f3c (diff) | |
Add stage.phases.AddImplicitOutputAnnotationFile
Co-Authored-By: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Co-Authored-By: chick <chick@qrhino.com>
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/chiselTests/stage/phases/AddImplicitOutputAnnotationFileSpec.scala | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/stage/phases/AddImplicitOutputAnnotationFileSpec.scala b/src/test/scala/chiselTests/stage/phases/AddImplicitOutputAnnotationFileSpec.scala new file mode 100644 index 00000000..f5fe0440 --- /dev/null +++ b/src/test/scala/chiselTests/stage/phases/AddImplicitOutputAnnotationFileSpec.scala @@ -0,0 +1,42 @@ +// See LICENSE for license details. + +package chiselTests.stage.phases + +import org.scalatest.{FlatSpec, Matchers} + +import chisel3.experimental.RawModule +import chisel3.stage.ChiselGeneratorAnnotation +import chisel3.stage.phases.{AddImplicitOutputAnnotationFile, Elaborate} + +import firrtl.AnnotationSeq +import firrtl.options.{OutputAnnotationFileAnnotation, Phase} + +class AddImplicitOutputAnnotationFileSpec extends FlatSpec with Matchers { + + class Foo extends RawModule { override val desiredName = "Foo" } + + class Fixture { val phase: Phase = new AddImplicitOutputAnnotationFile } + + behavior of classOf[AddImplicitOutputAnnotationFile].toString + + it should "not override an existing OutputAnnotationFileAnnotation" in new Fixture { + val annotations: AnnotationSeq = Seq( + ChiselGeneratorAnnotation(() => new Foo), + OutputAnnotationFileAnnotation("Bar") ) + + Seq( new Elaborate, phase ) + .foldLeft(annotations)((a, p) => p.transform(a)) + .collect{ case a: OutputAnnotationFileAnnotation => a.file } + .toSeq should be (Seq("Bar")) + } + + it should "generate an OutputAnnotationFileAnnotation from a ChiselCircuitAnnotation" in new Fixture { + val annotations: AnnotationSeq = Seq( ChiselGeneratorAnnotation(() => new Foo) ) + + Seq( new Elaborate, phase ) + .foldLeft(annotations)((a, p) => p.transform(a)) + .collect{ case a: OutputAnnotationFileAnnotation => a.file } + .toSeq should be (Seq("Foo")) + } + +} |
