Fixed bug that created Vec(Reg(...)) instead of Reg(Vec(...))

1 files changed, 2 insertions, 2 deletions

diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala
index 4430ab66..6d16ec08 100644
--- a/src/test/scala/chiselTests/Vec.scala
+++ b/src/test/scala/chiselTests/Vec.scala
@@ -29,7 +29,7 @@ class ShiftRegisterTester(n: Int) extends BasicTester {
   val (cnt, wrap) = Counter(Bool(true), n*2)
   when(wrap) { io.done := Bool(true) }
 
-  val shifter = Vec(Reg(UInt(width = log2Up(n))), n)
+  val shifter = Reg(Vec(UInt(width = log2Up(n)), n))
   (shifter, shifter drop 1).zipped.foreach(_ := _)
   shifter(n-1) := cnt
   val expected = cnt - UInt(n)
@@ -48,7 +48,7 @@ class VecSpec extends ChiselPropSpec {
     forAll(smallPosInts) { (n: Int) => assert(execute{ new TabulateTester(n) }) }
   }
 
-  property("Vecs of regs should be usable as shift registers") {
+  property("Regs of vecs should be usable as shift registers") {
     forAll(smallPosInts) { (n: Int) => assert(execute{ new ShiftRegisterTester(n) }) }
   }
 }