diff options
| author | ducky | 2018-01-19 19:19:43 -0800 |
|---|---|---|
| committer | Richard Lin | 2018-01-19 21:39:36 -0800 |
| commit | 70ca35b9d7b3884e5f701d49bc5286f89701fd14 (patch) | |
| tree | 018a4d886b146e326c7dbabf51056a71dd6ccd7d /src/test/scala/chiselTests | |
| parent | 6b277ff0c3266e9b02fe9b483086ab46085202ce (diff) | |
Fix deprecations in tests
Diffstat (limited to 'src/test/scala/chiselTests')
| -rw-r--r-- | src/test/scala/chiselTests/ComplexAssign.scala | 2 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/Decoder.scala | 4 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/MemorySearch.scala | 2 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/MulLookup.scala | 2 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/SIntOps.scala | 2 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/Tbl.scala | 4 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/Vec.scala | 14 |
7 files changed, 15 insertions, 15 deletions
diff --git a/src/test/scala/chiselTests/ComplexAssign.scala b/src/test/scala/chiselTests/ComplexAssign.scala index e101e7c0..56a7aa3d 100644 --- a/src/test/scala/chiselTests/ComplexAssign.scala +++ b/src/test/scala/chiselTests/ComplexAssign.scala @@ -37,7 +37,7 @@ class ComplexAssignTester(enList: List[Boolean], re: Int, im: Int) extends Basic val dut = Module(new ComplexAssign(32)) dut.io.in.re := re.asUInt dut.io.in.im := im.asUInt - dut.io.e := Vec(enList.map(_.asBool))(cnt) + dut.io.e := VecInit(enList.map(_.asBool))(cnt) val re_correct = dut.io.out.re === Mux(dut.io.e, dut.io.in.re, 0.U) val im_correct = dut.io.out.im === Mux(dut.io.e, dut.io.in.im, 0.U) assert(re_correct && im_correct) diff --git a/src/test/scala/chiselTests/Decoder.scala b/src/test/scala/chiselTests/Decoder.scala index ff73a676..ff6c83b9 100644 --- a/src/test/scala/chiselTests/Decoder.scala +++ b/src/test/scala/chiselTests/Decoder.scala @@ -15,14 +15,14 @@ class Decoder(bitpats: List[String]) extends Module { val inst = Input(UInt(32.W)) val matched = Output(Bool()) }) - io.matched := Vec(bitpats.map(BitPat(_) === io.inst)).reduce(_||_) + io.matched := VecInit(bitpats.map(BitPat(_) === io.inst)).reduce(_||_) } class DecoderTester(pairs: List[(String, String)]) extends BasicTester { val (insts, bitpats) = pairs.unzip val (cnt, wrap) = Counter(true.B, pairs.size) val dut = Module(new Decoder(bitpats)) - dut.io.inst := Vec(insts.map(_.asUInt))(cnt) + dut.io.inst := VecInit(insts.map(_.asUInt))(cnt) when(!dut.io.matched) { assert(cnt === 0.U) stop() diff --git a/src/test/scala/chiselTests/MemorySearch.scala b/src/test/scala/chiselTests/MemorySearch.scala index d36167a4..93902d22 100644 --- a/src/test/scala/chiselTests/MemorySearch.scala +++ b/src/test/scala/chiselTests/MemorySearch.scala @@ -14,7 +14,7 @@ class MemorySearch extends Module { }) val vals = Array(0, 4, 15, 14, 2, 5, 13) val index = RegInit(0.U(3.W)) - val elts = Vec(vals.map(_.asUInt(4.W))) + val elts = VecInit(vals.map(_.asUInt(4.W))) // val elts = Mem(UInt(32.W), 8) TODO ???? val elt = elts(index) val end = !io.en && ((elt === io.target) || (index === 7.U)) diff --git a/src/test/scala/chiselTests/MulLookup.scala b/src/test/scala/chiselTests/MulLookup.scala index 936f3a45..38d010ee 100644 --- a/src/test/scala/chiselTests/MulLookup.scala +++ b/src/test/scala/chiselTests/MulLookup.scala @@ -13,7 +13,7 @@ class MulLookup(val w: Int) extends Module { val y = Input(UInt(w.W)) val z = Output(UInt((2 * w).W)) }) - val tbl = Vec( + val tbl = VecInit( for { i <- 0 until 1 << w j <- 0 until 1 << w diff --git a/src/test/scala/chiselTests/SIntOps.scala b/src/test/scala/chiselTests/SIntOps.scala index a9b75446..2c8267af 100644 --- a/src/test/scala/chiselTests/SIntOps.scala +++ b/src/test/scala/chiselTests/SIntOps.scala @@ -40,7 +40,7 @@ class SIntOps extends Module { io.lessout := a < b io.greatout := a > b io.eqout := a === b - io.noteqout := (a != b) + io.noteqout := (a =/= b) io.lesseqout := a <= b io.greateqout := a >= b // io.negout := -a(15, 0).toSInt diff --git a/src/test/scala/chiselTests/Tbl.scala b/src/test/scala/chiselTests/Tbl.scala index b938361f..c09189e6 100644 --- a/src/test/scala/chiselTests/Tbl.scala +++ b/src/test/scala/chiselTests/Tbl.scala @@ -30,8 +30,8 @@ class Tbl(w: Int, n: Int) extends Module { class TblTester(w: Int, n: Int, idxs: List[Int], values: List[Int]) extends BasicTester { val (cnt, wrap) = Counter(true.B, idxs.size) val dut = Module(new Tbl(w, n)) - val vvalues = Vec(values.map(_.asUInt)) - val vidxs = Vec(idxs.map(_.asUInt)) + val vvalues = VecInit(values.map(_.asUInt)) + val vidxs = VecInit(idxs.map(_.asUInt)) val prev_idx = vidxs(cnt - 1.U) val prev_value = vvalues(cnt - 1.U) dut.io.wi := vidxs(cnt) diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala index bf25ed82..395624f7 100644 --- a/src/test/scala/chiselTests/Vec.scala +++ b/src/test/scala/chiselTests/Vec.scala @@ -21,7 +21,7 @@ class RegTesterMod(vecSize: Int) extends Module { val in = Input(Vec(vecSize, UInt())) val out = Output(Vec(vecSize, UInt())) }) - val vecReg = RegNext(io.in, Vec(Seq.fill(vecSize){0.U})) + val vecReg = RegNext(io.in, VecInit(Seq.fill(vecSize){0.U})) io.out := vecReg } @@ -50,7 +50,7 @@ class LitTester(w: Int, values: List[Int]) extends BasicTester { } class RegTester(w: Int, values: List[Int]) extends BasicTester { - val v = Vec(values.map(_.U(w.W))) + val v = VecInit(values.map(_.U(w.W))) val dut = Module(new RegTesterMod(values.length)) val doneReg = RegInit(false.B) dut.io.in := v @@ -66,7 +66,7 @@ class RegTester(w: Int, values: List[Int]) extends BasicTester { } class IOTester(w: Int, values: List[Int]) extends BasicTester { - val v = Vec(values.map(_.U(w.W))) // Does this need a Wire? No. It's a Vec of Lits and hence synthesizeable. + val v = VecInit(values.map(_.U(w.W))) // Does this need a Wire? No. It's a Vec of Lits and hence synthesizeable. val dut = Module(new IOTesterMod(values.length)) dut.io.in := v for ((a,b) <- dut.io.out.zip(values)) { @@ -86,7 +86,7 @@ class IOTesterModFill(vecSize: Int) extends Module { } class ValueTester(w: Int, values: List[Int]) extends BasicTester { - val v = Vec(values.map(_.asUInt(w.W))) + val v = VecInit(values.map(_.asUInt(w.W))) for ((a,b) <- v.zip(values)) { assert(a === b.asUInt) } @@ -94,9 +94,9 @@ class ValueTester(w: Int, values: List[Int]) extends BasicTester { } class TabulateTester(n: Int) extends BasicTester { - val v = Vec(Range(0, n).map(i => (i*2).asUInt)) - val x = Vec(Array.tabulate(n){ i => (i*2).asUInt }) - val u = Vec.tabulate(n)(i => (i*2).asUInt) + val v = VecInit(Range(0, n).map(i => (i*2).asUInt)) + val x = VecInit(Array.tabulate(n){ i => (i*2).asUInt }) + val u = VecInit.tabulate(n)(i => (i*2).asUInt) assert(v.asUInt() === x.asUInt()) assert(v.asUInt() === u.asUInt()) |
